iwlwifi: 802.11n comply HT self configuration flow with mac80211 framework
[linux-2.6] / drivers / net / wireless / bcm43xx / bcm43xx_phy.c
1 /*
2
3   Broadcom BCM43xx wireless driver
4
5   Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6                      Stefano Brivio <st3@riseup.net>
7                      Michael Buesch <mbuesch@freenet.de>
8                      Danny van Dyk <kugelfang@gentoo.org>
9                      Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11   Some parts of the code in this file are derived from the ipw2200
12   driver  Copyright(c) 2003 - 2004 Intel Corporation.
13
14   This program is free software; you can redistribute it and/or modify
15   it under the terms of the GNU General Public License as published by
16   the Free Software Foundation; either version 2 of the License, or
17   (at your option) any later version.
18
19   This program is distributed in the hope that it will be useful,
20   but WITHOUT ANY WARRANTY; without even the implied warranty of
21   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22   GNU General Public License for more details.
23
24   You should have received a copy of the GNU General Public License
25   along with this program; see the file COPYING.  If not, write to
26   the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27   Boston, MA 02110-1301, USA.
28
29 */
30
31 #include <linux/delay.h>
32 #include <linux/pci.h>
33 #include <linux/types.h>
34
35 #include "bcm43xx.h"
36 #include "bcm43xx_phy.h"
37 #include "bcm43xx_main.h"
38 #include "bcm43xx_radio.h"
39 #include "bcm43xx_ilt.h"
40 #include "bcm43xx_power.h"
41
42
43 static const s8 bcm43xx_tssi2dbm_b_table[] = {
44         0x4D, 0x4C, 0x4B, 0x4A,
45         0x4A, 0x49, 0x48, 0x47,
46         0x47, 0x46, 0x45, 0x45,
47         0x44, 0x43, 0x42, 0x42,
48         0x41, 0x40, 0x3F, 0x3E,
49         0x3D, 0x3C, 0x3B, 0x3A,
50         0x39, 0x38, 0x37, 0x36,
51         0x35, 0x34, 0x32, 0x31,
52         0x30, 0x2F, 0x2D, 0x2C,
53         0x2B, 0x29, 0x28, 0x26,
54         0x25, 0x23, 0x21, 0x1F,
55         0x1D, 0x1A, 0x17, 0x14,
56         0x10, 0x0C, 0x06, 0x00,
57           -7,   -7,   -7,   -7,
58           -7,   -7,   -7,   -7,
59           -7,   -7,   -7,   -7,
60 };
61
62 static const s8 bcm43xx_tssi2dbm_g_table[] = {
63          77,  77,  77,  76,
64          76,  76,  75,  75,
65          74,  74,  73,  73,
66          73,  72,  72,  71,
67          71,  70,  70,  69,
68          68,  68,  67,  67,
69          66,  65,  65,  64,
70          63,  63,  62,  61,
71          60,  59,  58,  57,
72          56,  55,  54,  53,
73          52,  50,  49,  47,
74          45,  43,  40,  37,
75          33,  28,  22,  14,
76           5,  -7, -20, -20,
77         -20, -20, -20, -20,
78         -20, -20, -20, -20,
79 };
80
81 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
82
83
84 static inline
85 void bcm43xx_voluntary_preempt(void)
86 {
87         assert(!in_atomic() && !in_irq() &&
88                !in_interrupt() && !irqs_disabled());
89 #ifndef CONFIG_PREEMPT
90         cond_resched();
91 #endif /* CONFIG_PREEMPT */
92 }
93
94 void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
95 {
96         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
97
98         assert(irqs_disabled());
99         if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
100                 phy->is_locked = 0;
101                 return;
102         }
103         if (bcm->current_core->rev < 3) {
104                 bcm43xx_mac_suspend(bcm);
105                 spin_lock(&phy->lock);
106         } else {
107                 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
108                         bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
109         }
110         phy->is_locked = 1;
111 }
112
113 void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
114 {
115         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
116
117         assert(irqs_disabled());
118         if (bcm->current_core->rev < 3) {
119                 if (phy->is_locked) {
120                         spin_unlock(&phy->lock);
121                         bcm43xx_mac_enable(bcm);
122                 }
123         } else {
124                 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
125                         bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
126         }
127         phy->is_locked = 0;
128 }
129
130 u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
131 {
132         bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
133         return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
134 }
135
136 void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
137 {
138         bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
139         mmiowb();
140         bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
141 }
142
143 void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
144 {
145         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
146
147         bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
148         if (phy->calibrated)
149                 return;
150         if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
151                 bcm43xx_wireless_core_reset(bcm, 0);
152                 bcm43xx_phy_initg(bcm);
153                 bcm43xx_wireless_core_reset(bcm, 1);
154         }
155         phy->calibrated = 1;
156 }
157
158 /* Connect the PHY 
159  * http://bcm-specs.sipsolutions.net/SetPHY
160  */
161 int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
162 {
163         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
164         u32 flags;
165
166         if (bcm->current_core->rev < 5)
167                 goto out;
168
169         flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
170         if (connect) {
171                 if (!(flags & BCM43xx_SBTMSTATEHIGH_G_PHY_AVAIL))
172                         return -ENODEV;
173                 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
174                 flags |= BCM43xx_SBTMSTATELOW_G_MODE_ENABLE;
175                 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
176         } else {
177                 if (!(flags & BCM43xx_SBTMSTATEHIGH_A_PHY_AVAIL))
178                         return -ENODEV;
179                 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
180                 flags &= ~BCM43xx_SBTMSTATELOW_G_MODE_ENABLE;
181                 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
182         }
183 out:
184         phy->connected = connect;
185         if (connect)
186                 dprintk(KERN_INFO PFX "PHY connected\n");
187         else
188                 dprintk(KERN_INFO PFX "PHY disconnected\n");
189
190         return 0;
191 }
192
193 /* intialize B PHY power control
194  * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
195  */
196 static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
197 {
198         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
199         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
200         u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
201         int must_reset_txpower = 0;
202
203         assert(phy->type != BCM43xx_PHYTYPE_A);
204         if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
205             (bcm->board_type == 0x0416))
206                 return;
207
208         bcm43xx_phy_write(bcm, 0x0028, 0x8018);
209         bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
210
211         if (phy->type == BCM43xx_PHYTYPE_G) {
212                 if (!phy->connected)
213                         return;
214                 bcm43xx_phy_write(bcm, 0x047A, 0xC111);
215         }
216         if (phy->savedpctlreg != 0xFFFF)
217                 return;
218
219         if (phy->type == BCM43xx_PHYTYPE_B &&
220             phy->rev >= 2 &&
221             radio->version == 0x2050) {
222                 bcm43xx_radio_write16(bcm, 0x0076,
223                                       bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
224         } else {
225                 saved_batt = radio->baseband_atten;
226                 saved_ratt = radio->radio_atten;
227                 saved_txctl1 = radio->txctl1;
228                 if ((radio->revision >= 6) && (radio->revision <= 8)
229                     && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
230                         bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
231                 else
232                         bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
233                 must_reset_txpower = 1;
234         }
235         bcm43xx_dummy_transmission(bcm);
236
237         phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
238
239         if (must_reset_txpower)
240                 bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
241         else
242                 bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
243         bcm43xx_radio_clear_tssi(bcm);
244 }
245
246 static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
247 {
248         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
249         u16 offset = 0x0000;
250
251         if (phy->rev == 1)
252                 offset = 0x4C00;
253
254         bcm43xx_ilt_write(bcm, offset, 0x00FE);
255         bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
256         bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
257         bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
258
259         if (phy->rev == 1) {
260                 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
261                 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
262                 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
263                 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
264                 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
265         }
266
267         bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
268         bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
269         bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
270         bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
271
272         bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
273
274         bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
275         bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
276         bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
277         bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
278
279         if (phy->rev == 1)
280                 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
281
282         bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
283         bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
284         bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
285         bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
286         bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
287         bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
288         bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
289         bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
290         bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
291
292         if (phy->rev == 1) {
293                 bcm43xx_phy_write(bcm, 0x0430, 0x092B);
294                 bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
295         } else {
296                 bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
297                 bcm43xx_phy_write(bcm, 0x041F, 0x287A);
298                 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
299         }
300
301         if (phy->rev > 2) {
302                 bcm43xx_phy_write(bcm, 0x0422, 0x287A);
303                 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420)
304                                   & 0x0FFF) | 0x3000);
305         }
306                 
307         bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080)
308                                         | 0x7874);
309         bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
310
311         if (phy->rev == 1) {
312                 bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB)
313                                   & 0xF0FF) | 0x0600);
314                 bcm43xx_phy_write(bcm, 0x048B, 0x005E);
315                 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C)
316                                   & 0xFF00) | 0x001E);
317                 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
318         }
319
320         bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
321         bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
322         bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
323         bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
324
325         if (phy->rev >= 6) {
326                 bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)
327                                   & 0xFFFC));
328                 bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)
329                                   & 0xEFFF));
330         }
331 }
332
333 static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
334 {
335         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
336         u16 i;
337
338         assert(phy->type == BCM43xx_PHYTYPE_G);
339         if (phy->rev == 1) {
340                 bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
341                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
342                                   (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS)
343                                   & 0xFC3F) | 0x0340);
344                 bcm43xx_phy_write(bcm, 0x042C, 0x005A);
345                 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
346
347                 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
348                         bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
349                 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
350                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
351                 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
352                         bcm43xx_ilt_write32(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
353         } else {
354                 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
355                 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
356
357                 if (phy->rev == 2) {
358                         bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
359                         bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
360                 } else if (phy->rev > 2) {
361                         bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
362                         bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
363                         bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
364                 }
365                 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
366
367                 for (i = 0; i < 64; i++)
368                         bcm43xx_ilt_write(bcm, 0x4000 + i, i);
369                 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
370                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
371         }
372         
373         if (phy->rev <= 2)
374                 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
375                         bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
376         else if ((phy->rev >= 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
377                 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
378                         bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
379         else
380                 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
381                         bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
382         
383         if (phy->rev == 2)
384                 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
385                         bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
386         else if ((phy->rev > 2) && (phy->rev <= 8))
387                 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
388                         bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
389         
390         if (phy->rev == 1) {
391                 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
392                         bcm43xx_ilt_write32(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
393                 for (i = 0; i < 4; i++) {
394                         bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
395                         bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
396                         bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
397                         bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
398                 }
399                 bcm43xx_phy_agcsetup(bcm);
400
401                 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
402                     (bcm->board_type == 0x0416) &&
403                     (bcm->board_revision == 0x0017))
404                         return;
405
406                 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
407                 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
408         } else {
409                 for (i = 0; i <= 0x2F; i++)
410                         bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
411                 bcm43xx_phy_agcsetup(bcm);
412                 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
413                 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
414                 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
415                 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
416
417                 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
418                     (bcm->board_type == 0x0416) &&
419                     (bcm->board_revision == 0x0017))
420                         return;
421
422                 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
423                 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
424         }
425 }
426
427 /* Initialize the noisescaletable for APHY */
428 static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
429 {
430         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
431         int i;
432
433         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
434         for (i = 0; i < 12; i++) {
435                 if (phy->rev == 2)
436                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
437                 else
438                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
439         }
440         if (phy->rev == 2)
441                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
442         else
443                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
444         for (i = 0; i < 11; i++) {
445                 if (phy->rev == 2)
446                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
447                 else
448                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
449         }
450         if (phy->rev == 2)
451                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
452         else
453                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
454 }
455
456 static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
457 {
458         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
459         u16 i;
460
461         assert(phy->type == BCM43xx_PHYTYPE_A);
462         switch (phy->rev) {
463         case 2:
464                 bcm43xx_phy_write(bcm, 0x008E, 0x3800);
465                 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
466                 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
467
468                 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
469
470                 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
471                 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
472                 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
473                 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
474
475                 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
476                 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
477                 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
478                 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
479
480                 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
481                 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
482                 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
483
484                 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
485                 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
486                 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
487                 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
488                 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
489
490                 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
491                 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
492                 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
493                 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
494                 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
495                 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
496                 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
497
498                 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
499                 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
500                 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
501
502                 for (i = 0; i < 16; i++)
503                         bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
504
505                 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
506                 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
507                 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
508                 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
509
510                 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
511                         bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
512                 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
513                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
514                 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
515                         bcm43xx_ilt_write32(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
516                 bcm43xx_phy_init_noisescaletbl(bcm);
517                 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
518                         bcm43xx_ilt_write32(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
519                 break;
520         case 3:
521                 for (i = 0; i < 64; i++)
522                         bcm43xx_ilt_write(bcm, 0x4000 + i, i);
523
524                 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
525
526                 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
527                 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
528                 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
529
530                 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
531                 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
532                 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
533                 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
534                 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
535
536                 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
537                 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
538                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
539                 bcm43xx_phy_init_noisescaletbl(bcm);
540                 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
541                         bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
542
543                 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
544
545                 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
546                 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
547                 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
548                 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
549                 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
550
551                 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
552                 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
553                 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
554                 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
555                 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
556                 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
557                 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
558
559                 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
560                 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
561                 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
562
563                 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
564                 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
565                 break;
566         default:
567                 assert(0);
568         }
569 }
570
571 /* Initialize APHY. This is also called for the GPHY in some cases. */
572 static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
573 {
574         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
575         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
576         u16 tval;
577
578         if (phy->type == BCM43xx_PHYTYPE_A) {
579                 bcm43xx_phy_setupa(bcm);
580         } else {
581                 bcm43xx_phy_setupg(bcm);
582                 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
583                         bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
584                 return;
585         }
586
587         bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
588                           (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
589         bcm43xx_phy_write(bcm, 0x0034, 0x0001);
590
591         TODO();//TODO: RSSI AGC
592         bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
593                           bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
594         bcm43xx_radio_init2060(bcm);
595
596         if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
597             && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
598                 if (radio->lofcal == 0xFFFF) {
599                         TODO();//TODO: LOF Cal
600                         bcm43xx_radio_set_tx_iq(bcm);
601                 } else
602                         bcm43xx_radio_write16(bcm, 0x001E, radio->lofcal);
603         }
604
605         bcm43xx_phy_write(bcm, 0x007A, 0xF111);
606
607         if (phy->savedpctlreg == 0xFFFF) {
608                 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
609                 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
610
611                 tval = bcm43xx_ilt_read(bcm, 0x3001);
612                 if (phy->rev == 1) {
613                         bcm43xx_ilt_write(bcm, 0x3001,
614                                           (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
615                                           | 0x0058);
616                 } else {
617                         bcm43xx_ilt_write(bcm, 0x3001,
618                                           (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
619                                           | 0x002C);
620                 }
621                 bcm43xx_dummy_transmission(bcm);
622                 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
623                 bcm43xx_ilt_write(bcm, 0x3001, tval);
624
625                 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
626         }
627         bcm43xx_radio_clear_tssi(bcm);
628 }
629
630 static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
631 {
632         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
633         u16 offset, val;
634
635         bcm43xx_write16(bcm, 0x03EC, 0x3F22);
636         bcm43xx_phy_write(bcm, 0x0020, 0x301C);
637         bcm43xx_phy_write(bcm, 0x0026, 0x0000);
638         bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
639         bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
640         val = 0x3C3D;
641         for (offset = 0x0089; offset < 0x00A7; offset++) {
642                 bcm43xx_phy_write(bcm, offset, val);
643                 val -= 0x0202;
644         }
645         bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
646         if (radio->channel == 0xFF)
647                 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
648         else
649                 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
650         if (radio->version != 0x2050) {
651                 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
652                 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
653         }
654         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
655         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
656         if (radio->version == 0x2050) {
657                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
658                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
659                 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
660                 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
661                 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
662                 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
663                 bcm43xx_radio_init2050(bcm);
664         }
665         bcm43xx_phy_write(bcm, 0x0014, 0x0080);
666         bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
667         bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
668         bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
669         bcm43xx_phy_lo_b_measure(bcm);
670         bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
671         if (radio->version != 0x2050)
672                 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
673         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
674         bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
675         if (radio->version != 0x2050)
676                 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
677         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
678         bcm43xx_phy_init_pctl(bcm);
679 }
680
681 static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
682 {
683         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
684         u16 offset, val;
685
686         bcm43xx_write16(bcm, 0x03EC, 0x3F22);
687         bcm43xx_phy_write(bcm, 0x0020, 0x301C);
688         bcm43xx_phy_write(bcm, 0x0026, 0x0000);
689         bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
690         bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
691         val = 0x3C3D;
692         for (offset = 0x0089; offset < 0x00A7; offset++) {
693                 bcm43xx_phy_write(bcm, offset, val);
694                 val -= 0x0202;
695         }
696         bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
697         if (radio->channel == 0xFF)
698                 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
699         else
700                 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
701         if (radio->version != 0x2050) {
702                 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
703                 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
704         }
705         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
706         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
707         if (radio->version == 0x2050) {
708                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
709                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
710                 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
711                 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
712                 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
713                 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
714                 bcm43xx_radio_init2050(bcm);
715         }
716         bcm43xx_phy_write(bcm, 0x0014, 0x0080);
717         bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
718         if (radio->version == 0x2050)
719                 bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
720         bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
721
722         bcm43xx_phy_lo_b_measure(bcm);
723
724         bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
725         if (radio->version == 0x2050)
726                 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
727         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
728         bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
729         if (radio->version == 0x2050)
730                 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
731         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
732         if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
733                 bcm43xx_calc_nrssi_slope(bcm);
734                 bcm43xx_calc_nrssi_threshold(bcm);
735         }
736         bcm43xx_phy_init_pctl(bcm);
737 }
738
739 static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
740 {
741         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
742         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
743         u16 offset;
744         u16 value;
745         u8 old_channel;
746
747         if (phy->analog == 1)
748                 bcm43xx_radio_write16(bcm, 0x007A,
749                                       bcm43xx_radio_read16(bcm, 0x007A)
750                                       | 0x0050);
751         if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
752             (bcm->board_type != 0x0416)) {
753                 value = 0x2120;
754                 for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
755                         bcm43xx_phy_write(bcm, offset, value);
756                         value += 0x0202;
757                 }
758         }
759         bcm43xx_phy_write(bcm, 0x0035,
760                           (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
761                           | 0x0700);
762         if (radio->version == 0x2050)
763                 bcm43xx_phy_write(bcm, 0x0038, 0x0667);
764
765         if (phy->connected) {
766                 if (radio->version == 0x2050) {
767                         bcm43xx_radio_write16(bcm, 0x007A,
768                                               bcm43xx_radio_read16(bcm, 0x007A)
769                                               | 0x0020);
770                         bcm43xx_radio_write16(bcm, 0x0051,
771                                               bcm43xx_radio_read16(bcm, 0x0051)
772                                               | 0x0004);
773                 }
774                 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
775
776                 bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
777                 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
778
779                 bcm43xx_phy_write(bcm, 0x001C, 0x186A);
780
781                 bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
782                 bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
783                 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
784         }
785
786         if (bcm->bad_frames_preempt) {
787                 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
788                                   bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
789         }
790
791         if (phy->analog == 1) {
792                 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
793                 bcm43xx_phy_write(bcm, 0x0021, 0x3763);
794                 bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
795                 bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
796                 bcm43xx_phy_write(bcm, 0x0024, 0x037E);
797         } else
798                 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
799         bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
800         bcm43xx_write16(bcm, 0x03EC, 0x3F22);
801
802         if (phy->analog == 1)
803                 bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
804         else
805                 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
806
807         if (phy->analog == 0)
808                 bcm43xx_write16(bcm, 0x03E4, 0x3000);
809
810         old_channel = radio->channel;
811         /* Force to channel 7, even if not supported. */
812         bcm43xx_radio_selectchannel(bcm, 7, 0);
813
814         if (radio->version != 0x2050) {
815                 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
816                 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
817         }
818
819         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
820         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
821
822         if (radio->version == 0x2050) {
823                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
824                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
825         }
826
827         bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
828         bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
829
830         bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
831
832         bcm43xx_radio_selectchannel(bcm, old_channel, 0);
833
834         bcm43xx_phy_write(bcm, 0x0014, 0x0080);
835         bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
836         bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
837
838         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
839
840         if (radio->version == 0x2050)
841                 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
842
843         bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
844 }
845
846 static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
847 {
848         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
849         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
850         u16 offset, val;
851         u8 old_channel;
852
853         bcm43xx_phy_write(bcm, 0x003E, 0x817A);
854         bcm43xx_radio_write16(bcm, 0x007A,
855                               (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
856         if (radio->revision == 4 ||
857              radio->revision == 5) {
858                 bcm43xx_radio_write16(bcm, 0x0051, 0x0037);
859                 bcm43xx_radio_write16(bcm, 0x0052, 0x0070);
860                 bcm43xx_radio_write16(bcm, 0x0053, 0x00B3);
861                 bcm43xx_radio_write16(bcm, 0x0054, 0x009B);
862                 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
863                 bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
864                 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
865                 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
866                 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
867                 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
868                                     BCM43xx_UCODEFLAGS_OFFSET,
869                                     (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
870                                     BCM43xx_UCODEFLAGS_OFFSET)
871                                     | 0x00000200));
872         }
873         if (radio->revision == 8) {
874                 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
875                 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
876                 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
877                 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
878                 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
879                 bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
880                 bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
881                 if (bcm->sprom.boardflags & 0x8000) {
882                         bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
883                         bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
884                 } else {
885                         bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
886                         bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
887                 }
888                 bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
889                 bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
890                 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
891                 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
892         }
893         val = 0x1E1F;
894         for (offset = 0x0088; offset < 0x0098; offset++) {
895                 bcm43xx_phy_write(bcm, offset, val);
896                 val -= 0x0202;
897         }
898         val = 0x3E3F;
899         for (offset = 0x0098; offset < 0x00A8; offset++) {
900                 bcm43xx_phy_write(bcm, offset, val);
901                 val -= 0x0202;
902         }
903         val = 0x2120;
904         for (offset = 0x00A8; offset < 0x00C8; offset++) {
905                 bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
906                 val += 0x0202;
907         }
908         if (phy->type == BCM43xx_PHYTYPE_G) {
909                 bcm43xx_radio_write16(bcm, 0x007A,
910                                       bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
911                 bcm43xx_radio_write16(bcm, 0x0051,
912                                       bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
913                 bcm43xx_phy_write(bcm, 0x0802,
914                                   bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
915                 bcm43xx_phy_write(bcm, 0x042B,
916                                   bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
917                 bcm43xx_phy_write(bcm, 0x5B, 0x0000);
918                 bcm43xx_phy_write(bcm, 0x5C, 0x0000);
919         }
920
921         old_channel = radio->channel;
922         if (old_channel >= 8)
923                 bcm43xx_radio_selectchannel(bcm, 1, 0);
924         else
925                 bcm43xx_radio_selectchannel(bcm, 13, 0);
926
927         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
928         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
929         udelay(40);
930         if (radio->revision < 6 || radio-> revision == 8) {
931                 bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C)
932                                       | 0x0002));
933                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
934         }
935         if (radio->revision <= 2) {
936                 bcm43xx_radio_write16(bcm, 0x007C, 0x0020);
937                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
938                 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
939                 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
940         }
941         bcm43xx_radio_write16(bcm, 0x007A,
942                               (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
943
944         bcm43xx_radio_selectchannel(bcm, old_channel, 0);
945
946         bcm43xx_phy_write(bcm, 0x0014, 0x0200);
947         if (radio->revision >= 6)
948                 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
949         else
950                 bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
951         bcm43xx_phy_write(bcm, 0x0038, 0x0668);
952         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
953         if (radio->revision <= 5)
954                 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D)
955                                   & 0xFF80) | 0x0003);
956         if (radio->revision <= 2)
957                 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
958         
959         if (phy->analog == 4){
960                 bcm43xx_write16(bcm, 0x03E4, 0x0009);
961                 bcm43xx_phy_write(bcm, 0x61, bcm43xx_phy_read(bcm, 0x61) & 0xFFF);
962         } else {
963                 bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
964         }
965         if (phy->type == BCM43xx_PHYTYPE_G)
966                 bcm43xx_write16(bcm, 0x03E6, 0x0);
967         if (phy->type == BCM43xx_PHYTYPE_B) {
968                 bcm43xx_write16(bcm, 0x03E6, 0x8140);
969                 bcm43xx_phy_write(bcm, 0x0016, 0x0410);
970                 bcm43xx_phy_write(bcm, 0x0017, 0x0820);
971                 bcm43xx_phy_write(bcm, 0x0062, 0x0007);
972                 bcm43xx_radio_init2050(bcm);
973                 bcm43xx_phy_lo_g_measure(bcm);
974                 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
975                         bcm43xx_calc_nrssi_slope(bcm);
976                         bcm43xx_calc_nrssi_threshold(bcm);
977                 }
978                 bcm43xx_phy_init_pctl(bcm);
979         }
980 }
981
982 static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm)
983 {
984         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
985         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
986         u16 backup_phy[15] = {0};
987         u16 backup_radio[3];
988         u16 backup_bband;
989         u16 i;
990         u16 loop1_cnt, loop1_done, loop1_omitted;
991         u16 loop2_done;
992
993         backup_phy[0] = bcm43xx_phy_read(bcm, 0x0429);
994         backup_phy[1] = bcm43xx_phy_read(bcm, 0x0001);
995         backup_phy[2] = bcm43xx_phy_read(bcm, 0x0811);
996         backup_phy[3] = bcm43xx_phy_read(bcm, 0x0812);
997         if (phy->rev != 1) {
998                 backup_phy[4] = bcm43xx_phy_read(bcm, 0x0814);
999                 backup_phy[5] = bcm43xx_phy_read(bcm, 0x0815);
1000         }
1001         backup_phy[6] = bcm43xx_phy_read(bcm, 0x005A);
1002         backup_phy[7] = bcm43xx_phy_read(bcm, 0x0059);
1003         backup_phy[8] = bcm43xx_phy_read(bcm, 0x0058);
1004         backup_phy[9] = bcm43xx_phy_read(bcm, 0x000A);
1005         backup_phy[10] = bcm43xx_phy_read(bcm, 0x0003);
1006         backup_phy[11] = bcm43xx_phy_read(bcm, 0x080F);
1007         backup_phy[12] = bcm43xx_phy_read(bcm, 0x0810);
1008         backup_phy[13] = bcm43xx_phy_read(bcm, 0x002B);
1009         backup_phy[14] = bcm43xx_phy_read(bcm, 0x0015);
1010         bcm43xx_phy_read(bcm, 0x002D); /* dummy read */
1011         backup_bband = radio->baseband_atten;
1012         backup_radio[0] = bcm43xx_radio_read16(bcm, 0x0052);
1013         backup_radio[1] = bcm43xx_radio_read16(bcm, 0x0043);
1014         backup_radio[2] = bcm43xx_radio_read16(bcm, 0x007A);
1015
1016         bcm43xx_phy_write(bcm, 0x0429,
1017                           bcm43xx_phy_read(bcm, 0x0429) & 0x3FFF);
1018         bcm43xx_phy_write(bcm, 0x0001,
1019                           bcm43xx_phy_read(bcm, 0x0001) & 0x8000);
1020         bcm43xx_phy_write(bcm, 0x0811,
1021                           bcm43xx_phy_read(bcm, 0x0811) | 0x0002);
1022         bcm43xx_phy_write(bcm, 0x0812,
1023                           bcm43xx_phy_read(bcm, 0x0812) & 0xFFFD);
1024         bcm43xx_phy_write(bcm, 0x0811,
1025                           bcm43xx_phy_read(bcm, 0x0811) | 0x0001);
1026         bcm43xx_phy_write(bcm, 0x0812,
1027                           bcm43xx_phy_read(bcm, 0x0812) & 0xFFFE);
1028         if (phy->rev != 1) {
1029                 bcm43xx_phy_write(bcm, 0x0814,
1030                                   bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
1031                 bcm43xx_phy_write(bcm, 0x0815,
1032                                   bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
1033                 bcm43xx_phy_write(bcm, 0x0814,
1034                                   bcm43xx_phy_read(bcm, 0x0814) | 0x0002);
1035                 bcm43xx_phy_write(bcm, 0x0815,
1036                                   bcm43xx_phy_read(bcm, 0x0815) & 0xFFFD);
1037         }
1038         bcm43xx_phy_write(bcm, 0x0811,
1039                           bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
1040         bcm43xx_phy_write(bcm, 0x0812,
1041                           bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
1042
1043         bcm43xx_phy_write(bcm, 0x0811,
1044                           (bcm43xx_phy_read(bcm, 0x0811)
1045                            & 0xFFCF) | 0x0030);
1046         bcm43xx_phy_write(bcm, 0x0812,
1047                           (bcm43xx_phy_read(bcm, 0x0812)
1048                            & 0xFFCF) | 0x0010);
1049
1050         bcm43xx_phy_write(bcm, 0x005A, 0x0780);
1051         bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1052         bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1053         if (phy->analog == 0) {
1054                 bcm43xx_phy_write(bcm, 0x0003, 0x0122);
1055         } else {
1056                 bcm43xx_phy_write(bcm, 0x000A,
1057                                   bcm43xx_phy_read(bcm, 0x000A)
1058                                   | 0x2000);
1059         }
1060         if (phy->rev != 1) {
1061                 bcm43xx_phy_write(bcm, 0x0814,
1062                                   bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
1063                 bcm43xx_phy_write(bcm, 0x0815,
1064                                   bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
1065         }
1066         bcm43xx_phy_write(bcm, 0x0003,
1067                           (bcm43xx_phy_read(bcm, 0x0003)
1068                            & 0xFF9F) | 0x0040);
1069         if (radio->version == 0x2050 && radio->revision == 2) {
1070                 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1071                 bcm43xx_radio_write16(bcm, 0x0043,
1072                                       (bcm43xx_radio_read16(bcm, 0x0043)
1073                                        & 0xFFF0) | 0x0009);
1074                 loop1_cnt = 9;
1075         } else if (radio->revision == 8) {
1076                 bcm43xx_radio_write16(bcm, 0x0043, 0x000F);
1077                 loop1_cnt = 15;
1078         } else
1079                 loop1_cnt = 0;
1080
1081         bcm43xx_phy_set_baseband_attenuation(bcm, 11);
1082
1083         if (phy->rev >= 3)
1084                 bcm43xx_phy_write(bcm, 0x080F, 0xC020);
1085         else
1086                 bcm43xx_phy_write(bcm, 0x080F, 0x8020);
1087         bcm43xx_phy_write(bcm, 0x0810, 0x0000);
1088
1089         bcm43xx_phy_write(bcm, 0x002B,
1090                           (bcm43xx_phy_read(bcm, 0x002B)
1091                            & 0xFFC0) | 0x0001);
1092         bcm43xx_phy_write(bcm, 0x002B,
1093                           (bcm43xx_phy_read(bcm, 0x002B)
1094                            & 0xC0FF) | 0x0800);
1095         bcm43xx_phy_write(bcm, 0x0811,
1096                           bcm43xx_phy_read(bcm, 0x0811) | 0x0100);
1097         bcm43xx_phy_write(bcm, 0x0812,
1098                           bcm43xx_phy_read(bcm, 0x0812) & 0xCFFF);
1099         if (bcm->sprom.boardflags & BCM43xx_BFL_EXTLNA) {
1100                 if (phy->rev >= 7) {
1101                         bcm43xx_phy_write(bcm, 0x0811,
1102                                           bcm43xx_phy_read(bcm, 0x0811)
1103                                           | 0x0800);
1104                         bcm43xx_phy_write(bcm, 0x0812,
1105                                           bcm43xx_phy_read(bcm, 0x0812)
1106                                           | 0x8000);
1107                 }
1108         }
1109         bcm43xx_radio_write16(bcm, 0x007A,
1110                               bcm43xx_radio_read16(bcm, 0x007A)
1111                               & 0x00F7);
1112
1113         for (i = 0; i < loop1_cnt; i++) {
1114                 bcm43xx_radio_write16(bcm, 0x0043, loop1_cnt);
1115                 bcm43xx_phy_write(bcm, 0x0812,
1116                                   (bcm43xx_phy_read(bcm, 0x0812)
1117                                    & 0xF0FF) | (i << 8));
1118                 bcm43xx_phy_write(bcm, 0x0015,
1119                                   (bcm43xx_phy_read(bcm, 0x0015)
1120                                    & 0x0FFF) | 0xA000);
1121                 bcm43xx_phy_write(bcm, 0x0015,
1122                                   (bcm43xx_phy_read(bcm, 0x0015)
1123                                    & 0x0FFF) | 0xF000);
1124                 udelay(20);
1125                 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1126                         break;
1127         }
1128         loop1_done = i;
1129         loop1_omitted = loop1_cnt - loop1_done;
1130
1131         loop2_done = 0;
1132         if (loop1_done >= 8) {
1133                 bcm43xx_phy_write(bcm, 0x0812,
1134                                   bcm43xx_phy_read(bcm, 0x0812)
1135                                   | 0x0030);
1136                 for (i = loop1_done - 8; i < 16; i++) {
1137                         bcm43xx_phy_write(bcm, 0x0812,
1138                                           (bcm43xx_phy_read(bcm, 0x0812)
1139                                            & 0xF0FF) | (i << 8));
1140                         bcm43xx_phy_write(bcm, 0x0015,
1141                                           (bcm43xx_phy_read(bcm, 0x0015)
1142                                            & 0x0FFF) | 0xA000);
1143                         bcm43xx_phy_write(bcm, 0x0015,
1144                                           (bcm43xx_phy_read(bcm, 0x0015)
1145                                            & 0x0FFF) | 0xF000);
1146                         udelay(20);
1147                         if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1148                                 break;
1149                 }
1150         }
1151
1152         if (phy->rev != 1) {
1153                 bcm43xx_phy_write(bcm, 0x0814, backup_phy[4]);
1154                 bcm43xx_phy_write(bcm, 0x0815, backup_phy[5]);
1155         }
1156         bcm43xx_phy_write(bcm, 0x005A, backup_phy[6]);
1157         bcm43xx_phy_write(bcm, 0x0059, backup_phy[7]);
1158         bcm43xx_phy_write(bcm, 0x0058, backup_phy[8]);
1159         bcm43xx_phy_write(bcm, 0x000A, backup_phy[9]);
1160         bcm43xx_phy_write(bcm, 0x0003, backup_phy[10]);
1161         bcm43xx_phy_write(bcm, 0x080F, backup_phy[11]);
1162         bcm43xx_phy_write(bcm, 0x0810, backup_phy[12]);
1163         bcm43xx_phy_write(bcm, 0x002B, backup_phy[13]);
1164         bcm43xx_phy_write(bcm, 0x0015, backup_phy[14]);
1165
1166         bcm43xx_phy_set_baseband_attenuation(bcm, backup_bband);
1167
1168         bcm43xx_radio_write16(bcm, 0x0052, backup_radio[0]);
1169         bcm43xx_radio_write16(bcm, 0x0043, backup_radio[1]);
1170         bcm43xx_radio_write16(bcm, 0x007A, backup_radio[2]);
1171
1172         bcm43xx_phy_write(bcm, 0x0811, backup_phy[2] | 0x0003);
1173         udelay(10);
1174         bcm43xx_phy_write(bcm, 0x0811, backup_phy[2]);
1175         bcm43xx_phy_write(bcm, 0x0812, backup_phy[3]);
1176         bcm43xx_phy_write(bcm, 0x0429, backup_phy[0]);
1177         bcm43xx_phy_write(bcm, 0x0001, backup_phy[1]);
1178
1179         phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
1180         phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
1181 }
1182
1183 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
1184 {
1185         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1186         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1187         u16 tmp;
1188
1189         if (phy->rev == 1)
1190                 bcm43xx_phy_initb5(bcm);
1191         else
1192                 bcm43xx_phy_initb6(bcm);
1193         if (phy->rev >= 2 || phy->connected)
1194                 bcm43xx_phy_inita(bcm);
1195
1196         if (phy->rev >= 2) {
1197                 bcm43xx_phy_write(bcm, 0x0814, 0x0000);
1198                 bcm43xx_phy_write(bcm, 0x0815, 0x0000);
1199         }
1200         if (phy->rev == 2) {
1201                 bcm43xx_phy_write(bcm, 0x0811, 0x0000);
1202                 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1203         }
1204         if (phy->rev > 5) {
1205                 bcm43xx_phy_write(bcm, 0x0811, 0x0400);
1206                 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1207         }
1208         if (phy->rev >= 2 && phy->connected) {
1209                 tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
1210                 if (tmp ==3 || tmp == 5) {
1211                         bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1212                         bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
1213                         if (tmp == 5) {
1214                                 bcm43xx_phy_write(bcm, 0x04CC,
1215                                                   (bcm43xx_phy_read(bcm, 0x04CC)
1216                                                    & 0x00FF) | 0x1F00);
1217                         }
1218                 }
1219                 bcm43xx_phy_write(bcm, 0x047E, 0x0078);
1220         }
1221         if (radio->revision == 8) {
1222                 bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
1223                 bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
1224         }
1225         if (phy->rev >= 2 && phy->connected)
1226                 bcm43xx_calc_loopback_gain(bcm);
1227         if (radio->revision != 8) {
1228                 if (radio->initval == 0xFFFF)
1229                         radio->initval = bcm43xx_radio_init2050(bcm);
1230                 else
1231                         bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
1232         }
1233         if (radio->txctl2 == 0xFFFF) {
1234                 bcm43xx_phy_lo_g_measure(bcm);
1235         } else {
1236                 if (radio->version == 0x2050 && radio->revision == 8) {
1237                         bcm43xx_radio_write16(bcm, 0x0052,
1238                                               (radio->txctl1 << 4) | radio->txctl2);
1239                 } else {
1240                         bcm43xx_radio_write16(bcm, 0x0052,
1241                                               (bcm43xx_radio_read16(bcm, 0x0052)
1242                                                & 0xFFF0) | radio->txctl1);
1243                 }
1244                 if (phy->rev >= 6) {
1245                         bcm43xx_phy_write(bcm, 0x0036,
1246                                           (bcm43xx_phy_read(bcm, 0x0036)
1247                                            & 0x0FFF) | (radio->txctl2 << 12));
1248                 }
1249                 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
1250                         bcm43xx_phy_write(bcm, 0x002E, 0x8075);
1251                 else
1252                         bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1253                 if (phy->rev < 2)
1254                         bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1255                 else
1256                         bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1257         }
1258         if (phy->connected || phy->rev >= 2) {
1259                 bcm43xx_phy_lo_adjust(bcm, 0);
1260                 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1261         }
1262
1263         if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
1264                 /* The specs state to update the NRSSI LT with
1265                  * the value 0x7FFFFFFF here. I think that is some weird
1266                  * compiler optimization in the original driver.
1267                  * Essentially, what we do here is resetting all NRSSI LT
1268                  * entries to -32 (see the limit_value() in nrssi_hw_update())
1269                  */
1270                 bcm43xx_nrssi_hw_update(bcm, 0xFFFF);
1271                 bcm43xx_calc_nrssi_threshold(bcm);
1272         } else if (phy->connected || phy->rev >= 2) {
1273                 if (radio->nrssi[0] == -1000) {
1274                         assert(radio->nrssi[1] == -1000);
1275                         bcm43xx_calc_nrssi_slope(bcm);
1276                 } else {
1277                         assert(radio->nrssi[1] != -1000);
1278                         bcm43xx_calc_nrssi_threshold(bcm);
1279                 }
1280         }
1281         if (radio->revision == 8)
1282                 bcm43xx_phy_write(bcm, 0x0805, 0x3230);
1283         bcm43xx_phy_init_pctl(bcm);
1284         if (bcm->chip_id == 0x4306 && bcm->chip_package == 2) {
1285                 bcm43xx_phy_write(bcm, 0x0429,
1286                                   bcm43xx_phy_read(bcm, 0x0429) & 0xBFFF);
1287                 bcm43xx_phy_write(bcm, 0x04C3,
1288                                   bcm43xx_phy_read(bcm, 0x04C3) & 0x7FFF);
1289         }
1290 }
1291
1292 static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
1293 {
1294         int i;
1295         u16 ret = 0;
1296         unsigned long flags;
1297
1298         local_irq_save(flags);
1299         for (i = 0; i < 10; i++){
1300                 bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
1301                 udelay(1);
1302                 bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
1303                 udelay(10);
1304                 bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
1305                 udelay(40);
1306                 ret += bcm43xx_phy_read(bcm, 0x002C);
1307         }
1308         local_irq_restore(flags);
1309         bcm43xx_voluntary_preempt();
1310
1311         return ret;
1312 }
1313
1314 void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
1315 {
1316         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1317         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1318         u16 regstack[12] = { 0 };
1319         u16 mls;
1320         u16 fval;
1321         int i, j;
1322
1323         regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
1324         regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
1325
1326         if (radio->version == 0x2053) {
1327                 regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
1328                 regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
1329                 regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
1330                 regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
1331                 regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
1332                 regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
1333
1334                 regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
1335                 regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
1336                 regstack[10] = bcm43xx_read16(bcm, 0x03EC);
1337                 regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
1338
1339                 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1340                 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1341                 bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
1342                 bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
1343         }
1344         bcm43xx_phy_write(bcm, 0x0015, 0xB000);
1345         bcm43xx_phy_write(bcm, 0x002B, 0x0004);
1346
1347         if (radio->version == 0x2053) {
1348                 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1349                 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1350         }
1351
1352         phy->minlowsig[0] = 0xFFFF;
1353
1354         for (i = 0; i < 4; i++) {
1355                 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1356                 bcm43xx_phy_lo_b_r15_loop(bcm);
1357         }
1358         for (i = 0; i < 10; i++) {
1359                 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1360                 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1361                 if (mls < phy->minlowsig[0]) {
1362                         phy->minlowsig[0] = mls;
1363                         phy->minlowsigpos[0] = i;
1364                 }
1365         }
1366         bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
1367
1368         phy->minlowsig[1] = 0xFFFF;
1369
1370         for (i = -4; i < 5; i += 2) {
1371                 for (j = -4; j < 5; j += 2) {
1372                         if (j < 0)
1373                                 fval = (0x0100 * i) + j + 0x0100;
1374                         else
1375                                 fval = (0x0100 * i) + j;
1376                         bcm43xx_phy_write(bcm, 0x002F, fval);
1377                         mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1378                         if (mls < phy->minlowsig[1]) {
1379                                 phy->minlowsig[1] = mls;
1380                                 phy->minlowsigpos[1] = fval;
1381                         }
1382                 }
1383         }
1384         phy->minlowsigpos[1] += 0x0101;
1385
1386         bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
1387         if (radio->version == 0x2053) {
1388                 bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
1389                 bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
1390                 bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
1391                 bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
1392                 bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
1393                 bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
1394
1395                 bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
1396                 bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
1397
1398                 bcm43xx_radio_write16(bcm, 0x0052,
1399                                       (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
1400                                       | regstack[11]);
1401
1402                 bcm43xx_write16(bcm, 0x03EC, regstack[10]);
1403         }
1404         bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
1405 }
1406
1407 static inline
1408 u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
1409 {
1410         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1411         u16 ret;
1412         unsigned long flags;
1413
1414         local_irq_save(flags);
1415         if (phy->connected) {
1416                 bcm43xx_phy_write(bcm, 0x15, 0xE300);
1417                 control <<= 8;
1418                 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
1419                 udelay(5);
1420                 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
1421                 udelay(2);
1422                 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
1423                 udelay(4);
1424                 bcm43xx_phy_write(bcm, 0x0015, 0xF300);
1425                 udelay(8);
1426         } else {
1427                 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
1428                 udelay(2);
1429                 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
1430                 udelay(4);
1431                 bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
1432                 udelay(8);
1433         }
1434         ret = bcm43xx_phy_read(bcm, 0x002D);
1435         local_irq_restore(flags);
1436         bcm43xx_voluntary_preempt();
1437
1438         return ret;
1439 }
1440
1441 static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
1442 {
1443         int i;
1444         u32 ret = 0;
1445
1446         for (i = 0; i < 8; i++)
1447                 ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
1448
1449         return ret;
1450 }
1451
1452 /* Write the LocalOscillator CONTROL */
1453 static inline
1454 void bcm43xx_lo_write(struct bcm43xx_private *bcm,
1455                       struct bcm43xx_lopair *pair)
1456 {
1457         u16 value;
1458
1459         value = (u8)(pair->low);
1460         value |= ((u8)(pair->high)) << 8;
1461
1462 #ifdef CONFIG_BCM43XX_DEBUG
1463         /* Sanity check. */
1464         if (pair->low < -8 || pair->low > 8 ||
1465             pair->high < -8 || pair->high > 8) {
1466                 printk(KERN_WARNING PFX
1467                        "WARNING: Writing invalid LOpair "
1468                        "(low: %d, high: %d, index: %lu)\n",
1469                        pair->low, pair->high,
1470                        (unsigned long)(pair - bcm43xx_current_phy(bcm)->_lo_pairs));
1471                 dump_stack();
1472         }
1473 #endif
1474
1475         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
1476 }
1477
1478 static inline
1479 struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
1480                                             u16 baseband_attenuation,
1481                                             u16 radio_attenuation,
1482                                             u16 tx)
1483 {
1484         static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
1485         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1486
1487         if (baseband_attenuation > 6)
1488                 baseband_attenuation = 6;
1489         assert(radio_attenuation < 10);
1490
1491         if (tx == 3) {
1492                 return bcm43xx_get_lopair(phy,
1493                                           radio_attenuation,
1494                                           baseband_attenuation);
1495         }
1496         return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
1497 }
1498
1499 static inline
1500 struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
1501 {
1502         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1503
1504         return bcm43xx_find_lopair(bcm,
1505                                    radio->baseband_atten,
1506                                    radio->radio_atten,
1507                                    radio->txctl1);
1508 }
1509
1510 /* Adjust B/G LO */
1511 void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
1512 {
1513         struct bcm43xx_lopair *pair;
1514
1515         if (fixed) {
1516                 /* Use fixed values. Only for initialization. */
1517                 pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
1518         } else
1519                 pair = bcm43xx_current_lopair(bcm);
1520         bcm43xx_lo_write(bcm, pair);
1521 }
1522
1523 static void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
1524 {
1525         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1526         u16 txctl2 = 0, i;
1527         u32 smallest, tmp;
1528
1529         bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1530         udelay(10);
1531         smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1532         for (i = 0; i < 16; i++) {
1533                 bcm43xx_radio_write16(bcm, 0x0052, i);
1534                 udelay(10);
1535                 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1536                 if (tmp < smallest) {
1537                         smallest = tmp;
1538                         txctl2 = i;
1539                 }
1540         }
1541         radio->txctl2 = txctl2;
1542 }
1543
1544 static
1545 void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
1546                             const struct bcm43xx_lopair *in_pair,
1547                             struct bcm43xx_lopair *out_pair,
1548                             u16 r27)
1549 {
1550         static const struct bcm43xx_lopair transitions[8] = {
1551                 { .high =  1,  .low =  1, },
1552                 { .high =  1,  .low =  0, },
1553                 { .high =  1,  .low = -1, },
1554                 { .high =  0,  .low = -1, },
1555                 { .high = -1,  .low = -1, },
1556                 { .high = -1,  .low =  0, },
1557                 { .high = -1,  .low =  1, },
1558                 { .high =  0,  .low =  1, },
1559         };
1560         struct bcm43xx_lopair lowest_transition = {
1561                 .high = in_pair->high,
1562                 .low = in_pair->low,
1563         };
1564         struct bcm43xx_lopair tmp_pair;
1565         struct bcm43xx_lopair transition;
1566         int i = 12;
1567         int state = 0;
1568         int found_lower;
1569         int j, begin, end;
1570         u32 lowest_deviation;
1571         u32 tmp;
1572
1573         /* Note that in_pair and out_pair can point to the same pair. Be careful. */
1574
1575         bcm43xx_lo_write(bcm, &lowest_transition);
1576         lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1577         do {
1578                 found_lower = 0;
1579                 assert(state >= 0 && state <= 8);
1580                 if (state == 0) {
1581                         begin = 1;
1582                         end = 8;
1583                 } else if (state % 2 == 0) {
1584                         begin = state - 1;
1585                         end = state + 1;
1586                 } else {
1587                         begin = state - 2;
1588                         end = state + 2;
1589                 }
1590                 if (begin < 1)
1591                         begin += 8;
1592                 if (end > 8)
1593                         end -= 8;
1594
1595                 j = begin;
1596                 tmp_pair.high = lowest_transition.high;
1597                 tmp_pair.low = lowest_transition.low;
1598                 while (1) {
1599                         assert(j >= 1 && j <= 8);
1600                         transition.high = tmp_pair.high + transitions[j - 1].high;
1601                         transition.low = tmp_pair.low + transitions[j - 1].low;
1602                         if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
1603                                 bcm43xx_lo_write(bcm, &transition);
1604                                 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1605                                 if (tmp < lowest_deviation) {
1606                                         lowest_deviation = tmp;
1607                                         state = j;
1608                                         found_lower = 1;
1609
1610                                         lowest_transition.high = transition.high;
1611                                         lowest_transition.low = transition.low;
1612                                 }
1613                         }
1614                         if (j == end)
1615                                 break;
1616                         if (j == 8)
1617                                 j = 1;
1618                         else
1619                                 j++;
1620                 }
1621         } while (i-- && found_lower);
1622
1623         out_pair->high = lowest_transition.high;
1624         out_pair->low = lowest_transition.low;
1625 }
1626
1627 /* Set the baseband attenuation value on chip. */
1628 void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
1629                                           u16 baseband_attenuation)
1630 {
1631         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1632         u16 value;
1633
1634         if (phy->analog == 0) {
1635                 value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
1636                 value |= (baseband_attenuation & 0x000F);
1637                 bcm43xx_write16(bcm, 0x03E6, value);
1638                 return;
1639         }
1640
1641         if (phy->analog > 1) {
1642                 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
1643                 value |= (baseband_attenuation << 2) & 0x003C;
1644         } else {
1645                 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
1646                 value |= (baseband_attenuation << 3) & 0x0078;
1647         }
1648         bcm43xx_phy_write(bcm, 0x0060, value);
1649 }
1650
1651 /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
1652 void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
1653 {
1654         static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
1655         const int is_initializing = (bcm43xx_status(bcm) == BCM43xx_STAT_INITIALIZING);
1656         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1657         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1658         u16 h, i, oldi = 0, j;
1659         struct bcm43xx_lopair control;
1660         struct bcm43xx_lopair *tmp_control;
1661         u16 tmp;
1662         u16 regstack[16] = { 0 };
1663         u8 oldchannel;
1664
1665         //XXX: What are these?
1666         u8 r27 = 0, r31;
1667
1668         oldchannel = radio->channel;
1669         /* Setup */
1670         if (phy->connected) {
1671                 regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1672                 regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
1673                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1674                 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1675         }
1676         regstack[3] = bcm43xx_read16(bcm, 0x03E2);
1677         bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
1678         regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1679         regstack[5] = bcm43xx_phy_read(bcm, 0x15);
1680         regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
1681         regstack[7] = bcm43xx_phy_read(bcm, 0x35);
1682         regstack[8] = bcm43xx_phy_read(bcm, 0x60);
1683         regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
1684         regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
1685         regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
1686         if (phy->connected) {
1687                 regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
1688                 regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
1689                 regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
1690                 regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
1691         }
1692         bcm43xx_radio_selectchannel(bcm, 6, 0);
1693         if (phy->connected) {
1694                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1695                 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1696                 bcm43xx_dummy_transmission(bcm);
1697         }
1698         bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
1699
1700         bcm43xx_phy_set_baseband_attenuation(bcm, 2);
1701
1702         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
1703         bcm43xx_phy_write(bcm, 0x002E, 0x007F);
1704         bcm43xx_phy_write(bcm, 0x080F, 0x0078);
1705         bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
1706         bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
1707         bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1708         bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1709         if (phy->connected) {
1710                 bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
1711                 bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
1712                 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1713                 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1714         }
1715         if (is_initializing)
1716                 bcm43xx_phy_lo_g_measure_txctl2(bcm);
1717         bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1718
1719         /* Measure */
1720         control.low = 0;
1721         control.high = 0;
1722         for (h = 0; h < 10; h++) {
1723                 /* Loop over each possible RadioAttenuation (0-9) */
1724                 i = pairorder[h];
1725                 if (is_initializing) {
1726                         if (i == 3) {
1727                                 control.low = 0;
1728                                 control.high = 0;
1729                         } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1730                                   ((i % 2 == 0) && (oldi % 2 == 0))) {
1731                                 tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
1732                                 memcpy(&control, tmp_control, sizeof(control));
1733                         } else {
1734                                 tmp_control = bcm43xx_get_lopair(phy, 3, 0);
1735                                 memcpy(&control, tmp_control, sizeof(control));
1736                         }
1737                 }
1738                 /* Loop over each possible BasebandAttenuation/2 */
1739                 for (j = 0; j < 4; j++) {
1740                         if (is_initializing) {
1741                                 tmp = i * 2 + j;
1742                                 r27 = 0;
1743                                 r31 = 0;
1744                                 if (tmp > 14) {
1745                                         r31 = 1;
1746                                         if (tmp > 17)
1747                                                 r27 = 1;
1748                                         if (tmp > 19)
1749                                                 r27 = 2;
1750                                 }
1751                         } else {
1752                                 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1753                                 if (!tmp_control->used)
1754                                         continue;
1755                                 memcpy(&control, tmp_control, sizeof(control));
1756                                 r27 = 3;
1757                                 r31 = 0;
1758                         }
1759                         bcm43xx_radio_write16(bcm, 0x43, i);
1760                         bcm43xx_radio_write16(bcm, 0x52, radio->txctl2);
1761                         udelay(10);
1762                         bcm43xx_voluntary_preempt();
1763
1764                         bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1765
1766                         tmp = (regstack[10] & 0xFFF0);
1767                         if (r31)
1768                                 tmp |= 0x0008;
1769                         bcm43xx_radio_write16(bcm, 0x007A, tmp);
1770
1771                         tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1772                         bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1773                 }
1774                 oldi = i;
1775         }
1776         /* Loop over each possible RadioAttenuation (10-13) */
1777         for (i = 10; i < 14; i++) {
1778                 /* Loop over each possible BasebandAttenuation/2 */
1779                 for (j = 0; j < 4; j++) {
1780                         if (is_initializing) {
1781                                 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1782                                 memcpy(&control, tmp_control, sizeof(control));
1783                                 tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
1784                                 r27 = 0;
1785                                 r31 = 0;
1786                                 if (tmp > 14) {
1787                                         r31 = 1;
1788                                         if (tmp > 17)
1789                                                 r27 = 1;
1790                                         if (tmp > 19)
1791                                                 r27 = 2;
1792                                 }
1793                         } else {
1794                                 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1795                                 if (!tmp_control->used)
1796                                         continue;
1797                                 memcpy(&control, tmp_control, sizeof(control));
1798                                 r27 = 3;
1799                                 r31 = 0;
1800                         }
1801                         bcm43xx_radio_write16(bcm, 0x43, i - 9);
1802                         bcm43xx_radio_write16(bcm, 0x52,
1803                                               radio->txctl2
1804                                               | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
1805                         udelay(10);
1806                         bcm43xx_voluntary_preempt();
1807
1808                         bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1809
1810                         tmp = (regstack[10] & 0xFFF0);
1811                         if (r31)
1812                                 tmp |= 0x0008;
1813                         bcm43xx_radio_write16(bcm, 0x7A, tmp);
1814
1815                         tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1816                         bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1817                 }
1818         }
1819
1820         /* Restoration */
1821         if (phy->connected) {
1822                 bcm43xx_phy_write(bcm, 0x0015, 0xE300);
1823                 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
1824                 udelay(5);
1825                 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
1826                 udelay(2);
1827                 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
1828                 bcm43xx_voluntary_preempt();
1829         } else
1830                 bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
1831         bcm43xx_phy_lo_adjust(bcm, is_initializing);
1832         bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1833         if (phy->connected)
1834                 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1835         else
1836                 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1837         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
1838         bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
1839         bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
1840         bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
1841         bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
1842         bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
1843         bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
1844         regstack[11] &= 0x00F0;
1845         regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
1846         bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
1847         bcm43xx_write16(bcm, 0x03E2, regstack[3]);
1848         if (phy->connected) {
1849                 bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
1850                 bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
1851                 bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
1852                 bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
1853                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
1854                 bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
1855         }
1856         bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
1857
1858 #ifdef CONFIG_BCM43XX_DEBUG
1859         {
1860                 /* Sanity check for all lopairs. */
1861                 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1862                         tmp_control = phy->_lo_pairs + i;
1863                         if (tmp_control->low < -8 || tmp_control->low > 8 ||
1864                             tmp_control->high < -8 || tmp_control->high > 8) {
1865                                 printk(KERN_WARNING PFX
1866                                        "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
1867                                        tmp_control->low, tmp_control->high, i);
1868                         }
1869                 }
1870         }
1871 #endif /* CONFIG_BCM43XX_DEBUG */
1872 }
1873
1874 static
1875 void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
1876 {
1877         struct bcm43xx_lopair *pair;
1878
1879         pair = bcm43xx_current_lopair(bcm);
1880         pair->used = 1;
1881 }
1882
1883 void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
1884 {
1885         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1886         struct bcm43xx_lopair *pair;
1887         int i;
1888
1889         for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1890                 pair = phy->_lo_pairs + i;
1891                 pair->used = 0;
1892         }
1893 }
1894
1895 /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
1896  * This function converts a TSSI value to dBm in Q5.2
1897  */
1898 static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
1899 {
1900         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1901         s8 dbm = 0;
1902         s32 tmp;
1903
1904         tmp = phy->idle_tssi;
1905         tmp += tssi;
1906         tmp -= phy->savedpctlreg;
1907
1908         switch (phy->type) {
1909                 case BCM43xx_PHYTYPE_A:
1910                         tmp += 0x80;
1911                         tmp = limit_value(tmp, 0x00, 0xFF);
1912                         dbm = phy->tssi2dbm[tmp];
1913                         TODO(); //TODO: There's a FIXME on the specs
1914                         break;
1915                 case BCM43xx_PHYTYPE_B:
1916                 case BCM43xx_PHYTYPE_G:
1917                         tmp = limit_value(tmp, 0x00, 0x3F);
1918                         dbm = phy->tssi2dbm[tmp];
1919                         break;
1920                 default:
1921                         assert(0);
1922         }
1923
1924         return dbm;
1925 }
1926
1927 /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
1928 void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
1929 {
1930         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1931         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1932         
1933         if (phy->savedpctlreg == 0xFFFF)
1934                 return;
1935         if ((bcm->board_type == 0x0416) &&
1936             (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
1937                 return;
1938         
1939         switch (phy->type) {
1940         case BCM43xx_PHYTYPE_A: {
1941
1942                 TODO(); //TODO: Nothing for A PHYs yet :-/
1943
1944                 break;
1945         }
1946         case BCM43xx_PHYTYPE_B:
1947         case BCM43xx_PHYTYPE_G: {
1948                 u16 tmp;
1949                 u16 txpower;
1950                 s8 v0, v1, v2, v3;
1951                 s8 average;
1952                 u8 max_pwr;
1953                 s16 desired_pwr, estimated_pwr, pwr_adjust;
1954                 s16 radio_att_delta, baseband_att_delta;
1955                 s16 radio_attenuation, baseband_attenuation;
1956                 unsigned long phylock_flags;
1957
1958                 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
1959                 v0 = (s8)(tmp & 0x00FF);
1960                 v1 = (s8)((tmp & 0xFF00) >> 8);
1961                 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
1962                 v2 = (s8)(tmp & 0x00FF);
1963                 v3 = (s8)((tmp & 0xFF00) >> 8);
1964                 tmp = 0;
1965
1966                 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1967                         tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
1968                         v0 = (s8)(tmp & 0x00FF);
1969                         v1 = (s8)((tmp & 0xFF00) >> 8);
1970                         tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
1971                         v2 = (s8)(tmp & 0x00FF);
1972                         v3 = (s8)((tmp & 0xFF00) >> 8);
1973                         if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1974                                 return;
1975                         v0 = (v0 + 0x20) & 0x3F;
1976                         v1 = (v1 + 0x20) & 0x3F;
1977                         v2 = (v2 + 0x20) & 0x3F;
1978                         v3 = (v3 + 0x20) & 0x3F;
1979                         tmp = 1;
1980                 }
1981                 bcm43xx_radio_clear_tssi(bcm);
1982
1983                 average = (v0 + v1 + v2 + v3 + 2) / 4;
1984
1985                 if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
1986                         average -= 13;
1987
1988                 estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
1989
1990                 max_pwr = bcm->sprom.maxpower_bgphy;
1991
1992                 if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
1993                     (phy->type == BCM43xx_PHYTYPE_G))
1994                         max_pwr -= 0x3;
1995
1996                 /*TODO:
1997                 max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
1998                         where REG is the max power as per the regulatory domain
1999                 */
2000
2001                 desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
2002                 /* Check if we need to adjust the current power. */
2003                 pwr_adjust = desired_pwr - estimated_pwr;
2004                 radio_att_delta = -(pwr_adjust + 7) >> 3;
2005                 baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
2006                 if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
2007                         bcm43xx_phy_lo_mark_current_used(bcm);
2008                         return;
2009                 }
2010
2011                 /* Calculate the new attenuation values. */
2012                 baseband_attenuation = radio->baseband_atten;
2013                 baseband_attenuation += baseband_att_delta;
2014                 radio_attenuation = radio->radio_atten;
2015                 radio_attenuation += radio_att_delta;
2016
2017                 /* Get baseband and radio attenuation values into their permitted ranges.
2018                  * baseband 0-11, radio 0-9.
2019                  * Radio attenuation affects power level 4 times as much as baseband.
2020                  */
2021                 if (radio_attenuation < 0) {
2022                         baseband_attenuation -= (4 * -radio_attenuation);
2023                         radio_attenuation = 0;
2024                 } else if (radio_attenuation > 9) {
2025                         baseband_attenuation += (4 * (radio_attenuation - 9));
2026                         radio_attenuation = 9;
2027                 } else {
2028                         while (baseband_attenuation < 0 && radio_attenuation > 0) {
2029                                 baseband_attenuation += 4;
2030                                 radio_attenuation--;
2031                         }
2032                         while (baseband_attenuation > 11 && radio_attenuation < 9) {
2033                                 baseband_attenuation -= 4;
2034                                 radio_attenuation++;
2035                         }
2036                 }
2037                 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2038
2039                 txpower = radio->txctl1;
2040                 if ((radio->version == 0x2050) && (radio->revision == 2)) {
2041                         if (radio_attenuation <= 1) {
2042                                 if (txpower == 0) {
2043                                         txpower = 3;
2044                                         radio_attenuation += 2;
2045                                         baseband_attenuation += 2;
2046                                 } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
2047                                         baseband_attenuation += 4 * (radio_attenuation - 2);
2048                                         radio_attenuation = 2;
2049                                 }
2050                         } else if (radio_attenuation > 4 && txpower != 0) {
2051                                 txpower = 0;
2052                                 if (baseband_attenuation < 3) {
2053                                         radio_attenuation -= 3;
2054                                         baseband_attenuation += 2;
2055                                 } else {
2056                                         radio_attenuation -= 2;
2057                                         baseband_attenuation -= 2;
2058                                 }
2059                         }
2060                 }
2061                 radio->txctl1 = txpower;
2062                 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2063                 radio_attenuation = limit_value(radio_attenuation, 0, 9);
2064
2065                 bcm43xx_phy_lock(bcm, phylock_flags);
2066                 bcm43xx_radio_lock(bcm);
2067                 bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
2068                                              radio_attenuation, txpower);
2069                 bcm43xx_phy_lo_mark_current_used(bcm);
2070                 bcm43xx_radio_unlock(bcm);
2071                 bcm43xx_phy_unlock(bcm, phylock_flags);
2072                 break;
2073         }
2074         default:
2075                 assert(0);
2076         }
2077 }
2078
2079 static inline
2080 s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
2081 {
2082         if (num < 0)
2083                 return num/den;
2084         else
2085                 return (num+den/2)/den;
2086 }
2087
2088 static inline
2089 s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
2090 {
2091         s32 m1, m2, f = 256, q, delta;
2092         s8 i = 0;
2093         
2094         m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
2095         m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
2096         do {
2097                 if (i > 15)
2098                         return -EINVAL;
2099                 q = bcm43xx_tssi2dbm_ad(f * 4096 -
2100                                         bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
2101                 delta = abs(q - f);
2102                 f = q;
2103                 i++;
2104         } while (delta >= 2);
2105         entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
2106         return 0;
2107 }
2108
2109 /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
2110 int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
2111 {
2112         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2113         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
2114         s16 pab0, pab1, pab2;
2115         u8 idx;
2116         s8 *dyn_tssi2dbm;
2117         
2118         if (phy->type == BCM43xx_PHYTYPE_A) {
2119                 pab0 = (s16)(bcm->sprom.pa1b0);
2120                 pab1 = (s16)(bcm->sprom.pa1b1);
2121                 pab2 = (s16)(bcm->sprom.pa1b2);
2122         } else {
2123                 pab0 = (s16)(bcm->sprom.pa0b0);
2124                 pab1 = (s16)(bcm->sprom.pa0b1);
2125                 pab2 = (s16)(bcm->sprom.pa0b2);
2126         }
2127
2128         if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
2129                 phy->idle_tssi = 0x34;
2130                 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2131                 return 0;
2132         }
2133
2134         if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
2135             pab0 != -1 && pab1 != -1 && pab2 != -1) {
2136                 /* The pabX values are set in SPROM. Use them. */
2137                 if (phy->type == BCM43xx_PHYTYPE_A) {
2138                         if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
2139                             (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
2140                                 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
2141                         else
2142                                 phy->idle_tssi = 62;
2143                 } else {
2144                         if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
2145                             (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
2146                                 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
2147                         else
2148                                 phy->idle_tssi = 62;
2149                 }
2150                 dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
2151                 if (dyn_tssi2dbm == NULL) {
2152                         printk(KERN_ERR PFX "Could not allocate memory "
2153                                             "for tssi2dbm table\n");
2154                         return -ENOMEM;
2155                 }
2156                 for (idx = 0; idx < 64; idx++)
2157                         if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
2158                                 phy->tssi2dbm = NULL;
2159                                 printk(KERN_ERR PFX "Could not generate "
2160                                                     "tssi2dBm table\n");
2161                                 kfree(dyn_tssi2dbm);
2162                                 return -ENODEV;
2163                         }
2164                 phy->tssi2dbm = dyn_tssi2dbm;
2165                 phy->dyn_tssi_tbl = 1;
2166         } else {
2167                 /* pabX values not set in SPROM. */
2168                 switch (phy->type) {
2169                 case BCM43xx_PHYTYPE_A:
2170                         /* APHY needs a generated table. */
2171                         phy->tssi2dbm = NULL;
2172                         printk(KERN_ERR PFX "Could not generate tssi2dBm "
2173                                             "table (wrong SPROM info)!\n");
2174                         return -ENODEV;
2175                 case BCM43xx_PHYTYPE_B:
2176                         phy->idle_tssi = 0x34;
2177                         phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2178                         break;
2179                 case BCM43xx_PHYTYPE_G:
2180                         phy->idle_tssi = 0x34;
2181                         phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
2182                         break;
2183                 }
2184         }
2185
2186         return 0;
2187 }
2188
2189 int bcm43xx_phy_init(struct bcm43xx_private *bcm)
2190 {
2191         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2192         int err = -ENODEV;
2193
2194         switch (phy->type) {
2195         case BCM43xx_PHYTYPE_A:
2196                 if (phy->rev == 2 || phy->rev == 3) {
2197                         bcm43xx_phy_inita(bcm);
2198                         err = 0;
2199                 }
2200                 break;
2201         case BCM43xx_PHYTYPE_B:
2202                 switch (phy->rev) {
2203                 case 2:
2204                         bcm43xx_phy_initb2(bcm);
2205                         err = 0;
2206                         break;
2207                 case 4:
2208                         bcm43xx_phy_initb4(bcm);
2209                         err = 0;
2210                         break;
2211                 case 5:
2212                         bcm43xx_phy_initb5(bcm);
2213                         err = 0;
2214                         break;
2215                 case 6:
2216                         bcm43xx_phy_initb6(bcm);
2217                         err = 0;
2218                         break;
2219                 }
2220                 break;
2221         case BCM43xx_PHYTYPE_G:
2222                 bcm43xx_phy_initg(bcm);
2223                 err = 0;
2224                 break;
2225         }
2226         if (err)
2227                 printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
2228
2229         return err;
2230 }
2231
2232 void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
2233 {
2234         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2235         u16 antennadiv;
2236         u16 offset;
2237         u16 value;
2238         u32 ucodeflags;
2239
2240         antennadiv = phy->antenna_diversity;
2241
2242         if (antennadiv == 0xFFFF)
2243                 antennadiv = 3;
2244         assert(antennadiv <= 3);
2245
2246         ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2247                                         BCM43xx_UCODEFLAGS_OFFSET);
2248         bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2249                             BCM43xx_UCODEFLAGS_OFFSET,
2250                             ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
2251
2252         switch (phy->type) {
2253         case BCM43xx_PHYTYPE_A:
2254         case BCM43xx_PHYTYPE_G:
2255                 if (phy->type == BCM43xx_PHYTYPE_A)
2256                         offset = 0x0000;
2257                 else
2258                         offset = 0x0400;
2259
2260                 if (antennadiv == 2)
2261                         value = (3/*automatic*/ << 7);
2262                 else
2263                         value = (antennadiv << 7);
2264                 bcm43xx_phy_write(bcm, offset + 1,
2265                                   (bcm43xx_phy_read(bcm, offset + 1)
2266                                    & 0x7E7F) | value);
2267
2268                 if (antennadiv >= 2) {
2269                         if (antennadiv == 2)
2270                                 value = (antennadiv << 7);
2271                         else
2272                                 value = (0/*force0*/ << 7);
2273                         bcm43xx_phy_write(bcm, offset + 0x2B,
2274                                           (bcm43xx_phy_read(bcm, offset + 0x2B)
2275                                            & 0xFEFF) | value);
2276                 }
2277
2278                 if (phy->type == BCM43xx_PHYTYPE_G) {
2279                         if (antennadiv >= 2)
2280                                 bcm43xx_phy_write(bcm, 0x048C,
2281                                                   bcm43xx_phy_read(bcm, 0x048C)
2282                                                    | 0x2000);
2283                         else
2284                                 bcm43xx_phy_write(bcm, 0x048C,
2285                                                   bcm43xx_phy_read(bcm, 0x048C)
2286                                                    & ~0x2000);
2287                         if (phy->rev >= 2) {
2288                                 bcm43xx_phy_write(bcm, 0x0461,
2289                                                   bcm43xx_phy_read(bcm, 0x0461)
2290                                                    | 0x0010);
2291                                 bcm43xx_phy_write(bcm, 0x04AD,
2292                                                   (bcm43xx_phy_read(bcm, 0x04AD)
2293                                                    & 0x00FF) | 0x0015);
2294                                 if (phy->rev == 2)
2295                                         bcm43xx_phy_write(bcm, 0x0427, 0x0008);
2296                                 else
2297                                         bcm43xx_phy_write(bcm, 0x0427,
2298                                                 (bcm43xx_phy_read(bcm, 0x0427)
2299                                                  & 0x00FF) | 0x0008);
2300                         }
2301                         else if (phy->rev >= 6)
2302                                 bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
2303                 } else {
2304                         if (phy->rev < 3)
2305                                 bcm43xx_phy_write(bcm, 0x002B,
2306                                                   (bcm43xx_phy_read(bcm, 0x002B)
2307                                                    & 0x00FF) | 0x0024);
2308                         else {
2309                                 bcm43xx_phy_write(bcm, 0x0061,
2310                                                   bcm43xx_phy_read(bcm, 0x0061)
2311                                                    | 0x0010);
2312                                 if (phy->rev == 3) {
2313                                         bcm43xx_phy_write(bcm, 0x0093, 0x001D);
2314                                         bcm43xx_phy_write(bcm, 0x0027, 0x0008);
2315                                 } else {
2316                                         bcm43xx_phy_write(bcm, 0x0093, 0x003A);
2317                                         bcm43xx_phy_write(bcm, 0x0027,
2318                                                 (bcm43xx_phy_read(bcm, 0x0027)
2319                                                  & 0x00FF) | 0x0008);
2320                                 }
2321                         }
2322                 }
2323                 break;
2324         case BCM43xx_PHYTYPE_B:
2325                 if (bcm->current_core->rev == 2)
2326                         value = (3/*automatic*/ << 7);
2327                 else
2328                         value = (antennadiv << 7);
2329                 bcm43xx_phy_write(bcm, 0x03E2,
2330                                   (bcm43xx_phy_read(bcm, 0x03E2)
2331                                    & 0xFE7F) | value);
2332                 break;
2333         default:
2334                 assert(0);
2335         }
2336
2337         if (antennadiv >= 2) {
2338                 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2339                                                 BCM43xx_UCODEFLAGS_OFFSET);
2340                 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2341                                     BCM43xx_UCODEFLAGS_OFFSET,
2342                                     ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
2343         }
2344
2345         phy->antenna_diversity = antennadiv;
2346 }