2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/errno.h>
40 #include <linux/pci.h>
41 #include <linux/interrupt.h>
43 #include "mthca_dev.h"
44 #include "mthca_config_reg.h"
45 #include "mthca_cmd.h"
46 #include "mthca_profile.h"
47 #include "mthca_memfree.h"
48 #include "mthca_wqe.h"
50 MODULE_AUTHOR("Roland Dreier");
51 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
52 MODULE_LICENSE("Dual BSD/GPL");
53 MODULE_VERSION(DRV_VERSION);
55 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
57 int mthca_debug_level = 0;
58 module_param_named(debug_level, mthca_debug_level, int, 0644);
59 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
61 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
66 module_param(msi_x, int, 0444);
67 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
69 #else /* CONFIG_PCI_MSI */
73 #endif /* CONFIG_PCI_MSI */
75 static int tune_pci = 0;
76 module_param(tune_pci, int, 0444);
77 MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
79 DEFINE_MUTEX(mthca_device_mutex);
81 #define MTHCA_DEFAULT_NUM_QP (1 << 16)
82 #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
83 #define MTHCA_DEFAULT_NUM_CQ (1 << 16)
84 #define MTHCA_DEFAULT_NUM_MCG (1 << 13)
85 #define MTHCA_DEFAULT_NUM_MPT (1 << 17)
86 #define MTHCA_DEFAULT_NUM_MTT (1 << 20)
87 #define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
88 #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
89 #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
91 static struct mthca_profile hca_profile = {
92 .num_qp = MTHCA_DEFAULT_NUM_QP,
93 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
94 .num_cq = MTHCA_DEFAULT_NUM_CQ,
95 .num_mcg = MTHCA_DEFAULT_NUM_MCG,
96 .num_mpt = MTHCA_DEFAULT_NUM_MPT,
97 .num_mtt = MTHCA_DEFAULT_NUM_MTT,
98 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
99 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
100 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
103 module_param_named(num_qp, hca_profile.num_qp, int, 0444);
104 MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
106 module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
107 MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
109 module_param_named(num_cq, hca_profile.num_cq, int, 0444);
110 MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
112 module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
113 MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
115 module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
116 MODULE_PARM_DESC(num_mpt,
117 "maximum number of memory protection table entries per HCA");
119 module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
120 MODULE_PARM_DESC(num_mtt,
121 "maximum number of memory translation table segments per HCA");
123 module_param_named(num_udav, hca_profile.num_udav, int, 0444);
124 MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
126 module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
127 MODULE_PARM_DESC(fmr_reserved_mtts,
128 "number of memory translation table segments reserved for FMR");
130 static char mthca_version[] __devinitdata =
131 DRV_NAME ": Mellanox InfiniBand HCA driver v"
132 DRV_VERSION " (" DRV_RELDATE ")\n";
134 static int mthca_tune_pci(struct mthca_dev *mdev)
139 /* First try to max out Read Byte Count */
140 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) {
141 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) {
142 mthca_err(mdev, "Couldn't set PCI-X max read count, "
146 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
147 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
149 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) {
150 if (pcie_set_readrq(mdev->pdev, 4096)) {
151 mthca_err(mdev, "Couldn't write PCI Express read request, "
155 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
156 mthca_info(mdev, "No PCI Express capability, "
157 "not setting Max Read Request Size.\n");
162 static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
167 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
169 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
173 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
174 "aborting.\n", status);
177 if (dev_lim->min_page_sz > PAGE_SIZE) {
178 mthca_err(mdev, "HCA minimum page size of %d bigger than "
179 "kernel PAGE_SIZE of %ld, aborting.\n",
180 dev_lim->min_page_sz, PAGE_SIZE);
183 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
184 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
186 dev_lim->num_ports, MTHCA_MAX_PORTS);
190 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) {
191 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than "
192 "PCI resource 2 size of 0x%llx, aborting.\n",
194 (unsigned long long)pci_resource_len(mdev->pdev, 2));
198 mdev->limits.num_ports = dev_lim->num_ports;
199 mdev->limits.vl_cap = dev_lim->max_vl;
200 mdev->limits.mtu_cap = dev_lim->max_mtu;
201 mdev->limits.gid_table_len = dev_lim->max_gids;
202 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
203 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
205 * Need to allow for worst case send WQE overhead and check
206 * whether max_desc_sz imposes a lower limit than max_sg; UD
207 * send has the biggest overhead.
209 mdev->limits.max_sg = min_t(int, dev_lim->max_sg,
210 (dev_lim->max_desc_sz -
211 sizeof (struct mthca_next_seg) -
212 (mthca_is_memfree(mdev) ?
213 sizeof (struct mthca_arbel_ud_seg) :
214 sizeof (struct mthca_tavor_ud_seg))) /
215 sizeof (struct mthca_data_seg));
216 mdev->limits.max_wqes = dev_lim->max_qp_sz;
217 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
218 mdev->limits.reserved_qps = dev_lim->reserved_qps;
219 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
220 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
221 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
222 mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
223 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
225 * Subtract 1 from the limit because we need to allocate a
226 * spare CQE so the HCA HW can tell the difference between an
227 * empty CQ and a full CQ.
229 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
230 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
231 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
232 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
233 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
234 mdev->limits.reserved_uars = dev_lim->reserved_uars;
235 mdev->limits.reserved_pds = dev_lim->reserved_pds;
236 mdev->limits.port_width_cap = dev_lim->max_port_width;
237 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
238 mdev->limits.flags = dev_lim->flags;
240 * For old FW that doesn't return static rate support, use a
241 * value of 0x3 (only static rate values of 0 or 1 are handled),
242 * except on Sinai, where even old FW can handle static rate
245 if (dev_lim->stat_rate_support)
246 mdev->limits.stat_rate_support = dev_lim->stat_rate_support;
247 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
248 mdev->limits.stat_rate_support = 0xf;
250 mdev->limits.stat_rate_support = 0x3;
252 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
253 May be doable since hardware supports it for SRQ.
255 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
257 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
258 supported by driver. */
259 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
260 IB_DEVICE_PORT_ACTIVE_EVENT |
261 IB_DEVICE_SYS_IMAGE_GUID |
262 IB_DEVICE_RC_RNR_NAK_GEN;
264 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
265 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
267 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
268 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
270 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
271 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
273 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
274 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
276 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
277 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
279 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
280 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
282 if (mthca_is_memfree(mdev))
283 if (dev_lim->flags & DEV_LIM_FLAG_IPOIB_CSUM)
284 mdev->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
289 static int mthca_init_tavor(struct mthca_dev *mdev)
294 struct mthca_dev_lim dev_lim;
295 struct mthca_profile profile;
296 struct mthca_init_hca_param init_hca;
298 err = mthca_SYS_EN(mdev, &status);
300 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
304 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
305 "aborting.\n", status);
309 err = mthca_QUERY_FW(mdev, &status);
311 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
315 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
316 "aborting.\n", status);
320 err = mthca_QUERY_DDR(mdev, &status);
322 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
326 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
327 "aborting.\n", status);
332 err = mthca_dev_lim(mdev, &dev_lim);
334 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
338 profile = hca_profile;
339 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
340 profile.uarc_size = 0;
341 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
342 profile.num_srq = dev_lim.max_srqs;
344 size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
350 err = mthca_INIT_HCA(mdev, &init_hca, &status);
352 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
356 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
357 "aborting.\n", status);
365 mthca_SYS_DIS(mdev, &status);
370 static int mthca_load_fw(struct mthca_dev *mdev)
375 /* FIXME: use HCA-attached memory for FW if present */
377 mdev->fw.arbel.fw_icm =
378 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
379 GFP_HIGHUSER | __GFP_NOWARN, 0);
380 if (!mdev->fw.arbel.fw_icm) {
381 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
385 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
387 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
391 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
395 err = mthca_RUN_FW(mdev, &status);
397 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
401 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
409 mthca_UNMAP_FA(mdev, &status);
412 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
416 static int mthca_init_icm(struct mthca_dev *mdev,
417 struct mthca_dev_lim *dev_lim,
418 struct mthca_init_hca_param *init_hca,
425 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
427 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
431 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
432 "aborting.\n", status);
436 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
437 (unsigned long long) icm_size >> 10,
438 (unsigned long long) aux_pages << 2);
440 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
441 GFP_HIGHUSER | __GFP_NOWARN, 0);
442 if (!mdev->fw.arbel.aux_icm) {
443 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
447 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
449 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
453 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
458 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
460 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
464 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
465 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE,
466 dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE;
468 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
470 mdev->limits.num_mtt_segs,
471 mdev->limits.reserved_mtts,
473 if (!mdev->mr_table.mtt_table) {
474 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
479 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
480 dev_lim->mpt_entry_sz,
481 mdev->limits.num_mpts,
482 mdev->limits.reserved_mrws,
484 if (!mdev->mr_table.mpt_table) {
485 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
490 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
491 dev_lim->qpc_entry_sz,
492 mdev->limits.num_qps,
493 mdev->limits.reserved_qps,
495 if (!mdev->qp_table.qp_table) {
496 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
501 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
502 dev_lim->eqpc_entry_sz,
503 mdev->limits.num_qps,
504 mdev->limits.reserved_qps,
506 if (!mdev->qp_table.eqp_table) {
507 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
512 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
513 MTHCA_RDB_ENTRY_SIZE,
514 mdev->limits.num_qps <<
515 mdev->qp_table.rdb_shift, 0,
517 if (!mdev->qp_table.rdb_table) {
518 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
523 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
524 dev_lim->cqc_entry_sz,
525 mdev->limits.num_cqs,
526 mdev->limits.reserved_cqs,
528 if (!mdev->cq_table.table) {
529 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
534 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
535 mdev->srq_table.table =
536 mthca_alloc_icm_table(mdev, init_hca->srqc_base,
537 dev_lim->srq_entry_sz,
538 mdev->limits.num_srqs,
539 mdev->limits.reserved_srqs,
541 if (!mdev->srq_table.table) {
542 mthca_err(mdev, "Failed to map SRQ context memory, "
550 * It's not strictly required, but for simplicity just map the
551 * whole multicast group table now. The table isn't very big
552 * and it's a lot easier than trying to track ref counts.
554 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
555 MTHCA_MGM_ENTRY_SIZE,
556 mdev->limits.num_mgms +
557 mdev->limits.num_amgms,
558 mdev->limits.num_mgms +
559 mdev->limits.num_amgms,
561 if (!mdev->mcg_table.table) {
562 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
570 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
571 mthca_free_icm_table(mdev, mdev->srq_table.table);
574 mthca_free_icm_table(mdev, mdev->cq_table.table);
577 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
580 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
583 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
586 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
589 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
592 mthca_unmap_eq_icm(mdev);
595 mthca_UNMAP_ICM_AUX(mdev, &status);
598 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
603 static void mthca_free_icms(struct mthca_dev *mdev)
607 mthca_free_icm_table(mdev, mdev->mcg_table.table);
608 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
609 mthca_free_icm_table(mdev, mdev->srq_table.table);
610 mthca_free_icm_table(mdev, mdev->cq_table.table);
611 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
612 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
613 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
614 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
615 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
616 mthca_unmap_eq_icm(mdev);
618 mthca_UNMAP_ICM_AUX(mdev, &status);
619 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
622 static int mthca_init_arbel(struct mthca_dev *mdev)
624 struct mthca_dev_lim dev_lim;
625 struct mthca_profile profile;
626 struct mthca_init_hca_param init_hca;
631 err = mthca_QUERY_FW(mdev, &status);
633 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
637 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
638 "aborting.\n", status);
642 err = mthca_ENABLE_LAM(mdev, &status);
644 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
647 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
648 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
649 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
651 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
652 "aborting.\n", status);
656 err = mthca_load_fw(mdev);
658 mthca_err(mdev, "Failed to start FW, aborting.\n");
662 err = mthca_dev_lim(mdev, &dev_lim);
664 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
668 profile = hca_profile;
669 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
670 profile.num_udav = 0;
671 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
672 profile.num_srq = dev_lim.max_srqs;
674 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
680 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
684 err = mthca_INIT_HCA(mdev, &init_hca, &status);
686 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
690 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
691 "aborting.\n", status);
699 mthca_free_icms(mdev);
702 mthca_UNMAP_FA(mdev, &status);
703 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
706 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
707 mthca_DISABLE_LAM(mdev, &status);
712 static void mthca_close_hca(struct mthca_dev *mdev)
716 mthca_CLOSE_HCA(mdev, 0, &status);
718 if (mthca_is_memfree(mdev)) {
719 mthca_free_icms(mdev);
721 mthca_UNMAP_FA(mdev, &status);
722 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
724 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
725 mthca_DISABLE_LAM(mdev, &status);
727 mthca_SYS_DIS(mdev, &status);
730 static int mthca_init_hca(struct mthca_dev *mdev)
734 struct mthca_adapter adapter;
736 if (mthca_is_memfree(mdev))
737 err = mthca_init_arbel(mdev);
739 err = mthca_init_tavor(mdev);
744 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
746 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
750 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
751 "aborting.\n", status);
756 mdev->eq_table.inta_pin = adapter.inta_pin;
757 if (!mthca_is_memfree(mdev))
758 mdev->rev_id = adapter.revision_id;
759 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
764 mthca_close_hca(mdev);
768 static int mthca_setup_hca(struct mthca_dev *dev)
773 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
775 err = mthca_init_uar_table(dev);
777 mthca_err(dev, "Failed to initialize "
778 "user access region table, aborting.\n");
782 err = mthca_uar_alloc(dev, &dev->driver_uar);
784 mthca_err(dev, "Failed to allocate driver access region, "
786 goto err_uar_table_free;
789 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
791 mthca_err(dev, "Couldn't map kernel access region, "
797 err = mthca_init_pd_table(dev);
799 mthca_err(dev, "Failed to initialize "
800 "protection domain table, aborting.\n");
804 err = mthca_init_mr_table(dev);
806 mthca_err(dev, "Failed to initialize "
807 "memory region table, aborting.\n");
808 goto err_pd_table_free;
811 err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
813 mthca_err(dev, "Failed to create driver PD, "
815 goto err_mr_table_free;
818 err = mthca_init_eq_table(dev);
820 mthca_err(dev, "Failed to initialize "
821 "event queue table, aborting.\n");
825 err = mthca_cmd_use_events(dev);
827 mthca_err(dev, "Failed to switch to event-driven "
828 "firmware commands, aborting.\n");
829 goto err_eq_table_free;
832 err = mthca_NOP(dev, &status);
834 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) {
835 mthca_warn(dev, "NOP command failed to generate interrupt "
837 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector);
838 mthca_warn(dev, "Trying again with MSI-X disabled.\n");
840 mthca_err(dev, "NOP command failed to generate interrupt "
841 "(IRQ %d), aborting.\n",
843 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
849 mthca_dbg(dev, "NOP command IRQ test passed\n");
851 err = mthca_init_cq_table(dev);
853 mthca_err(dev, "Failed to initialize "
854 "completion queue table, aborting.\n");
858 err = mthca_init_srq_table(dev);
860 mthca_err(dev, "Failed to initialize "
861 "shared receive queue table, aborting.\n");
862 goto err_cq_table_free;
865 err = mthca_init_qp_table(dev);
867 mthca_err(dev, "Failed to initialize "
868 "queue pair table, aborting.\n");
869 goto err_srq_table_free;
872 err = mthca_init_av_table(dev);
874 mthca_err(dev, "Failed to initialize "
875 "address vector table, aborting.\n");
876 goto err_qp_table_free;
879 err = mthca_init_mcg_table(dev);
881 mthca_err(dev, "Failed to initialize "
882 "multicast group table, aborting.\n");
883 goto err_av_table_free;
889 mthca_cleanup_av_table(dev);
892 mthca_cleanup_qp_table(dev);
895 mthca_cleanup_srq_table(dev);
898 mthca_cleanup_cq_table(dev);
901 mthca_cmd_use_polling(dev);
904 mthca_cleanup_eq_table(dev);
907 mthca_pd_free(dev, &dev->driver_pd);
910 mthca_cleanup_mr_table(dev);
913 mthca_cleanup_pd_table(dev);
919 mthca_uar_free(dev, &dev->driver_uar);
922 mthca_cleanup_uar_table(dev);
926 static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden)
931 * We can't just use pci_request_regions() because the MSI-X
932 * table is right in the middle of the first BAR. If we did
933 * pci_request_region and grab all of the first BAR, then
934 * setting up MSI-X would fail, since the PCI core wants to do
935 * request_mem_region on the MSI-X vector table.
937 * So just request what we need right now, and request any
938 * other regions we need when setting up EQs.
940 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
941 MTHCA_HCR_SIZE, DRV_NAME))
944 err = pci_request_region(pdev, 2, DRV_NAME);
946 goto err_bar2_failed;
949 err = pci_request_region(pdev, 4, DRV_NAME);
951 goto err_bar4_failed;
957 pci_release_region(pdev, 2);
960 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
966 static void mthca_release_regions(struct pci_dev *pdev,
970 pci_release_region(pdev, 4);
972 pci_release_region(pdev, 2);
974 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
978 static int mthca_enable_msi_x(struct mthca_dev *mdev)
980 struct msix_entry entries[3];
983 entries[0].entry = 0;
984 entries[1].entry = 1;
985 entries[2].entry = 2;
987 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
990 mthca_info(mdev, "Only %d MSI-X vectors available, "
991 "not using MSI-X\n", err);
995 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
996 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
997 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
1002 /* Types of supported HCA */
1004 TAVOR, /* MT23108 */
1005 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
1006 ARBEL_NATIVE, /* MT25208 with extended features */
1010 #define MTHCA_FW_VER(major, minor, subminor) \
1011 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
1016 } mthca_hca_table[] = {
1017 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0),
1019 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200),
1020 .flags = MTHCA_FLAG_PCIE },
1021 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 3, 0),
1022 .flags = MTHCA_FLAG_MEMFREE |
1024 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0),
1025 .flags = MTHCA_FLAG_MEMFREE |
1027 MTHCA_FLAG_SINAI_OPT }
1030 static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
1034 struct mthca_dev *mdev;
1036 printk(KERN_INFO PFX "Initializing %s\n",
1039 err = pci_enable_device(pdev);
1041 dev_err(&pdev->dev, "Cannot enable PCI device, "
1047 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
1050 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
1051 pci_resource_len(pdev, 0) != 1 << 20) {
1052 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
1054 goto err_disable_pdev;
1056 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1057 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1059 goto err_disable_pdev;
1061 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
1064 err = mthca_request_regions(pdev, ddr_hidden);
1066 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
1068 goto err_disable_pdev;
1071 pci_set_master(pdev);
1073 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1075 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1076 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1078 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1082 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1084 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1085 "consistent PCI DMA mask.\n");
1086 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1088 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1094 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
1096 dev_err(&pdev->dev, "Device struct alloc failed, "
1104 mdev->mthca_flags = mthca_hca_table[hca_type].flags;
1106 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
1109 * Now reset the HCA before we touch the PCI capabilities or
1110 * attempt a firmware command, since a boot ROM may have left
1111 * the HCA in an undefined state.
1113 err = mthca_reset(mdev);
1115 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
1119 if (mthca_cmd_init(mdev)) {
1120 mthca_err(mdev, "Failed to init command interface, aborting.\n");
1124 err = mthca_tune_pci(mdev);
1128 err = mthca_init_hca(mdev);
1132 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) {
1133 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n",
1134 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1135 (int) (mdev->fw_ver & 0xffff),
1136 (int) (mthca_hca_table[hca_type].latest_fw >> 32),
1137 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff,
1138 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff));
1139 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1142 if (msi_x && !mthca_enable_msi_x(mdev))
1143 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1145 err = mthca_setup_hca(mdev);
1146 if (err == -EBUSY && (mdev->mthca_flags & MTHCA_FLAG_MSI_X)) {
1147 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1148 pci_disable_msix(pdev);
1149 mdev->mthca_flags &= ~MTHCA_FLAG_MSI_X;
1151 err = mthca_setup_hca(mdev);
1157 err = mthca_register_device(mdev);
1161 err = mthca_create_agents(mdev);
1163 goto err_unregister;
1165 pci_set_drvdata(pdev, mdev);
1166 mdev->hca_type = hca_type;
1171 mthca_unregister_device(mdev);
1174 mthca_cleanup_mcg_table(mdev);
1175 mthca_cleanup_av_table(mdev);
1176 mthca_cleanup_qp_table(mdev);
1177 mthca_cleanup_srq_table(mdev);
1178 mthca_cleanup_cq_table(mdev);
1179 mthca_cmd_use_polling(mdev);
1180 mthca_cleanup_eq_table(mdev);
1182 mthca_pd_free(mdev, &mdev->driver_pd);
1184 mthca_cleanup_mr_table(mdev);
1185 mthca_cleanup_pd_table(mdev);
1186 mthca_cleanup_uar_table(mdev);
1189 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1190 pci_disable_msix(pdev);
1192 mthca_close_hca(mdev);
1195 mthca_cmd_cleanup(mdev);
1198 ib_dealloc_device(&mdev->ib_dev);
1201 mthca_release_regions(pdev, ddr_hidden);
1204 pci_disable_device(pdev);
1205 pci_set_drvdata(pdev, NULL);
1209 static void __mthca_remove_one(struct pci_dev *pdev)
1211 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1216 mthca_free_agents(mdev);
1217 mthca_unregister_device(mdev);
1219 for (p = 1; p <= mdev->limits.num_ports; ++p)
1220 mthca_CLOSE_IB(mdev, p, &status);
1222 mthca_cleanup_mcg_table(mdev);
1223 mthca_cleanup_av_table(mdev);
1224 mthca_cleanup_qp_table(mdev);
1225 mthca_cleanup_srq_table(mdev);
1226 mthca_cleanup_cq_table(mdev);
1227 mthca_cmd_use_polling(mdev);
1228 mthca_cleanup_eq_table(mdev);
1230 mthca_pd_free(mdev, &mdev->driver_pd);
1232 mthca_cleanup_mr_table(mdev);
1233 mthca_cleanup_pd_table(mdev);
1236 mthca_uar_free(mdev, &mdev->driver_uar);
1237 mthca_cleanup_uar_table(mdev);
1238 mthca_close_hca(mdev);
1239 mthca_cmd_cleanup(mdev);
1241 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1242 pci_disable_msix(pdev);
1244 ib_dealloc_device(&mdev->ib_dev);
1245 mthca_release_regions(pdev, mdev->mthca_flags &
1246 MTHCA_FLAG_DDR_HIDDEN);
1247 pci_disable_device(pdev);
1248 pci_set_drvdata(pdev, NULL);
1252 int __mthca_restart_one(struct pci_dev *pdev)
1254 struct mthca_dev *mdev;
1257 mdev = pci_get_drvdata(pdev);
1260 hca_type = mdev->hca_type;
1261 __mthca_remove_one(pdev);
1262 return __mthca_init_one(pdev, hca_type);
1265 static int __devinit mthca_init_one(struct pci_dev *pdev,
1266 const struct pci_device_id *id)
1268 static int mthca_version_printed = 0;
1271 mutex_lock(&mthca_device_mutex);
1273 if (!mthca_version_printed) {
1274 printk(KERN_INFO "%s", mthca_version);
1275 ++mthca_version_printed;
1278 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
1279 printk(KERN_ERR PFX "%s has invalid driver data %lx\n",
1280 pci_name(pdev), id->driver_data);
1281 mutex_unlock(&mthca_device_mutex);
1285 ret = __mthca_init_one(pdev, id->driver_data);
1287 mutex_unlock(&mthca_device_mutex);
1292 static void __devexit mthca_remove_one(struct pci_dev *pdev)
1294 mutex_lock(&mthca_device_mutex);
1295 __mthca_remove_one(pdev);
1296 mutex_unlock(&mthca_device_mutex);
1299 static struct pci_device_id mthca_pci_table[] = {
1300 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1301 .driver_data = TAVOR },
1302 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1303 .driver_data = TAVOR },
1304 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1305 .driver_data = ARBEL_COMPAT },
1306 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1307 .driver_data = ARBEL_COMPAT },
1308 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1309 .driver_data = ARBEL_NATIVE },
1310 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1311 .driver_data = ARBEL_NATIVE },
1312 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1313 .driver_data = SINAI },
1314 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1315 .driver_data = SINAI },
1316 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1317 .driver_data = SINAI },
1318 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1319 .driver_data = SINAI },
1323 MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1325 static struct pci_driver mthca_driver = {
1327 .id_table = mthca_pci_table,
1328 .probe = mthca_init_one,
1329 .remove = __devexit_p(mthca_remove_one)
1332 static void __init __mthca_check_profile_val(const char *name, int *pval,
1335 /* value must be positive and power of 2 */
1336 int old_pval = *pval;
1339 *pval = pval_default;
1341 *pval = roundup_pow_of_two(old_pval);
1343 if (old_pval != *pval) {
1344 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
1346 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
1350 #define mthca_check_profile_val(name, default) \
1351 __mthca_check_profile_val(#name, &hca_profile.name, default)
1353 static void __init mthca_validate_profile(void)
1355 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
1356 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
1357 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
1358 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
1359 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
1360 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
1361 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
1362 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
1364 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
1365 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
1366 hca_profile.fmr_reserved_mtts);
1367 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
1368 hca_profile.num_mtt);
1369 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
1370 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
1371 hca_profile.fmr_reserved_mtts);
1375 static int __init mthca_init(void)
1379 mthca_validate_profile();
1381 ret = mthca_catas_init();
1385 ret = pci_register_driver(&mthca_driver);
1387 mthca_catas_cleanup();
1394 static void __exit mthca_cleanup(void)
1396 pci_unregister_driver(&mthca_driver);
1397 mthca_catas_cleanup();
1400 module_init(mthca_init);
1401 module_exit(mthca_cleanup);