2 * Common interrupt code for 32 and 64 bit
5 #include <linux/interrupt.h>
6 #include <linux/kernel_stat.h>
7 #include <linux/seq_file.h>
9 #include <linux/ftrace.h>
12 #include <asm/io_apic.h>
15 #include <asm/hw_irq.h>
17 atomic_t irq_err_count;
19 /* Function pointer for generic interrupt vector handling */
20 void (*generic_interrupt_extension)(void) = NULL;
23 * 'what should we do if we get a hw irq event on an illegal vector'.
24 * each architecture has to answer this themselves.
26 void ack_bad_irq(unsigned int irq)
28 if (printk_ratelimit())
29 pr_err("unexpected IRQ trap at vector %02x\n", irq);
32 * Currently unexpected vectors happen only on SMP and APIC.
33 * We _must_ ack these because every local APIC has only N
34 * irq slots per priority level, and a 'hanging, unacked' IRQ
35 * holds up an irq slot - in excessive cases (when multiple
36 * unexpected vectors occur) that might lock up the APIC
38 * But only ack when the APIC is enabled -AK
43 #define irq_stats(x) (&per_cpu(irq_stat, x))
45 * /proc/interrupts printing:
47 static int show_other_interrupts(struct seq_file *p, int prec)
51 seq_printf(p, "%*s: ", prec, "NMI");
52 for_each_online_cpu(j)
53 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
54 seq_printf(p, " Non-maskable interrupts\n");
55 #ifdef CONFIG_X86_LOCAL_APIC
56 seq_printf(p, "%*s: ", prec, "LOC");
57 for_each_online_cpu(j)
58 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
59 seq_printf(p, " Local timer interrupts\n");
61 seq_printf(p, "%*s: ", prec, "SPU");
62 for_each_online_cpu(j)
63 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
64 seq_printf(p, " Spurious interrupts\n");
65 seq_printf(p, "%*s: ", prec, "CNT");
66 for_each_online_cpu(j)
67 seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
68 seq_printf(p, " Performance counter interrupts\n");
69 seq_printf(p, "%*s: ", prec, "PND");
70 for_each_online_cpu(j)
71 seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs);
72 seq_printf(p, " Performance pending work\n");
74 if (generic_interrupt_extension) {
75 seq_printf(p, "%*s: ", prec, "PLT");
76 for_each_online_cpu(j)
77 seq_printf(p, "%10u ", irq_stats(j)->generic_irqs);
78 seq_printf(p, " Platform interrupts\n");
81 seq_printf(p, "%*s: ", prec, "RES");
82 for_each_online_cpu(j)
83 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
84 seq_printf(p, " Rescheduling interrupts\n");
85 seq_printf(p, "%*s: ", prec, "CAL");
86 for_each_online_cpu(j)
87 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
88 seq_printf(p, " Function call interrupts\n");
89 seq_printf(p, "%*s: ", prec, "TLB");
90 for_each_online_cpu(j)
91 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
92 seq_printf(p, " TLB shootdowns\n");
95 seq_printf(p, "%*s: ", prec, "TRM");
96 for_each_online_cpu(j)
97 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
98 seq_printf(p, " Thermal event interrupts\n");
100 seq_printf(p, "%*s: ", prec, "THR");
101 for_each_online_cpu(j)
102 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
103 seq_printf(p, " Threshold APIC interrupts\n");
106 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
107 #if defined(CONFIG_X86_IO_APIC)
108 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
113 int show_interrupts(struct seq_file *p, void *v)
115 unsigned long flags, any_count = 0;
116 int i = *(loff_t *) v, j, prec;
117 struct irqaction *action;
118 struct irq_desc *desc;
123 for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
127 return show_other_interrupts(p, prec);
131 seq_printf(p, "%*s", prec + 8, "");
132 for_each_online_cpu(j)
133 seq_printf(p, "CPU%-8d", j);
137 desc = irq_to_desc(i);
141 spin_lock_irqsave(&desc->lock, flags);
142 for_each_online_cpu(j)
143 any_count |= kstat_irqs_cpu(i, j);
144 action = desc->action;
145 if (!action && !any_count)
148 seq_printf(p, "%*d: ", prec, i);
149 for_each_online_cpu(j)
150 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
151 seq_printf(p, " %8s", desc->chip->name);
152 seq_printf(p, "-%-8s", desc->name);
155 seq_printf(p, " %s", action->name);
156 while ((action = action->next) != NULL)
157 seq_printf(p, ", %s", action->name);
162 spin_unlock_irqrestore(&desc->lock, flags);
169 u64 arch_irq_stat_cpu(unsigned int cpu)
171 u64 sum = irq_stats(cpu)->__nmi_count;
173 #ifdef CONFIG_X86_LOCAL_APIC
174 sum += irq_stats(cpu)->apic_timer_irqs;
175 sum += irq_stats(cpu)->irq_spurious_count;
176 sum += irq_stats(cpu)->apic_perf_irqs;
177 sum += irq_stats(cpu)->apic_pending_irqs;
179 if (generic_interrupt_extension)
180 sum += irq_stats(cpu)->generic_irqs;
182 sum += irq_stats(cpu)->irq_resched_count;
183 sum += irq_stats(cpu)->irq_call_count;
184 sum += irq_stats(cpu)->irq_tlb_count;
186 #ifdef CONFIG_X86_MCE
187 sum += irq_stats(cpu)->irq_thermal_count;
188 # ifdef CONFIG_X86_64
189 sum += irq_stats(cpu)->irq_threshold_count;
195 u64 arch_irq_stat(void)
197 u64 sum = atomic_read(&irq_err_count);
199 #ifdef CONFIG_X86_IO_APIC
200 sum += atomic_read(&irq_mis_count);
207 * do_IRQ handles all normal device IRQ's (the special
208 * SMP cross-CPU interrupts have their own specific
211 unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
213 struct pt_regs *old_regs = set_irq_regs(regs);
215 /* high bit used in ret_from_ code */
216 unsigned vector = ~regs->orig_ax;
222 irq = __get_cpu_var(vector_irq)[vector];
224 if (!handle_irq(irq, regs)) {
227 if (printk_ratelimit())
228 pr_emerg("%s: %d.%d No irq handler for vector (irq %d)\n",
229 __func__, smp_processor_id(), vector, irq);
234 set_irq_regs(old_regs);
239 * Handler for GENERIC_INTERRUPT_VECTOR.
241 void smp_generic_interrupt(struct pt_regs *regs)
243 struct pt_regs *old_regs = set_irq_regs(regs);
251 inc_irq_stat(generic_irqs);
253 if (generic_interrupt_extension)
254 generic_interrupt_extension();
258 set_irq_regs(old_regs);
261 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);