git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "iwl-3945-core.h"
  43 #include "iwl-3945.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-3945-rs.h"
  46
  47 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  48         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  49                                     IWL_RATE_##r##M_IEEE,   \
  50                                     IWL_RATE_##ip##M_INDEX, \
  51                                     IWL_RATE_##in##M_INDEX, \
  52                                     IWL_RATE_##rp##M_INDEX, \
  53                                     IWL_RATE_##rn##M_INDEX, \
  54                                     IWL_RATE_##pp##M_INDEX, \
  55                                     IWL_RATE_##np##M_INDEX, \
  56                                     IWL_RATE_##r##M_INDEX_TABLE, \
  57                                     IWL_RATE_##ip##M_INDEX_TABLE }
  58
  59 /*
  60  * Parameter order:
  61  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  62  *
  63  * If there isn't a valid next or previous rate then INV is used which
  64  * maps to IWL_RATE_INVALID
  65  *
  66  */
  67 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  68         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  69         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  70         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  71         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  72         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  73         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  74         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  75         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  76         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  77         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  78         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  79         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  80 };
  81
  82 /* 1 = enable the iwl3945_disable_events() function */
  83 #define IWL_EVT_DISABLE (0)
  84 #define IWL_EVT_DISABLE_SIZE (1532/32)
  85
  86 /**
  87  * iwl3945_disable_events - Disable selected events in uCode event log
  88  *
  89  * Disable an event by writing "1"s into "disable"
  90  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  91  *   Default values of 0 enable uCode events to be logged.
  92  * Use for only special debugging.  This function is just a placeholder as-is,
  93  *   you'll need to provide the special bits! ...
  94  *   ... and set IWL_EVT_DISABLE to 1. */
  95 void iwl3945_disable_events(struct iwl3945_priv *priv)
  96 {
  97         int ret;
  98         int i;
  99         u32 base;               /* SRAM address of event log header */
 100         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 101         u32 array_size;         /* # of u32 entries in array */
 102         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 103                 0x00000000,     /*   31 -    0  Event id numbers */
 104                 0x00000000,     /*   63 -   32 */
 105                 0x00000000,     /*   95 -   64 */
 106                 0x00000000,     /*  127 -   96 */
 107                 0x00000000,     /*  159 -  128 */
 108                 0x00000000,     /*  191 -  160 */
 109                 0x00000000,     /*  223 -  192 */
 110                 0x00000000,     /*  255 -  224 */
 111                 0x00000000,     /*  287 -  256 */
 112                 0x00000000,     /*  319 -  288 */
 113                 0x00000000,     /*  351 -  320 */
 114                 0x00000000,     /*  383 -  352 */
 115                 0x00000000,     /*  415 -  384 */
 116                 0x00000000,     /*  447 -  416 */
 117                 0x00000000,     /*  479 -  448 */
 118                 0x00000000,     /*  511 -  480 */
 119                 0x00000000,     /*  543 -  512 */
 120                 0x00000000,     /*  575 -  544 */
 121                 0x00000000,     /*  607 -  576 */
 122                 0x00000000,     /*  639 -  608 */
 123                 0x00000000,     /*  671 -  640 */
 124                 0x00000000,     /*  703 -  672 */
 125                 0x00000000,     /*  735 -  704 */
 126                 0x00000000,     /*  767 -  736 */
 127                 0x00000000,     /*  799 -  768 */
 128                 0x00000000,     /*  831 -  800 */
 129                 0x00000000,     /*  863 -  832 */
 130                 0x00000000,     /*  895 -  864 */
 131                 0x00000000,     /*  927 -  896 */
 132                 0x00000000,     /*  959 -  928 */
 133                 0x00000000,     /*  991 -  960 */
 134                 0x00000000,     /* 1023 -  992 */
 135                 0x00000000,     /* 1055 - 1024 */
 136                 0x00000000,     /* 1087 - 1056 */
 137                 0x00000000,     /* 1119 - 1088 */
 138                 0x00000000,     /* 1151 - 1120 */
 139                 0x00000000,     /* 1183 - 1152 */
 140                 0x00000000,     /* 1215 - 1184 */
 141                 0x00000000,     /* 1247 - 1216 */
 142                 0x00000000,     /* 1279 - 1248 */
 143                 0x00000000,     /* 1311 - 1280 */
 144                 0x00000000,     /* 1343 - 1312 */
 145                 0x00000000,     /* 1375 - 1344 */
 146                 0x00000000,     /* 1407 - 1376 */
 147                 0x00000000,     /* 1439 - 1408 */
 148                 0x00000000,     /* 1471 - 1440 */
 149                 0x00000000,     /* 1503 - 1472 */
 150         };
 151
 152         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 153         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 154                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 155                 return;
 156         }
 157
 158         ret = iwl3945_grab_nic_access(priv);
 159         if (ret) {
 160                 IWL_WARNING("Can not read from adapter at this time.\n");
 161                 return;
 162         }
 163
 164         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 165         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 166         iwl3945_release_nic_access(priv);
 167
 168         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 169                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 170                                disable_ptr);
 171                 ret = iwl3945_grab_nic_access(priv);
 172                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 173                         iwl3945_write_targ_mem(priv,
 174                                            disable_ptr + (i * sizeof(u32)),
 175                                            evt_disable[i]);
 176
 177                 iwl3945_release_nic_access(priv);
 178         } else {
 179                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 180                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 181                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 182                                disable_ptr, array_size);
 183         }
 184
 185 }
 186
 187 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 188 {
 189         int idx;
 190
 191         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 192                 if (iwl3945_rates[idx].plcp == plcp)
 193                         return idx;
 194         return -1;
 195 }
 196
 197 /**
 198  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 199  * @priv: eeprom and antenna fields are used to determine antenna flags
 200  *
 201  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 202  * priv->antenna specifies the antenna diversity mode:
 203  *
 204  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 205  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 206  * IWL_ANTENNA_AUX       - Force AUX antenna
 207  */
 208 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 209 {
 210         switch (priv->antenna) {
 211         case IWL_ANTENNA_DIVERSITY:
 212                 return 0;
 213
 214         case IWL_ANTENNA_MAIN:
 215                 if (priv->eeprom.antenna_switch_type)
 216                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 217                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 218
 219         case IWL_ANTENNA_AUX:
 220                 if (priv->eeprom.antenna_switch_type)
 221                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 222                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 223         }
 224
 225         /* bad antenna selector value */
 226         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 227         return 0;               /* "diversity" is default if error */
 228 }
 229
 230 #ifdef CONFIG_IWL3945_DEBUG
 231 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 232
 233 static const char *iwl3945_get_tx_fail_reason(u32 status)
 234 {
 235         switch (status & TX_STATUS_MSK) {
 236         case TX_STATUS_SUCCESS:
 237                 return "SUCCESS";
 238                 TX_STATUS_ENTRY(SHORT_LIMIT);
 239                 TX_STATUS_ENTRY(LONG_LIMIT);
 240                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 241                 TX_STATUS_ENTRY(MGMNT_ABORT);
 242                 TX_STATUS_ENTRY(NEXT_FRAG);
 243                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 244                 TX_STATUS_ENTRY(DEST_PS);
 245                 TX_STATUS_ENTRY(ABORTED);
 246                 TX_STATUS_ENTRY(BT_RETRY);
 247                 TX_STATUS_ENTRY(STA_INVALID);
 248                 TX_STATUS_ENTRY(FRAG_DROPPED);
 249                 TX_STATUS_ENTRY(TID_DISABLE);
 250                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 251                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 252                 TX_STATUS_ENTRY(TX_LOCKED);
 253                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 254         }
 255
 256         return "UNKNOWN";
 257 }
 258 #else
 259 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 260 {
 261         return "";
 262 }
 263 #endif
 264
 265
 266 /**
 267  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 268  *
 269  * When FW advances 'R' index, all entries between old and new 'R' index
 270  * need to be reclaimed. As result, some free space forms. If there is
 271  * enough free space (> low mark), wake the stack that feeds us.
 272  */
 273 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 274                                      int txq_id, int index)
 275 {
 276         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 277         struct iwl3945_queue *q = &txq->q;
 278         struct iwl3945_tx_info *tx_info;
 279
 280         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 281
 282         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 283                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 284
 285                 tx_info = &txq->txb[txq->q.read_ptr];
 286                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 287                 tx_info->skb[0] = NULL;
 288                 iwl3945_hw_txq_free_tfd(priv, txq);
 289         }
 290
 291         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 292                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 293                         priv->mac80211_registered)
 294                 ieee80211_wake_queue(priv->hw, txq_id);
 295 }
 296
 297 /**
 298  * iwl3945_rx_reply_tx - Handle Tx response
 299  */
 300 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 301                             struct iwl3945_rx_mem_buffer *rxb)
 302 {
 303         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 304         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 305         int txq_id = SEQ_TO_QUEUE(sequence);
 306         int index = SEQ_TO_INDEX(sequence);
 307         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 308         struct ieee80211_tx_info *info;
 309         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 310         u32  status = le32_to_cpu(tx_resp->status);
 311         int rate_idx;
 312
 313         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 314                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 315                           "is out of range [0-%d] %d %d\n", txq_id,
 316                           index, txq->q.n_bd, txq->q.write_ptr,
 317                           txq->q.read_ptr);
 318                 return;
 319         }
 320
 321         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 322         memset(&info->status, 0, sizeof(info->status));
 323
 324         info->status.retry_count = tx_resp->failure_frame;
 325         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 326         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 327                                 IEEE80211_TX_STAT_ACK : 0;
 328
 329         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 330                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 331                         tx_resp->rate, tx_resp->failure_frame);
 332
 333         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 334         if (info->band == IEEE80211_BAND_5GHZ)
 335                 rate_idx -= IWL_FIRST_OFDM_RATE;
 336         info->tx_rate_idx = rate_idx;
 337         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 338         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 339
 340         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 341                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 342 }
 343
 344
 345
 346 /*****************************************************************************
 347  *
 348  * Intel PRO/Wireless 3945ABG/BG Network Connection
 349  *
 350  *  RX handler implementations
 351  *
 352  *****************************************************************************/
 353
 354 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 355 {
 356         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 357         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 358                      (int)sizeof(struct iwl3945_notif_statistics),
 359                      le32_to_cpu(pkt->len));
 360
 361         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 362
 363         iwl3945_led_background(priv);
 364
 365         priv->last_statistics_time = jiffies;
 366 }
 367
 368 /******************************************************************************
 369  *
 370  * Misc. internal state and helper functions
 371  *
 372  ******************************************************************************/
 373 #ifdef CONFIG_IWL3945_DEBUG
 374
 375 /**
 376  * iwl3945_report_frame - dump frame to syslog during debug sessions
 377  *
 378  * You may hack this function to show different aspects of received frames,
 379  * including selective frame dumps.
 380  * group100 parameter selects whether to show 1 out of 100 good frames.
 381  */
 382 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 383                       struct iwl3945_rx_packet *pkt,
 384                       struct ieee80211_hdr *header, int group100)
 385 {
 386         u32 to_us;
 387         u32 print_summary = 0;
 388         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 389         u32 hundred = 0;
 390         u32 dataframe = 0;
 391         __le16 fc;
 392         u16 seq_ctl;
 393         u16 channel;
 394         u16 phy_flags;
 395         u16 length;
 396         u16 status;
 397         u16 bcn_tmr;
 398         u32 tsf_low;
 399         u64 tsf;
 400         u8 rssi;
 401         u8 agc;
 402         u16 sig_avg;
 403         u16 noise_diff;
 404         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 405         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 406         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 407         u8 *data = IWL_RX_DATA(pkt);
 408
 409         /* MAC header */
 410         fc = header->frame_control;
 411         seq_ctl = le16_to_cpu(header->seq_ctrl);
 412
 413         /* metadata */
 414         channel = le16_to_cpu(rx_hdr->channel);
 415         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 416         length = le16_to_cpu(rx_hdr->len);
 417
 418         /* end-of-frame status and timestamp */
 419         status = le32_to_cpu(rx_end->status);
 420         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 421         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 422         tsf = le64_to_cpu(rx_end->timestamp);
 423
 424         /* signal statistics */
 425         rssi = rx_stats->rssi;
 426         agc = rx_stats->agc;
 427         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 428         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 429
 430         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 431
 432         /* if data frame is to us and all is good,
 433          *   (optionally) print summary for only 1 out of every 100 */
 434         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 435             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 436                 dataframe = 1;
 437                 if (!group100)
 438                         print_summary = 1;      /* print each frame */
 439                 else if (priv->framecnt_to_us < 100) {
 440                         priv->framecnt_to_us++;
 441                         print_summary = 0;
 442                 } else {
 443                         priv->framecnt_to_us = 0;
 444                         print_summary = 1;
 445                         hundred = 1;
 446                 }
 447         } else {
 448                 /* print summary for all other frames */
 449                 print_summary = 1;
 450         }
 451
 452         if (print_summary) {
 453                 char *title;
 454                 u32 rate;
 455
 456                 if (hundred)
 457                         title = "100Frames";
 458                 else if (ieee80211_has_retry(fc))
 459                         title = "Retry";
 460                 else if (ieee80211_is_assoc_resp(fc))
 461                         title = "AscRsp";
 462                 else if (ieee80211_is_reassoc_resp(fc))
 463                         title = "RasRsp";
 464                 else if (ieee80211_is_probe_resp(fc)) {
 465                         title = "PrbRsp";
 466                         print_dump = 1; /* dump frame contents */
 467                 } else if (ieee80211_is_beacon(fc)) {
 468                         title = "Beacon";
 469                         print_dump = 1; /* dump frame contents */
 470                 } else if (ieee80211_is_atim(fc))
 471                         title = "ATIM";
 472                 else if (ieee80211_is_auth(fc))
 473                         title = "Auth";
 474                 else if (ieee80211_is_deauth(fc))
 475                         title = "DeAuth";
 476                 else if (ieee80211_is_disassoc(fc))
 477                         title = "DisAssoc";
 478                 else
 479                         title = "Frame";
 480
 481                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 482                 if (rate == -1)
 483                         rate = 0;
 484                 else
 485                         rate = iwl3945_rates[rate].ieee / 2;
 486
 487                 /* print frame summary.
 488                  * MAC addresses show just the last byte (for brevity),
 489                  *    but you can hack it to show more, if you'd like to. */
 490                 if (dataframe)
 491                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 492                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 493                                      title, le16_to_cpu(fc), header->addr1[5],
 494                                      length, rssi, channel, rate);
 495                 else {
 496                         /* src/dst addresses assume managed mode */
 497                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 498                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 499                                      "phy=0x%02x, chnl=%d\n",
 500                                      title, le16_to_cpu(fc), header->addr1[5],
 501                                      header->addr3[5], rssi,
 502                                      tsf_low - priv->scan_start_tsf,
 503                                      phy_flags, channel);
 504                 }
 505         }
 506         if (print_dump)
 507                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 508 }
 509 #else
 510 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 511                       struct iwl3945_rx_packet *pkt,
 512                       struct ieee80211_hdr *header, int group100)
 513 {
 514 }
 515 #endif
 516
 517
 518 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
 519                                  struct sk_buff *skb,
 520                                  struct iwl3945_rx_frame_hdr *rx_hdr,
 521                                  struct ieee80211_rx_status *stats)
 522 {
 523         /* First cache any information we need before we overwrite
 524          * the information provided in the skb from the hardware */
 525         s8 signal = stats->signal;
 526         s8 noise = 0;
 527         int rate = stats->rate_idx;
 528         u64 tsf = stats->mactime;
 529         __le16 phy_flags_hw = rx_hdr->phy_flags, antenna;
 530
 531         struct iwl3945_rt_rx_hdr {
 532                 struct ieee80211_radiotap_header rt_hdr;
 533                 __le64 rt_tsf;          /* TSF */
 534                 u8 rt_flags;            /* radiotap packet flags */
 535                 u8 rt_rate;             /* rate in 500kb/s */
 536                 __le16 rt_channelMHz;   /* channel in MHz */
 537                 __le16 rt_chbitmask;    /* channel bitfield */
 538                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
 539                 s8 rt_dbmnoise;
 540                 u8 rt_antenna;          /* antenna number */
 541         } __attribute__ ((packed)) *iwl3945_rt;
 542
 543         if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
 544                 if (net_ratelimit())
 545                         printk(KERN_ERR "not enough headroom [%d] for "
 546                                "radiotap head [%zd]\n",
 547                                skb_headroom(skb), sizeof(*iwl3945_rt));
 548                 return;
 549         }
 550
 551         /* put radiotap header in front of 802.11 header and data */
 552         iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
 553
 554         /* initialise radiotap header */
 555         iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
 556         iwl3945_rt->rt_hdr.it_pad = 0;
 557
 558         /* total header + data */
 559         put_unaligned_le16(sizeof(*iwl3945_rt), &iwl3945_rt->rt_hdr.it_len);
 560
 561         /* Indicate all the fields we add to the radiotap header */
 562         put_unaligned_le32((1 << IEEE80211_RADIOTAP_TSFT) |
 563                            (1 << IEEE80211_RADIOTAP_FLAGS) |
 564                            (1 << IEEE80211_RADIOTAP_RATE) |
 565                            (1 << IEEE80211_RADIOTAP_CHANNEL) |
 566                            (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
 567                            (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
 568                            (1 << IEEE80211_RADIOTAP_ANTENNA),
 569                         &iwl3945_rt->rt_hdr.it_present);
 570
 571         /* Zero the flags, we'll add to them as we go */
 572         iwl3945_rt->rt_flags = 0;
 573
 574         put_unaligned_le64(tsf, &iwl3945_rt->rt_tsf);
 575
 576         iwl3945_rt->rt_dbmsignal = signal;
 577         iwl3945_rt->rt_dbmnoise = noise;
 578
 579         /* Convert the channel frequency and set the flags */
 580         put_unaligned_le16(stats->freq, &iwl3945_rt->rt_channelMHz);
 581         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
 582                 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ,
 583                               &iwl3945_rt->rt_chbitmask);
 584         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
 585                 put_unaligned_le16(IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ,
 586                               &iwl3945_rt->rt_chbitmask);
 587         else    /* 802.11g */
 588                 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ,
 589                               &iwl3945_rt->rt_chbitmask);
 590
 591         if (rate == -1)
 592                 iwl3945_rt->rt_rate = 0;
 593         else
 594                 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
 595
 596         /* antenna number */
 597         antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
 598         iwl3945_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
 599
 600         /* set the preamble flag if we have it */
 601         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 602                 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 603
 604         stats->flag |= RX_FLAG_RADIOTAP;
 605 }
 606
 607 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
 608                                    struct iwl3945_rx_mem_buffer *rxb,
 609                                    struct ieee80211_rx_status *stats)
 610 {
 611         struct ieee80211_hdr *hdr;
 612         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 613         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 614         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 615         short len = le16_to_cpu(rx_hdr->len);
 616
 617         /* We received data from the HW, so stop the watchdog */
 618         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 619                 IWL_DEBUG_DROP("Corruption detected!\n");
 620                 return;
 621         }
 622
 623         /* We only process data packets if the interface is open */
 624         if (unlikely(!priv->is_open)) {
 625                 IWL_DEBUG_DROP_LIMIT
 626                     ("Dropping packet while interface is not open.\n");
 627                 return;
 628         }
 629
 630         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 631         /* Set the size of the skb to the size of the frame */
 632         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 633
 634         hdr = (void *)rxb->skb->data;
 635
 636         if (iwl3945_param_hwcrypto)
 637                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 638                                        le32_to_cpu(rx_end->status), stats);
 639
 640         if (priv->add_radiotap)
 641                 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
 642
 643 #ifdef CONFIG_IWL3945_LEDS
 644         if (is_data)
 645                 priv->rxtxpackets += len;
 646 #endif
 647         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 648         rxb->skb = NULL;
 649 }
 650
 651 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 652
 653 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 654                                 struct iwl3945_rx_mem_buffer *rxb)
 655 {
 656         struct ieee80211_hdr *header;
 657         struct ieee80211_rx_status rx_status;
 658         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 659         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 660         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 661         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 662         int snr;
 663         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 664         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 665         u8 network_packet;
 666
 667         rx_status.antenna = 0;
 668         rx_status.flag = 0;
 669         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 670         rx_status.freq =
 671                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 672         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 673                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 674
 675         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 676         if (rx_status.band == IEEE80211_BAND_5GHZ)
 677                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 678
 679         if ((unlikely(rx_stats->phy_count > 20))) {
 680                 IWL_DEBUG_DROP
 681                     ("dsp size out of range [0,20]: "
 682                      "%d/n", rx_stats->phy_count);
 683                 return;
 684         }
 685
 686         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 687             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 688                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 689                 return;
 690         }
 691
 692         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 693                 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
 694                 return;
 695         }
 696
 697         /* Convert 3945's rssi indicator to dBm */
 698         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
 699
 700         /* Set default noise value to -127 */
 701         if (priv->last_rx_noise == 0)
 702                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 703
 704         /* 3945 provides noise info for OFDM frames only.
 705          * sig_avg and noise_diff are measured by the 3945's digital signal
 706          *   processor (DSP), and indicate linear levels of signal level and
 707          *   distortion/noise within the packet preamble after
 708          *   automatic gain control (AGC).  sig_avg should stay fairly
 709          *   constant if the radio's AGC is working well.
 710          * Since these values are linear (not dB or dBm), linear
 711          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 712          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 713          *   to obtain noise level in dBm.
 714          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 715         if (rx_stats_noise_diff) {
 716                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 717                 rx_status.noise = rx_status.signal -
 718                                         iwl3945_calc_db_from_ratio(snr);
 719                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
 720                                                          rx_status.noise);
 721
 722         /* If noise info not available, calculate signal quality indicator (%)
 723          *   using just the dBm signal level. */
 724         } else {
 725                 rx_status.noise = priv->last_rx_noise;
 726                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
 727         }
 728
 729
 730         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 731                         rx_status.signal, rx_status.noise, rx_status.qual,
 732                         rx_stats_sig_avg, rx_stats_noise_diff);
 733
 734         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 735
 736         network_packet = iwl3945_is_network_packet(priv, header);
 737
 738         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 739                               network_packet ? '*' : ' ',
 740                               le16_to_cpu(rx_hdr->channel),
 741                               rx_status.signal, rx_status.signal,
 742                               rx_status.noise, rx_status.rate_idx);
 743
 744 #ifdef CONFIG_IWL3945_DEBUG
 745         if (iwl3945_debug_level & (IWL_DL_RX))
 746                 /* Set "1" to report good data frames in groups of 100 */
 747                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 748 #endif
 749
 750         if (network_packet) {
 751                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 752                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 753                 priv->last_rx_rssi = rx_status.signal;
 754                 priv->last_rx_noise = rx_status.noise;
 755         }
 756
 757         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 758         case IEEE80211_FTYPE_MGMT:
 759                 switch (le16_to_cpu(header->frame_control) &
 760                         IEEE80211_FCTL_STYPE) {
 761                 case IEEE80211_STYPE_PROBE_RESP:
 762                 case IEEE80211_STYPE_BEACON:{
 763                                 /* If this is a beacon or probe response for
 764                                  * our network then cache the beacon
 765                                  * timestamp */
 766                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 767                                       && !compare_ether_addr(header->addr2,
 768                                                              priv->bssid)) ||
 769                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 770                                       && !compare_ether_addr(header->addr3,
 771                                                              priv->bssid)))) {
 772                                         struct ieee80211_mgmt *mgmt =
 773                                             (struct ieee80211_mgmt *)header;
 774                                         __le32 *pos;
 775                                         pos =
 776                                             (__le32 *) & mgmt->u.beacon.
 777                                             timestamp;
 778                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 779                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 780                                         priv->beacon_int = le16_to_cpu(
 781                                             mgmt->u.beacon.beacon_int);
 782                                         if (priv->call_post_assoc_from_beacon &&
 783                                             (priv->iw_mode ==
 784                                                 IEEE80211_IF_TYPE_STA))
 785                                                 queue_work(priv->workqueue,
 786                                                     &priv->post_associate.work);
 787
 788                                         priv->call_post_assoc_from_beacon = 0;
 789                                 }
 790
 791                                 break;
 792                         }
 793
 794                 case IEEE80211_STYPE_ACTION:
 795                         /* TODO: Parse 802.11h frames for CSA... */
 796                         break;
 797
 798                         /*
 799                          * TODO: Use the new callback function from
 800                          * mac80211 instead of sniffing these packets.
 801                          */
 802                 case IEEE80211_STYPE_ASSOC_RESP:
 803                 case IEEE80211_STYPE_REASSOC_RESP:{
 804                                 struct ieee80211_mgmt *mgnt =
 805                                     (struct ieee80211_mgmt *)header;
 806
 807                                 /* We have just associated, give some
 808                                  * time for the 4-way handshake if
 809                                  * any. Don't start scan too early. */
 810                                 priv->next_scan_jiffies = jiffies +
 811                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
 812
 813                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 814                                                   le16_to_cpu(mgnt->u.
 815                                                               assoc_resp.aid));
 816                                 priv->assoc_capability =
 817                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 818                                 if (priv->beacon_int)
 819                                         queue_work(priv->workqueue,
 820                                             &priv->post_associate.work);
 821                                 else
 822                                         priv->call_post_assoc_from_beacon = 1;
 823                                 break;
 824                         }
 825
 826                 case IEEE80211_STYPE_PROBE_REQ:{
 827                                 DECLARE_MAC_BUF(mac1);
 828                                 DECLARE_MAC_BUF(mac2);
 829                                 DECLARE_MAC_BUF(mac3);
 830                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 831                                         IWL_DEBUG_DROP
 832                                             ("Dropping (non network): %s"
 833                                              ", %s, %s\n",
 834                                              print_mac(mac1, header->addr1),
 835                                              print_mac(mac2, header->addr2),
 836                                              print_mac(mac3, header->addr3));
 837                                 return;
 838                         }
 839                 }
 840
 841                 iwl3945_handle_data_packet(priv, 0, rxb, &rx_status);
 842                 break;
 843
 844         case IEEE80211_FTYPE_CTL:
 845                 break;
 846
 847         case IEEE80211_FTYPE_DATA: {
 848                 DECLARE_MAC_BUF(mac1);
 849                 DECLARE_MAC_BUF(mac2);
 850                 DECLARE_MAC_BUF(mac3);
 851
 852                 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
 853                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 854                                        print_mac(mac1, header->addr1),
 855                                        print_mac(mac2, header->addr2),
 856                                        print_mac(mac3, header->addr3));
 857                 else
 858                         iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
 859                 break;
 860         }
 861         }
 862 }
 863
 864 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 865                                  dma_addr_t addr, u16 len)
 866 {
 867         int count;
 868         u32 pad;
 869         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 870
 871         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 872         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 873
 874         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 875                 IWL_ERROR("Error can not send more than %d chunks\n",
 876                           NUM_TFD_CHUNKS);
 877                 return -EINVAL;
 878         }
 879
 880         tfd->pa[count].addr = cpu_to_le32(addr);
 881         tfd->pa[count].len = cpu_to_le32(len);
 882
 883         count++;
 884
 885         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 886                                          TFD_CTL_PAD_SET(pad));
 887
 888         return 0;
 889 }
 890
 891 /**
 892  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 893  *
 894  * Does NOT advance any indexes
 895  */
 896 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 897 {
 898         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 899         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 900         struct pci_dev *dev = priv->pci_dev;
 901         int i;
 902         int counter;
 903
 904         /* classify bd */
 905         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 906                 /* nothing to cleanup after for host commands */
 907                 return 0;
 908
 909         /* sanity check */
 910         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 911         if (counter > NUM_TFD_CHUNKS) {
 912                 IWL_ERROR("Too many chunks: %i\n", counter);
 913                 /* @todo issue fatal error, it is quite serious situation */
 914                 return 0;
 915         }
 916
 917         /* unmap chunks if any */
 918
 919         for (i = 1; i < counter; i++) {
 920                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 921                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 922                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 923                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 924                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 925                                 /* Can be called from interrupt context */
 926                                 dev_kfree_skb_any(skb);
 927                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 928                         }
 929                 }
 930         }
 931         return 0;
 932 }
 933
 934 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 935 {
 936         int i;
 937         int ret = IWL_INVALID_STATION;
 938         unsigned long flags;
 939         DECLARE_MAC_BUF(mac);
 940
 941         spin_lock_irqsave(&priv->sta_lock, flags);
 942         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 943                 if ((priv->stations[i].used) &&
 944                     (!compare_ether_addr
 945                      (priv->stations[i].sta.sta.addr, addr))) {
 946                         ret = i;
 947                         goto out;
 948                 }
 949
 950         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 951                        print_mac(mac, addr), priv->num_stations);
 952  out:
 953         spin_unlock_irqrestore(&priv->sta_lock, flags);
 954         return ret;
 955 }
 956
 957 /**
 958  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 959  *
 960 */
 961 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 962                               struct iwl3945_cmd *cmd,
 963                               struct ieee80211_tx_info *info,
 964                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 965 {
 966         unsigned long flags;
 967         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 968         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
 969         u16 rate_mask;
 970         int rate;
 971         u8 rts_retry_limit;
 972         u8 data_retry_limit;
 973         __le32 tx_flags;
 974         __le16 fc = hdr->frame_control;
 975
 976         rate = iwl3945_rates[rate_index].plcp;
 977         tx_flags = cmd->cmd.tx.tx_flags;
 978
 979         /* We need to figure out how to get the sta->supp_rates while
 980          * in this running context */
 981         rate_mask = IWL_RATES_MASK;
 982
 983         spin_lock_irqsave(&priv->sta_lock, flags);
 984
 985         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 986
 987         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 988             (sta_id != priv->hw_setting.bcast_sta_id) &&
 989                 (sta_id != IWL_MULTICAST_ID))
 990                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 991
 992         spin_unlock_irqrestore(&priv->sta_lock, flags);
 993
 994         if (tx_id >= IWL_CMD_QUEUE_NUM)
 995                 rts_retry_limit = 3;
 996         else
 997                 rts_retry_limit = 7;
 998
 999         if (ieee80211_is_probe_resp(fc)) {
1000                 data_retry_limit = 3;
1001                 if (data_retry_limit < rts_retry_limit)
1002                         rts_retry_limit = data_retry_limit;
1003         } else
1004                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1005
1006         if (priv->data_retry_limit != -1)
1007                 data_retry_limit = priv->data_retry_limit;
1008
1009         if (ieee80211_is_mgmt(fc)) {
1010                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1011                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1012                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1013                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1014                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1015                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
1016                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1017                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
1018                         }
1019                         break;
1020                 default:
1021                         break;
1022                 }
1023         }
1024
1025         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
1026         cmd->cmd.tx.data_retry_limit = data_retry_limit;
1027         cmd->cmd.tx.rate = rate;
1028         cmd->cmd.tx.tx_flags = tx_flags;
1029
1030         /* OFDM */
1031         cmd->cmd.tx.supp_rates[0] =
1032            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
1033
1034         /* CCK */
1035         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
1036
1037         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
1038                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
1039                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
1040                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
1041 }
1042
1043 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
1044 {
1045         unsigned long flags_spin;
1046         struct iwl3945_station_entry *station;
1047
1048         if (sta_id == IWL_INVALID_STATION)
1049                 return IWL_INVALID_STATION;
1050
1051         spin_lock_irqsave(&priv->sta_lock, flags_spin);
1052         station = &priv->stations[sta_id];
1053
1054         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
1055         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
1056         station->current_rate.rate_n_flags = tx_rate;
1057         station->sta.mode = STA_CONTROL_MODIFY_MSK;
1058
1059         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
1060
1061         iwl3945_send_add_station(priv, &station->sta, flags);
1062         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
1063                         sta_id, tx_rate);
1064         return sta_id;
1065 }
1066
1067 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
1068 {
1069         int rc;
1070         unsigned long flags;
1071
1072         spin_lock_irqsave(&priv->lock, flags);
1073         rc = iwl3945_grab_nic_access(priv);
1074         if (rc) {
1075                 spin_unlock_irqrestore(&priv->lock, flags);
1076                 return rc;
1077         }
1078
1079         if (!pwr_max) {
1080                 u32 val;
1081
1082                 rc = pci_read_config_dword(priv->pci_dev,
1083                                 PCI_POWER_SOURCE, &val);
1084                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1085                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1086                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1087                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
1088                         iwl3945_release_nic_access(priv);
1089
1090                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
1091                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1092                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1093                 } else
1094                         iwl3945_release_nic_access(priv);
1095         } else {
1096                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1097                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1098                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
1099
1100                 iwl3945_release_nic_access(priv);
1101                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1102                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
1103         }
1104         spin_unlock_irqrestore(&priv->lock, flags);
1105
1106         return rc;
1107 }
1108
1109 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1110 {
1111         int rc;
1112         unsigned long flags;
1113
1114         spin_lock_irqsave(&priv->lock, flags);
1115         rc = iwl3945_grab_nic_access(priv);
1116         if (rc) {
1117                 spin_unlock_irqrestore(&priv->lock, flags);
1118                 return rc;
1119         }
1120
1121         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1122         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1123                              priv->hw_setting.shared_phys +
1124                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1125         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1126         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1127                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1128                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1129                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1130                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1131                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1132                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1133                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1134                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1135
1136         /* fake read to flush all prev I/O */
1137         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1138
1139         iwl3945_release_nic_access(priv);
1140         spin_unlock_irqrestore(&priv->lock, flags);
1141
1142         return 0;
1143 }
1144
1145 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1146 {
1147         int rc;
1148         unsigned long flags;
1149
1150         spin_lock_irqsave(&priv->lock, flags);
1151         rc = iwl3945_grab_nic_access(priv);
1152         if (rc) {
1153                 spin_unlock_irqrestore(&priv->lock, flags);
1154                 return rc;
1155         }
1156
1157         /* bypass mode */
1158         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1159
1160         /* RA 0 is active */
1161         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1162
1163         /* all 6 fifo are active */
1164         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1165
1166         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1167         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1168         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1169         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1170
1171         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1172                              priv->hw_setting.shared_phys);
1173
1174         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1175                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1176                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1177                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1178                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1179                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1180                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1181                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1182
1183         iwl3945_release_nic_access(priv);
1184         spin_unlock_irqrestore(&priv->lock, flags);
1185
1186         return 0;
1187 }
1188
1189 /**
1190  * iwl3945_txq_ctx_reset - Reset TX queue context
1191  *
1192  * Destroys all DMA structures and initialize them again
1193  */
1194 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1195 {
1196         int rc;
1197         int txq_id, slots_num;
1198
1199         iwl3945_hw_txq_ctx_free(priv);
1200
1201         /* Tx CMD queue */
1202         rc = iwl3945_tx_reset(priv);
1203         if (rc)
1204                 goto error;
1205
1206         /* Tx queue(s) */
1207         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1208                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1209                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1210                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1211                                 txq_id);
1212                 if (rc) {
1213                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1214                         goto error;
1215                 }
1216         }
1217
1218         return rc;
1219
1220  error:
1221         iwl3945_hw_txq_ctx_free(priv);
1222         return rc;
1223 }
1224
1225 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1226 {
1227         u8 rev_id;
1228         int rc;
1229         unsigned long flags;
1230         struct iwl3945_rx_queue *rxq = &priv->rxq;
1231
1232         iwl3945_power_init_handle(priv);
1233
1234         spin_lock_irqsave(&priv->lock, flags);
1235         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1236         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1237                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1238
1239         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1240         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1241                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1242                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1243         if (rc < 0) {
1244                 spin_unlock_irqrestore(&priv->lock, flags);
1245                 IWL_DEBUG_INFO("Failed to init the card\n");
1246                 return rc;
1247         }
1248
1249         rc = iwl3945_grab_nic_access(priv);
1250         if (rc) {
1251                 spin_unlock_irqrestore(&priv->lock, flags);
1252                 return rc;
1253         }
1254         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1255                                  APMG_CLK_VAL_DMA_CLK_RQT |
1256                                  APMG_CLK_VAL_BSM_CLK_RQT);
1257         udelay(20);
1258         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1259                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1260         iwl3945_release_nic_access(priv);
1261         spin_unlock_irqrestore(&priv->lock, flags);
1262
1263         /* Determine HW type */
1264         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1265         if (rc)
1266                 return rc;
1267         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1268
1269         iwl3945_nic_set_pwr_src(priv, 1);
1270         spin_lock_irqsave(&priv->lock, flags);
1271
1272         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1273                 IWL_DEBUG_INFO("RTP type \n");
1274         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1275                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1276                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1277                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1278         } else {
1279                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1280                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1281                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1282         }
1283
1284         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1285                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1286                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1287                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1288         } else
1289                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1290
1291         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1292                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1293                                priv->eeprom.board_revision);
1294                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1295                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1296         } else {
1297                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1298                                priv->eeprom.board_revision);
1299                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1300                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1301         }
1302
1303         if (priv->eeprom.almgor_m_version <= 1) {
1304                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1305                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1306                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1307                                priv->eeprom.almgor_m_version);
1308         } else {
1309                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1310                                priv->eeprom.almgor_m_version);
1311                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1312                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1313         }
1314         spin_unlock_irqrestore(&priv->lock, flags);
1315
1316         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1317                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1318
1319         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1320                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1321
1322         /* Allocate the RX queue, or reset if it is already allocated */
1323         if (!rxq->bd) {
1324                 rc = iwl3945_rx_queue_alloc(priv);
1325                 if (rc) {
1326                         IWL_ERROR("Unable to initialize Rx queue\n");
1327                         return -ENOMEM;
1328                 }
1329         } else
1330                 iwl3945_rx_queue_reset(priv, rxq);
1331
1332         iwl3945_rx_replenish(priv);
1333
1334         iwl3945_rx_init(priv, rxq);
1335
1336         spin_lock_irqsave(&priv->lock, flags);
1337
1338         /* Look at using this instead:
1339         rxq->need_update = 1;
1340         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1341         */
1342
1343         rc = iwl3945_grab_nic_access(priv);
1344         if (rc) {
1345                 spin_unlock_irqrestore(&priv->lock, flags);
1346                 return rc;
1347         }
1348         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1349         iwl3945_release_nic_access(priv);
1350
1351         spin_unlock_irqrestore(&priv->lock, flags);
1352
1353         rc = iwl3945_txq_ctx_reset(priv);
1354         if (rc)
1355                 return rc;
1356
1357         set_bit(STATUS_INIT, &priv->status);
1358
1359         return 0;
1360 }
1361
1362 /**
1363  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1364  *
1365  * Destroy all TX DMA queues and structures
1366  */
1367 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1368 {
1369         int txq_id;
1370
1371         /* Tx queues */
1372         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1373                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1374 }
1375
1376 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1377 {
1378         int queue;
1379         unsigned long flags;
1380
1381         spin_lock_irqsave(&priv->lock, flags);
1382         if (iwl3945_grab_nic_access(priv)) {
1383                 spin_unlock_irqrestore(&priv->lock, flags);
1384                 iwl3945_hw_txq_ctx_free(priv);
1385                 return;
1386         }
1387
1388         /* stop SCD */
1389         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1390
1391         /* reset TFD queues */
1392         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1393                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1394                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1395                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1396                                 1000);
1397         }
1398
1399         iwl3945_release_nic_access(priv);
1400         spin_unlock_irqrestore(&priv->lock, flags);
1401
1402         iwl3945_hw_txq_ctx_free(priv);
1403 }
1404
1405 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1406 {
1407         int rc = 0;
1408         u32 reg_val;
1409         unsigned long flags;
1410
1411         spin_lock_irqsave(&priv->lock, flags);
1412
1413         /* set stop master bit */
1414         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1415
1416         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1417
1418         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1419             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1420                 IWL_DEBUG_INFO("Card in power save, master is already "
1421                                "stopped\n");
1422         else {
1423                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1424                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1425                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1426                 if (rc < 0) {
1427                         spin_unlock_irqrestore(&priv->lock, flags);
1428                         return rc;
1429                 }
1430         }
1431
1432         spin_unlock_irqrestore(&priv->lock, flags);
1433         IWL_DEBUG_INFO("stop master\n");
1434
1435         return rc;
1436 }
1437
1438 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1439 {
1440         int rc;
1441         unsigned long flags;
1442
1443         iwl3945_hw_nic_stop_master(priv);
1444
1445         spin_lock_irqsave(&priv->lock, flags);
1446
1447         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1448
1449         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1450                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1451                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1452
1453         rc = iwl3945_grab_nic_access(priv);
1454         if (!rc) {
1455                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1456                                          APMG_CLK_VAL_BSM_CLK_RQT);
1457
1458                 udelay(10);
1459
1460                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1461                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1462
1463                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1464                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1465                                         0xFFFFFFFF);
1466
1467                 /* enable DMA */
1468                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1469                                          APMG_CLK_VAL_DMA_CLK_RQT |
1470                                          APMG_CLK_VAL_BSM_CLK_RQT);
1471                 udelay(10);
1472
1473                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1474                                 APMG_PS_CTRL_VAL_RESET_REQ);
1475                 udelay(5);
1476                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1477                                 APMG_PS_CTRL_VAL_RESET_REQ);
1478                 iwl3945_release_nic_access(priv);
1479         }
1480
1481         /* Clear the 'host command active' bit... */
1482         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1483
1484         wake_up_interruptible(&priv->wait_command_queue);
1485         spin_unlock_irqrestore(&priv->lock, flags);
1486
1487         return rc;
1488 }
1489
1490 /**
1491  * iwl3945_hw_reg_adjust_power_by_temp
1492  * return index delta into power gain settings table
1493 */
1494 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1495 {
1496         return (new_reading - old_reading) * (-11) / 100;
1497 }
1498
1499 /**
1500  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1501  */
1502 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1503 {
1504         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1505 }
1506
1507 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1508 {
1509         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1510 }
1511
1512 /**
1513  * iwl3945_hw_reg_txpower_get_temperature
1514  * get the current temperature by reading from NIC
1515 */
1516 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1517 {
1518         int temperature;
1519
1520         temperature = iwl3945_hw_get_temperature(priv);
1521
1522         /* driver's okay range is -260 to +25.
1523          *   human readable okay range is 0 to +285 */
1524         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1525
1526         /* handle insane temp reading */
1527         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1528                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1529
1530                 /* if really really hot(?),
1531                  *   substitute the 3rd band/group's temp measured at factory */
1532                 if (priv->last_temperature > 100)
1533                         temperature = priv->eeprom.groups[2].temperature;
1534                 else /* else use most recent "sane" value from driver */
1535                         temperature = priv->last_temperature;
1536         }
1537
1538         return temperature;     /* raw, not "human readable" */
1539 }
1540
1541 /* Adjust Txpower only if temperature variance is greater than threshold.
1542  *
1543  * Both are lower than older versions' 9 degrees */
1544 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1545
1546 /**
1547  * is_temp_calib_needed - determines if new calibration is needed
1548  *
1549  * records new temperature in tx_mgr->temperature.
1550  * replaces tx_mgr->last_temperature *only* if calib needed
1551  *    (assumes caller will actually do the calibration!). */
1552 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1553 {
1554         int temp_diff;
1555
1556         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1557         temp_diff = priv->temperature - priv->last_temperature;
1558
1559         /* get absolute value */
1560         if (temp_diff < 0) {
1561                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1562                 temp_diff = -temp_diff;
1563         } else if (temp_diff == 0)
1564                 IWL_DEBUG_POWER("Same temp,\n");
1565         else
1566                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1567
1568         /* if we don't need calibration, *don't* update last_temperature */
1569         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1570                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1571                 return 0;
1572         }
1573
1574         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1575
1576         /* assume that caller will actually do calib ...
1577          *   update the "last temperature" value */
1578         priv->last_temperature = priv->temperature;
1579         return 1;
1580 }
1581
1582 #define IWL_MAX_GAIN_ENTRIES 78
1583 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1584 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1585
1586 /* radio and DSP power table, each step is 1/2 dB.
1587  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1588 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1589         {
1590          {251, 127},            /* 2.4 GHz, highest power */
1591          {251, 127},
1592          {251, 127},
1593          {251, 127},
1594          {251, 125},
1595          {251, 110},
1596          {251, 105},
1597          {251, 98},
1598          {187, 125},
1599          {187, 115},
1600          {187, 108},
1601          {187, 99},
1602          {243, 119},
1603          {243, 111},
1604          {243, 105},
1605          {243, 97},
1606          {243, 92},
1607          {211, 106},
1608          {211, 100},
1609          {179, 120},
1610          {179, 113},
1611          {179, 107},
1612          {147, 125},
1613          {147, 119},
1614          {147, 112},
1615          {147, 106},
1616          {147, 101},
1617          {147, 97},
1618          {147, 91},
1619          {115, 107},
1620          {235, 121},
1621          {235, 115},
1622          {235, 109},
1623          {203, 127},
1624          {203, 121},
1625          {203, 115},
1626          {203, 108},
1627          {203, 102},
1628          {203, 96},
1629          {203, 92},
1630          {171, 110},
1631          {171, 104},
1632          {171, 98},
1633          {139, 116},
1634          {227, 125},
1635          {227, 119},
1636          {227, 113},
1637          {227, 107},
1638          {227, 101},
1639          {227, 96},
1640          {195, 113},
1641          {195, 106},
1642          {195, 102},
1643          {195, 95},
1644          {163, 113},
1645          {163, 106},
1646          {163, 102},
1647          {163, 95},
1648          {131, 113},
1649          {131, 106},
1650          {131, 102},
1651          {131, 95},
1652          {99, 113},
1653          {99, 106},
1654          {99, 102},
1655          {99, 95},
1656          {67, 113},
1657          {67, 106},
1658          {67, 102},
1659          {67, 95},
1660          {35, 113},
1661          {35, 106},
1662          {35, 102},
1663          {35, 95},
1664          {3, 113},
1665          {3, 106},
1666          {3, 102},
1667          {3, 95} },             /* 2.4 GHz, lowest power */
1668         {
1669          {251, 127},            /* 5.x GHz, highest power */
1670          {251, 120},
1671          {251, 114},
1672          {219, 119},
1673          {219, 101},
1674          {187, 113},
1675          {187, 102},
1676          {155, 114},
1677          {155, 103},
1678          {123, 117},
1679          {123, 107},
1680          {123, 99},
1681          {123, 92},
1682          {91, 108},
1683          {59, 125},
1684          {59, 118},
1685          {59, 109},
1686          {59, 102},
1687          {59, 96},
1688          {59, 90},
1689          {27, 104},
1690          {27, 98},
1691          {27, 92},
1692          {115, 118},
1693          {115, 111},
1694          {115, 104},
1695          {83, 126},
1696          {83, 121},
1697          {83, 113},
1698          {83, 105},
1699          {83, 99},
1700          {51, 118},
1701          {51, 111},
1702          {51, 104},
1703          {51, 98},
1704          {19, 116},
1705          {19, 109},
1706          {19, 102},
1707          {19, 98},
1708          {19, 93},
1709          {171, 113},
1710          {171, 107},
1711          {171, 99},
1712          {139, 120},
1713          {139, 113},
1714          {139, 107},
1715          {139, 99},
1716          {107, 120},
1717          {107, 113},
1718          {107, 107},
1719          {107, 99},
1720          {75, 120},
1721          {75, 113},
1722          {75, 107},
1723          {75, 99},
1724          {43, 120},
1725          {43, 113},
1726          {43, 107},
1727          {43, 99},
1728          {11, 120},
1729          {11, 113},
1730          {11, 107},
1731          {11, 99},
1732          {131, 107},
1733          {131, 99},
1734          {99, 120},
1735          {99, 113},
1736          {99, 107},
1737          {99, 99},
1738          {67, 120},
1739          {67, 113},
1740          {67, 107},
1741          {67, 99},
1742          {35, 120},
1743          {35, 113},
1744          {35, 107},
1745          {35, 99},
1746          {3, 120} }             /* 5.x GHz, lowest power */
1747 };
1748
1749 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1750 {
1751         if (index < 0)
1752                 return 0;
1753         if (index >= IWL_MAX_GAIN_ENTRIES)
1754                 return IWL_MAX_GAIN_ENTRIES - 1;
1755         return (u8) index;
1756 }
1757
1758 /* Kick off thermal recalibration check every 60 seconds */
1759 #define REG_RECALIB_PERIOD (60)
1760
1761 /**
1762  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1763  *
1764  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1765  * or 6 Mbit (OFDM) rates.
1766  */
1767 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1768                                s32 rate_index, const s8 *clip_pwrs,
1769                                struct iwl3945_channel_info *ch_info,
1770                                int band_index)
1771 {
1772         struct iwl3945_scan_power_info *scan_power_info;
1773         s8 power;
1774         u8 power_index;
1775
1776         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1777
1778         /* use this channel group's 6Mbit clipping/saturation pwr,
1779          *   but cap at regulatory scan power restriction (set during init
1780          *   based on eeprom channel data) for this channel.  */
1781         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1782
1783         /* further limit to user's max power preference.
1784          * FIXME:  Other spectrum management power limitations do not
1785          *   seem to apply?? */
1786         power = min(power, priv->user_txpower_limit);
1787         scan_power_info->requested_power = power;
1788
1789         /* find difference between new scan *power* and current "normal"
1790          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1791          *   current "normal" temperature-compensated Tx power *index* for
1792          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1793          *   *index*. */
1794         power_index = ch_info->power_info[rate_index].power_table_index
1795             - (power - ch_info->power_info
1796                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1797
1798         /* store reference index that we use when adjusting *all* scan
1799          *   powers.  So we can accommodate user (all channel) or spectrum
1800          *   management (single channel) power changes "between" temperature
1801          *   feedback compensation procedures.
1802          * don't force fit this reference index into gain table; it may be a
1803          *   negative number.  This will help avoid errors when we're at
1804          *   the lower bounds (highest gains, for warmest temperatures)
1805          *   of the table. */
1806
1807         /* don't exceed table bounds for "real" setting */
1808         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1809
1810         scan_power_info->power_table_index = power_index;
1811         scan_power_info->tpc.tx_gain =
1812             power_gain_table[band_index][power_index].tx_gain;
1813         scan_power_info->tpc.dsp_atten =
1814             power_gain_table[band_index][power_index].dsp_atten;
1815 }
1816
1817 /**
1818  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1819  *
1820  * Configures power settings for all rates for the current channel,
1821  * using values from channel info struct, and send to NIC
1822  */
1823 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1824 {
1825         int rate_idx, i;
1826         const struct iwl3945_channel_info *ch_info = NULL;
1827         struct iwl3945_txpowertable_cmd txpower = {
1828                 .channel = priv->active_rxon.channel,
1829         };
1830
1831         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1832         ch_info = iwl3945_get_channel_info(priv,
1833                                        priv->band,
1834                                        le16_to_cpu(priv->active_rxon.channel));
1835         if (!ch_info) {
1836                 IWL_ERROR
1837                     ("Failed to get channel info for channel %d [%d]\n",
1838                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1839                 return -EINVAL;
1840         }
1841
1842         if (!is_channel_valid(ch_info)) {
1843                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1844                                 "non-Tx channel.\n");
1845                 return 0;
1846         }
1847
1848         /* fill cmd with power settings for all rates for current channel */
1849         /* Fill OFDM rate */
1850         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1851              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1852
1853                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1854                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1855
1856                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1857                                 le16_to_cpu(txpower.channel),
1858                                 txpower.band,
1859                                 txpower.power[i].tpc.tx_gain,
1860                                 txpower.power[i].tpc.dsp_atten,
1861                                 txpower.power[i].rate);
1862         }
1863         /* Fill CCK rates */
1864         for (rate_idx = IWL_FIRST_CCK_RATE;
1865              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1866                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1867                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1868
1869                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1870                                 le16_to_cpu(txpower.channel),
1871                                 txpower.band,
1872                                 txpower.power[i].tpc.tx_gain,
1873                                 txpower.power[i].tpc.dsp_atten,
1874                                 txpower.power[i].rate);
1875         }
1876
1877         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1878                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1879
1880 }
1881
1882 /**
1883  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1884  * @ch_info: Channel to update.  Uses power_info.requested_power.
1885  *
1886  * Replace requested_power and base_power_index ch_info fields for
1887  * one channel.
1888  *
1889  * Called if user or spectrum management changes power preferences.
1890  * Takes into account h/w and modulation limitations (clip power).
1891  *
1892  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1893  *
1894  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1895  *       properly fill out the scan powers, and actual h/w gain settings,
1896  *       and send changes to NIC
1897  */
1898 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1899                              struct iwl3945_channel_info *ch_info)
1900 {
1901         struct iwl3945_channel_power_info *power_info;
1902         int power_changed = 0;
1903         int i;
1904         const s8 *clip_pwrs;
1905         int power;
1906
1907         /* Get this chnlgrp's rate-to-max/clip-powers table */
1908         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1909
1910         /* Get this channel's rate-to-current-power settings table */
1911         power_info = ch_info->power_info;
1912
1913         /* update OFDM Txpower settings */
1914         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1915              i++, ++power_info) {
1916                 int delta_idx;
1917
1918                 /* limit new power to be no more than h/w capability */
1919                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1920                 if (power == power_info->requested_power)
1921                         continue;
1922
1923                 /* find difference between old and new requested powers,
1924                  *    update base (non-temp-compensated) power index */
1925                 delta_idx = (power - power_info->requested_power) * 2;
1926                 power_info->base_power_index -= delta_idx;
1927
1928                 /* save new requested power value */
1929                 power_info->requested_power = power;
1930
1931                 power_changed = 1;
1932         }
1933
1934         /* update CCK Txpower settings, based on OFDM 12M setting ...
1935          *    ... all CCK power settings for a given channel are the *same*. */
1936         if (power_changed) {
1937                 power =
1938                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1939                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1940
1941                 /* do all CCK rates' iwl3945_channel_power_info structures */
1942                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1943                         power_info->requested_power = power;
1944                         power_info->base_power_index =
1945                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1946                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1947                         ++power_info;
1948                 }
1949         }
1950
1951         return 0;
1952 }
1953
1954 /**
1955  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1956  *
1957  * NOTE: Returned power limit may be less (but not more) than requested,
1958  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1959  *       (no consideration for h/w clipping limitations).
1960  */
1961 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1962 {
1963         s8 max_power;
1964
1965 #if 0
1966         /* if we're using TGd limits, use lower of TGd or EEPROM */
1967         if (ch_info->tgd_data.max_power != 0)
1968                 max_power = min(ch_info->tgd_data.max_power,
1969                                 ch_info->eeprom.max_power_avg);
1970
1971         /* else just use EEPROM limits */
1972         else
1973 #endif
1974                 max_power = ch_info->eeprom.max_power_avg;
1975
1976         return min(max_power, ch_info->max_power_avg);
1977 }
1978
1979 /**
1980  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1981  *
1982  * Compensate txpower settings of *all* channels for temperature.
1983  * This only accounts for the difference between current temperature
1984  *   and the factory calibration temperatures, and bases the new settings
1985  *   on the channel's base_power_index.
1986  *
1987  * If RxOn is "associated", this sends the new Txpower to NIC!
1988  */
1989 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1990 {
1991         struct iwl3945_channel_info *ch_info = NULL;
1992         int delta_index;
1993         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1994         u8 a_band;
1995         u8 rate_index;
1996         u8 scan_tbl_index;
1997         u8 i;
1998         int ref_temp;
1999         int temperature = priv->temperature;
2000
2001         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
2002         for (i = 0; i < priv->channel_count; i++) {
2003                 ch_info = &priv->channel_info[i];
2004                 a_band = is_channel_a_band(ch_info);
2005
2006                 /* Get this chnlgrp's factory calibration temperature */
2007                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
2008                     temperature;
2009
2010                 /* get power index adjustment based on curr and factory
2011                  * temps */
2012                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2013                                                               ref_temp);
2014
2015                 /* set tx power value for all rates, OFDM and CCK */
2016                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
2017                      rate_index++) {
2018                         int power_idx =
2019                             ch_info->power_info[rate_index].base_power_index;
2020
2021                         /* temperature compensate */
2022                         power_idx += delta_index;
2023
2024                         /* stay within table range */
2025                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2026                         ch_info->power_info[rate_index].
2027                             power_table_index = (u8) power_idx;
2028                         ch_info->power_info[rate_index].tpc =
2029                             power_gain_table[a_band][power_idx];
2030                 }
2031
2032                 /* Get this chnlgrp's rate-to-max/clip-powers table */
2033                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2034
2035                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2036                 for (scan_tbl_index = 0;
2037                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2038                         s32 actual_index = (scan_tbl_index == 0) ?
2039                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2040                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2041                                            actual_index, clip_pwrs,
2042                                            ch_info, a_band);
2043                 }
2044         }
2045
2046         /* send Txpower command for current channel to ucode */
2047         return iwl3945_hw_reg_send_txpower(priv);
2048 }
2049
2050 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
2051 {
2052         struct iwl3945_channel_info *ch_info;
2053         s8 max_power;
2054         u8 a_band;
2055         u8 i;
2056
2057         if (priv->user_txpower_limit == power) {
2058                 IWL_DEBUG_POWER("Requested Tx power same as current "
2059                                 "limit: %ddBm.\n", power);
2060                 return 0;
2061         }
2062
2063         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
2064         priv->user_txpower_limit = power;
2065
2066         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
2067
2068         for (i = 0; i < priv->channel_count; i++) {
2069                 ch_info = &priv->channel_info[i];
2070                 a_band = is_channel_a_band(ch_info);
2071
2072                 /* find minimum power of all user and regulatory constraints
2073                  *    (does not consider h/w clipping limitations) */
2074                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
2075                 max_power = min(power, max_power);
2076                 if (max_power != ch_info->curr_txpow) {
2077                         ch_info->curr_txpow = max_power;
2078
2079                         /* this considers the h/w clipping limitations */
2080                         iwl3945_hw_reg_set_new_power(priv, ch_info);
2081                 }
2082         }
2083
2084         /* update txpower settings for all channels,
2085          *   send to NIC if associated. */
2086         is_temp_calib_needed(priv);
2087         iwl3945_hw_reg_comp_txpower_temp(priv);
2088
2089         return 0;
2090 }
2091
2092 /* will add 3945 channel switch cmd handling later */
2093 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2094 {
2095         return 0;
2096 }
2097
2098 /**
2099  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
2100  *
2101  * -- reset periodic timer
2102  * -- see if temp has changed enough to warrant re-calibration ... if so:
2103  *     -- correct coeffs for temp (can reset temp timer)
2104  *     -- save this temp as "last",
2105  *     -- send new set of gain settings to NIC
2106  * NOTE:  This should continue working, even when we're not associated,
2107  *   so we can keep our internal table of scan powers current. */
2108 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2109 {
2110         /* This will kick in the "brute force"
2111          * iwl3945_hw_reg_comp_txpower_temp() below */
2112         if (!is_temp_calib_needed(priv))
2113                 goto reschedule;
2114
2115         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2116          * This is based *only* on current temperature,
2117          * ignoring any previous power measurements */
2118         iwl3945_hw_reg_comp_txpower_temp(priv);
2119
2120  reschedule:
2121         queue_delayed_work(priv->workqueue,
2122                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2123 }
2124
2125 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2126 {
2127         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2128                                              thermal_periodic.work);
2129
2130         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2131                 return;
2132
2133         mutex_lock(&priv->mutex);
2134         iwl3945_reg_txpower_periodic(priv);
2135         mutex_unlock(&priv->mutex);
2136 }
2137
2138 /**
2139  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2140  *                                 for the channel.
2141  *
2142  * This function is used when initializing channel-info structs.
2143  *
2144  * NOTE: These channel groups do *NOT* match the bands above!
2145  *       These channel groups are based on factory-tested channels;
2146  *       on A-band, EEPROM's "group frequency" entries represent the top
2147  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2148  */
2149 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2150                                        const struct iwl3945_channel_info *ch_info)
2151 {
2152         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2153         u8 group;
2154         u16 group_index = 0;    /* based on factory calib frequencies */
2155         u8 grp_channel;
2156
2157         /* Find the group index for the channel ... don't use index 1(?) */
2158         if (is_channel_a_band(ch_info)) {
2159                 for (group = 1; group < 5; group++) {
2160                         grp_channel = ch_grp[group].group_channel;
2161                         if (ch_info->channel <= grp_channel) {
2162                                 group_index = group;
2163                                 break;
2164                         }
2165                 }
2166                 /* group 4 has a few channels *above* its factory cal freq */
2167                 if (group == 5)
2168                         group_index = 4;
2169         } else
2170                 group_index = 0;        /* 2.4 GHz, group 0 */
2171
2172         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2173                         group_index);
2174         return group_index;
2175 }
2176
2177 /**
2178  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2179  *
2180  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2181  *   into radio/DSP gain settings table for requested power.
2182  */
2183 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2184                                        s8 requested_power,
2185                                        s32 setting_index, s32 *new_index)
2186 {
2187         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2188         s32 index0, index1;
2189         s32 power = 2 * requested_power;
2190         s32 i;
2191         const struct iwl3945_eeprom_txpower_sample *samples;
2192         s32 gains0, gains1;
2193         s32 res;
2194         s32 denominator;
2195
2196         chnl_grp = &priv->eeprom.groups[setting_index];
2197         samples = chnl_grp->samples;
2198         for (i = 0; i < 5; i++) {
2199                 if (power == samples[i].power) {
2200                         *new_index = samples[i].gain_index;
2201                         return 0;
2202                 }
2203         }
2204
2205         if (power > samples[1].power) {
2206                 index0 = 0;
2207                 index1 = 1;
2208         } else if (power > samples[2].power) {
2209                 index0 = 1;
2210                 index1 = 2;
2211         } else if (power > samples[3].power) {
2212                 index0 = 2;
2213                 index1 = 3;
2214         } else {
2215                 index0 = 3;
2216                 index1 = 4;
2217         }
2218
2219         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2220         if (denominator == 0)
2221                 return -EINVAL;
2222         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2223         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2224         res = gains0 + (gains1 - gains0) *
2225             ((s32) power - (s32) samples[index0].power) / denominator +
2226             (1 << 18);
2227         *new_index = res >> 19;
2228         return 0;
2229 }
2230
2231 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2232 {
2233         u32 i;
2234         s32 rate_index;
2235         const struct iwl3945_eeprom_txpower_group *group;
2236
2237         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2238
2239         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2240                 s8 *clip_pwrs;  /* table of power levels for each rate */
2241                 s8 satur_pwr;   /* saturation power for each chnl group */
2242                 group = &priv->eeprom.groups[i];
2243
2244                 /* sanity check on factory saturation power value */
2245                 if (group->saturation_power < 40) {
2246                         IWL_WARNING("Error: saturation power is %d, "
2247                                     "less than minimum expected 40\n",
2248                                     group->saturation_power);
2249                         return;
2250                 }
2251
2252                 /*
2253                  * Derive requested power levels for each rate, based on
2254                  *   hardware capabilities (saturation power for band).
2255                  * Basic value is 3dB down from saturation, with further
2256                  *   power reductions for highest 3 data rates.  These
2257                  *   backoffs provide headroom for high rate modulation
2258                  *   power peaks, without too much distortion (clipping).
2259                  */
2260                 /* we'll fill in this array with h/w max power levels */
2261                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2262
2263                 /* divide factory saturation power by 2 to find -3dB level */
2264                 satur_pwr = (s8) (group->saturation_power >> 1);
2265
2266                 /* fill in channel group's nominal powers for each rate */
2267                 for (rate_index = 0;
2268                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2269                         switch (rate_index) {
2270                         case IWL_RATE_36M_INDEX_TABLE:
2271                                 if (i == 0)     /* B/G */
2272                                         *clip_pwrs = satur_pwr;
2273                                 else    /* A */
2274                                         *clip_pwrs = satur_pwr - 5;
2275                                 break;
2276                         case IWL_RATE_48M_INDEX_TABLE:
2277                                 if (i == 0)
2278                                         *clip_pwrs = satur_pwr - 7;
2279                                 else
2280                                         *clip_pwrs = satur_pwr - 10;
2281                                 break;
2282                         case IWL_RATE_54M_INDEX_TABLE:
2283                                 if (i == 0)
2284                                         *clip_pwrs = satur_pwr - 9;
2285                                 else
2286                                         *clip_pwrs = satur_pwr - 12;
2287                                 break;
2288                         default:
2289                                 *clip_pwrs = satur_pwr;
2290                                 break;
2291                         }
2292                 }
2293         }
2294 }
2295
2296 /**
2297  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2298  *
2299  * Second pass (during init) to set up priv->channel_info
2300  *
2301  * Set up Tx-power settings in our channel info database for each VALID
2302  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2303  * and current temperature.
2304  *
2305  * Since this is based on current temperature (at init time), these values may
2306  * not be valid for very long, but it gives us a starting/default point,
2307  * and allows us to active (i.e. using Tx) scan.
2308  *
2309  * This does *not* write values to NIC, just sets up our internal table.
2310  */
2311 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2312 {
2313         struct iwl3945_channel_info *ch_info = NULL;
2314         struct iwl3945_channel_power_info *pwr_info;
2315         int delta_index;
2316         u8 rate_index;
2317         u8 scan_tbl_index;
2318         const s8 *clip_pwrs;    /* array of power levels for each rate */
2319         u8 gain, dsp_atten;
2320         s8 power;
2321         u8 pwr_index, base_pwr_index, a_band;
2322         u8 i;
2323         int temperature;
2324
2325         /* save temperature reference,
2326          *   so we can determine next time to calibrate */
2327         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2328         priv->last_temperature = temperature;
2329
2330         iwl3945_hw_reg_init_channel_groups(priv);
2331
2332         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2333         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2334              i++, ch_info++) {
2335                 a_band = is_channel_a_band(ch_info);
2336                 if (!is_channel_valid(ch_info))
2337                         continue;
2338
2339                 /* find this channel's channel group (*not* "band") index */
2340                 ch_info->group_index =
2341                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2342
2343                 /* Get this chnlgrp's rate->max/clip-powers table */
2344                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2345
2346                 /* calculate power index *adjustment* value according to
2347                  *  diff between current temperature and factory temperature */
2348                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2349                                 priv->eeprom.groups[ch_info->group_index].
2350                                 temperature);
2351
2352                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2353                                 ch_info->channel, delta_index, temperature +
2354                                 IWL_TEMP_CONVERT);
2355
2356                 /* set tx power value for all OFDM rates */
2357                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2358                      rate_index++) {
2359                         s32 power_idx;
2360                         int rc;
2361
2362                         /* use channel group's clip-power table,
2363                          *   but don't exceed channel's max power */
2364                         s8 pwr = min(ch_info->max_power_avg,
2365                                      clip_pwrs[rate_index]);
2366
2367                         pwr_info = &ch_info->power_info[rate_index];
2368
2369                         /* get base (i.e. at factory-measured temperature)
2370                          *    power table index for this rate's power */
2371                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2372                                                          ch_info->group_index,
2373                                                          &power_idx);
2374                         if (rc) {
2375                                 IWL_ERROR("Invalid power index\n");
2376                                 return rc;
2377                         }
2378                         pwr_info->base_power_index = (u8) power_idx;
2379
2380                         /* temperature compensate */
2381                         power_idx += delta_index;
2382
2383                         /* stay within range of gain table */
2384                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2385
2386                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2387                         pwr_info->requested_power = pwr;
2388                         pwr_info->power_table_index = (u8) power_idx;
2389                         pwr_info->tpc.tx_gain =
2390                             power_gain_table[a_band][power_idx].tx_gain;
2391                         pwr_info->tpc.dsp_atten =
2392                             power_gain_table[a_band][power_idx].dsp_atten;
2393                 }
2394
2395                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2396                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2397                 power = pwr_info->requested_power +
2398                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2399                 pwr_index = pwr_info->power_table_index +
2400                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2401                 base_pwr_index = pwr_info->base_power_index +
2402                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2403
2404                 /* stay within table range */
2405                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2406                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2407                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2408
2409                 /* fill each CCK rate's iwl3945_channel_power_info structure
2410                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2411                  * NOTE:  CCK rates start at end of OFDM rates! */
2412                 for (rate_index = 0;
2413                      rate_index < IWL_CCK_RATES; rate_index++) {
2414                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2415                         pwr_info->requested_power = power;
2416                         pwr_info->power_table_index = pwr_index;
2417                         pwr_info->base_power_index = base_pwr_index;
2418                         pwr_info->tpc.tx_gain = gain;
2419                         pwr_info->tpc.dsp_atten = dsp_atten;
2420                 }
2421
2422                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2423                 for (scan_tbl_index = 0;
2424                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2425                         s32 actual_index = (scan_tbl_index == 0) ?
2426                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2427                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2428                                 actual_index, clip_pwrs, ch_info, a_band);
2429                 }
2430         }
2431
2432         return 0;
2433 }
2434
2435 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2436 {
2437         int rc;
2438         unsigned long flags;
2439
2440         spin_lock_irqsave(&priv->lock, flags);
2441         rc = iwl3945_grab_nic_access(priv);
2442         if (rc) {
2443                 spin_unlock_irqrestore(&priv->lock, flags);
2444                 return rc;
2445         }
2446
2447         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2448         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2449         if (rc < 0)
2450                 IWL_ERROR("Can't stop Rx DMA.\n");
2451
2452         iwl3945_release_nic_access(priv);
2453         spin_unlock_irqrestore(&priv->lock, flags);
2454
2455         return 0;
2456 }
2457
2458 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2459 {
2460         int rc;
2461         unsigned long flags;
2462         int txq_id = txq->q.id;
2463
2464         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2465
2466         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2467
2468         spin_lock_irqsave(&priv->lock, flags);
2469         rc = iwl3945_grab_nic_access(priv);
2470         if (rc) {
2471                 spin_unlock_irqrestore(&priv->lock, flags);
2472                 return rc;
2473         }
2474         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2475         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2476
2477         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2478                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2479                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2480                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2481                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2482                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2483         iwl3945_release_nic_access(priv);
2484
2485         /* fake read to flush all prev. writes */
2486         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2487         spin_unlock_irqrestore(&priv->lock, flags);
2488
2489         return 0;
2490 }
2491
2492 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2493 {
2494         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2495
2496         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2497 }
2498
2499 /**
2500  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2501  */
2502 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2503 {
2504         int rc, i, index, prev_index;
2505         struct iwl3945_rate_scaling_cmd rate_cmd = {
2506                 .reserved = {0, 0, 0},
2507         };
2508         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2509
2510         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2511                 index = iwl3945_rates[i].table_rs_index;
2512
2513                 table[index].rate_n_flags =
2514                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2515                 table[index].try_cnt = priv->retry_rate;
2516                 prev_index = iwl3945_get_prev_ieee_rate(i);
2517                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2518         }
2519
2520         switch (priv->band) {
2521         case IEEE80211_BAND_5GHZ:
2522                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2523                 /* If one of the following CCK rates is used,
2524                  * have it fall back to the 6M OFDM rate */
2525                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2526                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2527
2528                 /* Don't fall back to CCK rates */
2529                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2530
2531                 /* Don't drop out of OFDM rates */
2532                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2533                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2534                 break;
2535
2536         case IEEE80211_BAND_2GHZ:
2537                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2538                 /* If an OFDM rate is used, have it fall back to the
2539                  * 1M CCK rates */
2540                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2541                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2542
2543                 /* CCK shouldn't fall back to OFDM... */
2544                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2545                 break;
2546
2547         default:
2548                 WARN_ON(1);
2549                 break;
2550         }
2551
2552         /* Update the rate scaling for control frame Tx */
2553         rate_cmd.table_id = 0;
2554         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2555                               &rate_cmd);
2556         if (rc)
2557                 return rc;
2558
2559         /* Update the rate scaling for data frame Tx */
2560         rate_cmd.table_id = 1;
2561         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2562                                 &rate_cmd);
2563 }
2564
2565 /* Called when initializing driver */
2566 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2567 {
2568         memset((void *)&priv->hw_setting, 0,
2569                sizeof(struct iwl3945_driver_hw_info));
2570
2571         priv->hw_setting.shared_virt =
2572             pci_alloc_consistent(priv->pci_dev,
2573                                  sizeof(struct iwl3945_shared),
2574                                  &priv->hw_setting.shared_phys);
2575
2576         if (!priv->hw_setting.shared_virt) {
2577                 IWL_ERROR("failed to allocate pci memory\n");
2578                 mutex_unlock(&priv->mutex);
2579                 return -ENOMEM;
2580         }
2581
2582         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2583         priv->hw_setting.max_pkt_size = 2342;
2584         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2585         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2586         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2587         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2588         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2589
2590         priv->hw_setting.tx_ant_num = 2;
2591         return 0;
2592 }
2593
2594 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2595                           struct iwl3945_frame *frame, u8 rate)
2596 {
2597         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2598         unsigned int frame_size;
2599
2600         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2601         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2602
2603         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2604         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2605
2606         frame_size = iwl3945_fill_beacon_frame(priv,
2607                                 tx_beacon_cmd->frame,
2608                                 iwl3945_broadcast_addr,
2609                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2610
2611         BUG_ON(frame_size > MAX_MPDU_SIZE);
2612         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2613
2614         tx_beacon_cmd->tx.rate = rate;
2615         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2616                                       TX_CMD_FLG_TSF_MSK);
2617
2618         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2619         tx_beacon_cmd->tx.supp_rates[0] =
2620                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2621
2622         tx_beacon_cmd->tx.supp_rates[1] =
2623                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2624
2625         return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2626 }
2627
2628 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2629 {
2630         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2631         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2632 }
2633
2634 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2635 {
2636         INIT_DELAYED_WORK(&priv->thermal_periodic,
2637                           iwl3945_bg_reg_txpower_periodic);
2638 }
2639
2640 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2641 {
2642         cancel_delayed_work(&priv->thermal_periodic);
2643 }
2644
2645 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2646         .name = "3945BG",
2647         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2648         .sku = IWL_SKU_G,
2649 };
2650
2651 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2652         .name = "3945ABG",
2653         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2654         .sku = IWL_SKU_A|IWL_SKU_G,
2655 };
2656
2657 struct pci_device_id iwl3945_hw_card_ids[] = {
2658         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2659         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2660         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2661         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2662         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2663         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2664         {0}
2665 };
2666
2667 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);