git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-pxa/trizeps4.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/trizeps4.c
   3  *
   4  *  Support for the Keith und Koep Trizeps4 Module Platform.
   5  *
   6  *  Author:     Jürgen Schindele
   7  *  Created:    20 02, 2006
   8  *  Copyright:  Jürgen Schindele
   9  *
  10  *  This program is free software; you can redistribute it and/or modify
  11  *  it under the terms of the GNU General Public License version 2 as
  12  *  published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/init.h>
  16 #include <linux/kernel.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23 #include <linux/ioport.h>
  24 #include <linux/delay.h>
  25 #include <linux/serial_8250.h>
  26 #include <linux/mtd/mtd.h>
  27 #include <linux/mtd/physmap.h>
  28 #include <linux/mtd/partitions.h>
  29
  30 #include <asm/types.h>
  31 #include <asm/setup.h>
  32 #include <asm/memory.h>
  33 #include <asm/mach-types.h>
  34 #include <asm/hardware.h>
  35 #include <asm/irq.h>
  36 #include <asm/sizes.h>
  37
  38 #include <asm/mach/arch.h>
  39 #include <asm/mach/map.h>
  40 #include <asm/mach/irq.h>
  41 #include <asm/mach/flash.h>
  42
  43 #include <asm/arch/pxa-regs.h>
  44 #include <asm/arch/pxa2xx-regs.h>
  45 #include <asm/arch/pxa2xx-gpio.h>
  46 #include <asm/arch/trizeps4.h>
  47 #include <asm/arch/audio.h>
  48 #include <asm/arch/pxafb.h>
  49 #include <asm/arch/mmc.h>
  50 #include <asm/arch/irda.h>
  51 #include <asm/arch/ohci.h>
  52
  53 #include "generic.h"
  54 #include "devices.h"
  55
  56 /********************************************************************************************
  57  * ONBOARD FLASH
  58  ********************************************************************************************/
  59 static struct mtd_partition trizeps4_partitions[] = {
  60         {
  61                 .name =         "Bootloader",
  62                 .offset =       0x00000000,
  63                 .size =         0x00040000,
  64                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
  65         },{
  66                 .name =         "Backup",
  67                 .offset =       0x00040000,
  68                 .size =         0x00040000,
  69         },{
  70                 .name =         "Image",
  71                 .offset =       0x00080000,
  72                 .size =         0x01080000,
  73         },{
  74                 .name =         "IPSM",
  75                 .offset =       0x01100000,
  76                 .size =         0x00e00000,
  77         },{
  78                 .name =         "Registry",
  79                 .offset =       0x01f00000,
  80                 .size =         MTDPART_SIZ_FULL,
  81         }
  82 };
  83
  84 static struct physmap_flash_data trizeps4_flash_data[] = {
  85         {
  86                 .width          = 4,                    /* bankwidth in bytes */
  87                 .parts          = trizeps4_partitions,
  88                 .nr_parts       = ARRAY_SIZE(trizeps4_partitions)
  89         }
  90 };
  91
  92 static struct resource flash_resource = {
  93         .start  = PXA_CS0_PHYS,
  94         .end    = PXA_CS0_PHYS + SZ_32M - 1,
  95         .flags  = IORESOURCE_MEM,
  96 };
  97
  98 static struct platform_device flash_device = {
  99         .name           = "physmap-flash",
 100         .id             = 0,
 101         .dev = {
 102                 .platform_data = trizeps4_flash_data,
 103         },
 104         .resource = &flash_resource,
 105         .num_resources = 1,
 106 };
 107
 108 /********************************************************************************************
 109  * DAVICOM DM9000 Ethernet
 110  ********************************************************************************************/
 111 static struct resource dm9000_resources[] = {
 112         [0] = {
 113                 .start  = TRIZEPS4_ETH_PHYS+0x300,
 114                 .end    = TRIZEPS4_ETH_PHYS+0x400-1,
 115                 .flags  = IORESOURCE_MEM,
 116         },
 117         [1] = {
 118                 .start  = TRIZEPS4_ETH_PHYS+0x8300,
 119                 .end    = TRIZEPS4_ETH_PHYS+0x8400-1,
 120                 .flags  = IORESOURCE_MEM,
 121         },
 122         [2] = {
 123                 .start  = TRIZEPS4_ETH_IRQ,
 124                 .end    = TRIZEPS4_ETH_IRQ,
 125                 .flags  = (IORESOURCE_IRQ | IRQT_RISING),
 126         },
 127 };
 128
 129 static struct platform_device dm9000_device = {
 130         .name           = "dm9000",
 131         .id             = -1,
 132         .num_resources  = ARRAY_SIZE(dm9000_resources),
 133         .resource       = dm9000_resources,
 134 };
 135
 136 /********************************************************************************************
 137  * PXA270 serial ports
 138  ********************************************************************************************/
 139 static struct plat_serial8250_port tri_serial_ports[] = {
 140 #ifdef CONFIG_SERIAL_PXA
 141         /* this uses the own PXA driver */
 142         {
 143                 0,
 144         },
 145 #else
 146         /* this uses the generic 8520 driver */
 147         [0] = {
 148                 .membase        = (void *)&FFUART,
 149                 .irq            = IRQ_FFUART,
 150                 .flags          = UPF_BOOT_AUTOCONF,
 151                 .iotype         = UPIO_MEM32,
 152                 .regshift       = 2,
 153                 .uartclk        = (921600*16),
 154         },
 155         [1] = {
 156                 .membase        = (void *)&BTUART,
 157                 .irq            = IRQ_BTUART,
 158                 .flags          = UPF_BOOT_AUTOCONF,
 159                 .iotype         = UPIO_MEM32,
 160                 .regshift       = 2,
 161                 .uartclk        = (921600*16),
 162         },
 163         {
 164                 0,
 165         },
 166 #endif
 167 };
 168
 169 static struct platform_device uart_devices = {
 170         .name           = "serial8250",
 171         .id             = 0,
 172         .dev            = {
 173                 .platform_data  = tri_serial_ports,
 174         },
 175         .num_resources  = 0,
 176         .resource       = NULL,
 177 };
 178
 179 /********************************************************************************************
 180  * PXA270 ac97 sound codec
 181  ********************************************************************************************/
 182 static struct platform_device ac97_audio_device = {
 183         .name           = "pxa2xx-ac97",
 184         .id             = -1,
 185 };
 186
 187 static struct platform_device * trizeps4_devices[] __initdata = {
 188         &flash_device,
 189         &uart_devices,
 190         &dm9000_device,
 191         &ac97_audio_device,
 192 };
 193
 194 #ifdef CONFIG_MACH_TRIZEPS4_CONXS
 195 static short trizeps_conxs_bcr;
 196
 197 /* PCCARD power switching supports only 3,3V */
 198 void board_pcmcia_power(int power)
 199 {
 200         if (power) {
 201                 /* switch power on, put in reset and enable buffers */
 202                 trizeps_conxs_bcr |= power;
 203                 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
 204                 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
 205                 ConXS_BCR = trizeps_conxs_bcr;
 206                 /* wait a little */
 207                 udelay(2000);
 208                 /* take reset away */
 209                 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
 210                 ConXS_BCR = trizeps_conxs_bcr;
 211                 udelay(2000);
 212         } else {
 213                 /* put in reset */
 214                 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
 215                 ConXS_BCR = trizeps_conxs_bcr;
 216                 udelay(1000);
 217                 /* switch power off */
 218                 trizeps_conxs_bcr &= ~(0xf);
 219                 ConXS_BCR = trizeps_conxs_bcr;
 220
 221         }
 222         pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr);
 223 }
 224
 225 /* backlight power switching for LCD panel */
 226 static void board_backlight_power(int on)
 227 {
 228         if (on) {
 229                 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
 230         } else {
 231                 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
 232         }
 233         pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr);
 234         ConXS_BCR = trizeps_conxs_bcr;
 235 }
 236
 237 /* Powersupply for MMC/SD cardslot */
 238 static void board_mci_power(struct device *dev, unsigned int vdd)
 239 {
 240         struct pxamci_platform_data* p_d = dev->platform_data;
 241
 242         if (( 1 << vdd) & p_d->ocr_mask) {
 243                 pr_debug("%s: on\n", __func__);
 244                 /* FIXME fill in values here */
 245         } else {
 246                 pr_debug("%s: off\n", __func__);
 247                 /* FIXME fill in values here */
 248         }
 249 }
 250
 251 static short trizeps_conxs_ircr;
 252
 253 /* Switch modes and Power for IRDA receiver */
 254 static void board_irda_mode(struct device *dev, int mode)
 255 {
 256         unsigned long flags;
 257
 258         local_irq_save(flags);
 259         if (mode & IR_SIRMODE) {
 260                 /* Slow mode */
 261                 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
 262         } else if (mode & IR_FIRMODE) {
 263                 /* Fast mode */
 264                 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
 265         }
 266         if (mode & IR_OFF) {
 267                 trizeps_conxs_ircr |= ConXS_IRCR_SD;
 268         } else {
 269                 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
 270         }
 271         /* FIXME write values to register */
 272         local_irq_restore(flags);
 273 }
 274
 275 #else
 276 /* for other baseboards define dummies */
 277 void board_pcmcia_power(int power)      {;}
 278 #define board_backlight_power           NULL
 279 #define board_mci_power                 NULL
 280 #define board_irda_mode                 NULL
 281
 282 #endif          /* CONFIG_MACH_TRIZEPS4_CONXS */
 283 EXPORT_SYMBOL(board_pcmcia_power);
 284
 285 static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
 286 {
 287         int err;
 288         /* setup GPIO for PXA27x MMC controller */
 289         pxa_gpio_mode(GPIO32_MMCCLK_MD);
 290         pxa_gpio_mode(GPIO112_MMCCMD_MD);
 291         pxa_gpio_mode(GPIO92_MMCDAT0_MD);
 292         pxa_gpio_mode(GPIO109_MMCDAT1_MD);
 293         pxa_gpio_mode(GPIO110_MMCDAT2_MD);
 294         pxa_gpio_mode(GPIO111_MMCDAT3_MD);
 295
 296         pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
 297
 298         err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
 299                           IRQF_DISABLED | IRQF_TRIGGER_RISING,
 300                           "MMC card detect", data);
 301         if (err)
 302                 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
 303
 304         return err;
 305 }
 306
 307 static void trizeps4_mci_exit(struct device *dev, void *data)
 308 {
 309         free_irq(TRIZEPS4_MMC_IRQ, data);
 310 }
 311
 312 static struct pxamci_platform_data trizeps4_mci_platform_data = {
 313         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 314         .init           = trizeps4_mci_init,
 315         .exit           = trizeps4_mci_exit,
 316         .setpower       = board_mci_power,
 317 };
 318
 319 static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
 320         .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
 321         .transceiver_mode = board_irda_mode,
 322 };
 323
 324 static int trizeps4_ohci_init(struct device *dev)
 325 {
 326         /* setup Port1 GPIO pin. */
 327         pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN);  /* USBHPWR1 */
 328         pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
 329
 330         /* Set the Power Control Polarity Low and Power Sense
 331            Polarity Low to active low. */
 332         UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
 333                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
 334
 335         return 0;
 336 }
 337
 338 static void trizeps4_ohci_exit(struct device *dev)
 339 {
 340         ;
 341 }
 342
 343 static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
 344         .port_mode      = PMM_PERPORT_MODE,
 345         .init           = trizeps4_ohci_init,
 346         .exit           = trizeps4_ohci_exit,
 347 };
 348
 349 static struct map_desc trizeps4_io_desc[] __initdata = {
 350         {       /* ConXS CFSR */
 351                 .virtual        = TRIZEPS4_CFSR_VIRT,
 352                 .pfn            = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
 353                 .length         = 0x00001000,
 354                 .type           = MT_DEVICE
 355         },
 356         {       /* ConXS BCR */
 357                 .virtual        = TRIZEPS4_BOCR_VIRT,
 358                 .pfn            = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
 359                 .length         = 0x00001000,
 360                 .type           = MT_DEVICE
 361         },
 362         {       /* ConXS IRCR */
 363                 .virtual        = TRIZEPS4_IRCR_VIRT,
 364                 .pfn            = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
 365                 .length         = 0x00001000,
 366                 .type           = MT_DEVICE
 367         },
 368         {       /* ConXS DCR */
 369                 .virtual        = TRIZEPS4_DICR_VIRT,
 370                 .pfn            = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
 371                 .length         = 0x00001000,
 372                 .type           = MT_DEVICE
 373         },
 374         {       /* ConXS UPSR */
 375                 .virtual        = TRIZEPS4_UPSR_VIRT,
 376                 .pfn            = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
 377                 .length         = 0x00001000,
 378                 .type           = MT_DEVICE
 379         }
 380 };
 381
 382 static struct pxafb_mode_info sharp_lcd_mode = {
 383     .pixclock           = 78000,
 384     .xres               = 640,
 385     .yres               = 480,
 386     .bpp                = 8,
 387     .hsync_len          = 4,
 388     .left_margin        = 4,
 389     .right_margin       = 4,
 390     .vsync_len          = 2,
 391     .upper_margin       = 0,
 392     .lower_margin       = 0,
 393     .sync               = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 394     .cmap_greyscale     = 0,
 395 };
 396
 397 static struct pxafb_mach_info sharp_lcd = {
 398     .modes              = &sharp_lcd_mode,
 399     .num_modes  = 1,
 400     .cmap_inverse       = 0,
 401     .cmap_static        = 0,
 402     .lccr0              = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
 403     .lccr3              = 0x0340ff02,
 404     .pxafb_backlight_power = board_backlight_power,
 405 };
 406
 407 static struct pxafb_mode_info toshiba_lcd_mode = {
 408     .pixclock           = 39720,
 409     .xres               = 640,
 410     .yres               = 480,
 411     .bpp                = 8,
 412     .hsync_len          = 63,
 413     .left_margin        = 12,
 414     .right_margin       = 12,
 415     .vsync_len          = 4,
 416     .upper_margin       = 32,
 417     .lower_margin       = 10,
 418     .sync               = 0,
 419     .cmap_greyscale     = 0,
 420 };
 421
 422 static struct pxafb_mach_info toshiba_lcd = {
 423     .modes              = &toshiba_lcd_mode,
 424     .num_modes  = 1,
 425     .cmap_inverse       = 0,
 426     .cmap_static        = 0,
 427     .lccr0              = LCCR0_Color | LCCR0_Act,
 428     .lccr3              = 0x03400002,
 429     .pxafb_backlight_power = board_backlight_power,
 430 };
 431
 432 static void __init trizeps4_init(void)
 433 {
 434         platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
 435
 436 /*      set_pxa_fb_info(&sharp_lcd); */
 437         set_pxa_fb_info(&toshiba_lcd);
 438
 439         pxa_set_mci_info(&trizeps4_mci_platform_data);
 440         pxa_set_ficp_info(&trizeps4_ficp_platform_data);
 441         pxa_set_ohci_info(&trizeps4_ohci_platform_data);
 442 }
 443
 444 static void __init trizeps4_map_io(void)
 445 {
 446         pxa_map_io();
 447         iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
 448
 449         /* for DiskOnChip */
 450         pxa_gpio_mode(GPIO15_nCS_1_MD);
 451
 452         /* for off-module PIC on ConXS board */
 453         pxa_gpio_mode(GPIO_PIC | GPIO_IN);
 454
 455         /* UCB1400 irq */
 456         pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
 457
 458         /* for DM9000 LAN */
 459         pxa_gpio_mode(GPIO78_nCS_2_MD);
 460         pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
 461
 462         /* for PCMCIA device */
 463         pxa_gpio_mode(GPIO_PCD | GPIO_IN);
 464         pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
 465
 466         /* for I2C adapter */
 467         pxa_gpio_mode(GPIO117_I2CSCL_MD);
 468         pxa_gpio_mode(GPIO118_I2CSDA_MD);
 469
 470         /* MMC_DET s.o. */
 471         pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
 472
 473         /* whats that for ??? */
 474         pxa_gpio_mode(GPIO79_nCS_3_MD);
 475
 476 #ifdef CONFIG_LEDS
 477         pxa_gpio_mode( GPIO_SYS_BUSY_LED  | GPIO_OUT);          /* LED1 */
 478         pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT);          /* LED2 */
 479 #endif
 480 #ifdef CONFIG_MACH_TRIZEPS4_CONXS
 481 #ifdef CONFIG_IDE_PXA_CF
 482         /* if boot direct from compact flash dont disable power */
 483         trizeps_conxs_bcr = 0x0009;
 484 #else
 485         /* this is the reset value */
 486         trizeps_conxs_bcr = 0x00A0;
 487 #endif
 488         ConXS_BCR = trizeps_conxs_bcr;
 489 #endif
 490
 491 #warning FIXME - accessing PM registers directly is deprecated
 492         PWER  = 0x00000002;
 493         PFER  = 0x00000000;
 494         PRER  = 0x00000002;
 495         PGSR0 = 0x0158C000;
 496         PGSR1 = 0x00FF0080;
 497         PGSR2 = 0x0001C004;
 498         /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
 499         PCFR |= PCFR_OPDE;
 500 }
 501
 502 MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
 503         /* MAINTAINER("Jürgen Schindele") */
 504         .phys_io        = 0x40000000,
 505         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 506         .boot_params    = TRIZEPS4_SDRAM_BASE + 0x100,
 507         .init_machine   = trizeps4_init,
 508         .map_io         = trizeps4_map_io,
 509         .init_irq       = pxa27x_init_irq,
 510         .timer          = &pxa_timer,
 511 MACHINE_END
 512