2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/wait.h>
33 #include <linux/mutex.h>
35 #include <asm/spu_priv1.h>
38 const struct spu_management_ops *spu_management_ops;
39 EXPORT_SYMBOL_GPL(spu_management_ops);
41 const struct spu_priv1_ops *spu_priv1_ops;
43 static struct list_head spu_list[MAX_NUMNODES];
44 static LIST_HEAD(spu_full_list);
45 static DEFINE_MUTEX(spu_mutex);
46 static DEFINE_SPINLOCK(spu_list_lock);
48 EXPORT_SYMBOL_GPL(spu_priv1_ops);
50 void spu_invalidate_slbs(struct spu *spu)
52 struct spu_priv2 __iomem *priv2 = spu->priv2;
54 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
55 out_be64(&priv2->slb_invalidate_all_W, 0UL);
57 EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
59 /* This is called by the MM core when a segment size is changed, to
60 * request a flush of all the SPEs using a given mm
62 void spu_flush_all_slbs(struct mm_struct *mm)
67 spin_lock_irqsave(&spu_list_lock, flags);
68 list_for_each_entry(spu, &spu_full_list, full_list) {
70 spu_invalidate_slbs(spu);
72 spin_unlock_irqrestore(&spu_list_lock, flags);
75 /* The hack below stinks... try to do something better one of
76 * these days... Does it even work properly with NR_CPUS == 1 ?
78 static inline void mm_needs_global_tlbie(struct mm_struct *mm)
80 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
82 /* Global TLBIE broadcast required with SPEs. */
83 __cpus_setall(&mm->cpu_vm_mask, nr);
86 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
90 spin_lock_irqsave(&spu_list_lock, flags);
92 spin_unlock_irqrestore(&spu_list_lock, flags);
94 mm_needs_global_tlbie(mm);
96 EXPORT_SYMBOL_GPL(spu_associate_mm);
98 static int __spu_trap_invalid_dma(struct spu *spu)
100 pr_debug("%s\n", __FUNCTION__);
101 spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
105 static int __spu_trap_dma_align(struct spu *spu)
107 pr_debug("%s\n", __FUNCTION__);
108 spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
112 static int __spu_trap_error(struct spu *spu)
114 pr_debug("%s\n", __FUNCTION__);
115 spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
119 static void spu_restart_dma(struct spu *spu)
121 struct spu_priv2 __iomem *priv2 = spu->priv2;
123 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
124 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
127 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
129 struct spu_priv2 __iomem *priv2 = spu->priv2;
130 struct mm_struct *mm = spu->mm;
134 pr_debug("%s\n", __FUNCTION__);
136 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
137 /* SLBs are pre-loaded for context switch, so
138 * we should never get here!
140 printk("%s: invalid access during switch!\n", __func__);
143 esid = (ea & ESID_MASK) | SLB_ESID_V;
145 switch(REGION_ID(ea)) {
147 #ifdef CONFIG_PPC_MM_SLICES
148 psize = get_slice_psize(mm, ea);
150 psize = mm->context.user_psize;
152 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
155 case VMALLOC_REGION_ID:
156 if (ea < VMALLOC_END)
157 psize = mmu_vmalloc_psize;
159 psize = mmu_io_psize;
160 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
163 case KERNEL_REGION_ID:
164 psize = mmu_linear_psize;
165 vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
169 /* Future: support kernel segments so that drivers
172 pr_debug("invalid region access at %016lx\n", ea);
175 llp = mmu_psize_defs[psize].sllp;
177 out_be64(&priv2->slb_index_W, spu->slb_replace);
178 out_be64(&priv2->slb_vsid_RW, vsid | llp);
179 out_be64(&priv2->slb_esid_RW, esid);
182 if (spu->slb_replace >= 8)
183 spu->slb_replace = 0;
185 spu_restart_dma(spu);
186 spu->stats.slb_flt++;
190 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
191 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
193 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
195 /* Handle kernel space hash faults immediately.
196 User hash faults need to be deferred to process context. */
197 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
198 && REGION_ID(ea) != USER_REGION_ID
199 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
200 spu_restart_dma(spu);
204 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
205 printk("%s: invalid access during switch!\n", __func__);
212 spu->stop_callback(spu);
217 spu_irq_class_0(int irq, void *data)
222 spu->class_0_pending = 1;
223 spu->stop_callback(spu);
229 spu_irq_class_0_bottom(struct spu *spu)
231 unsigned long stat, mask;
234 spu->class_0_pending = 0;
236 spin_lock_irqsave(&spu->register_lock, flags);
237 mask = spu_int_mask_get(spu, 0);
238 stat = spu_int_stat_get(spu, 0);
242 if (stat & 1) /* invalid DMA alignment */
243 __spu_trap_dma_align(spu);
245 if (stat & 2) /* invalid MFC DMA */
246 __spu_trap_invalid_dma(spu);
248 if (stat & 4) /* error on SPU */
249 __spu_trap_error(spu);
251 spu_int_stat_clear(spu, 0, stat);
252 spin_unlock_irqrestore(&spu->register_lock, flags);
254 return (stat & 0x7) ? -EIO : 0;
256 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
259 spu_irq_class_1(int irq, void *data)
262 unsigned long stat, mask, dar, dsisr;
266 /* atomically read & clear class1 status. */
267 spin_lock(&spu->register_lock);
268 mask = spu_int_mask_get(spu, 1);
269 stat = spu_int_stat_get(spu, 1) & mask;
270 dar = spu_mfc_dar_get(spu);
271 dsisr = spu_mfc_dsisr_get(spu);
272 if (stat & 2) /* mapping fault */
273 spu_mfc_dsisr_set(spu, 0ul);
274 spu_int_stat_clear(spu, 1, stat);
275 spin_unlock(&spu->register_lock);
276 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
279 if (stat & 1) /* segment fault */
280 __spu_trap_data_seg(spu, dar);
282 if (stat & 2) { /* mapping fault */
283 __spu_trap_data_map(spu, dar, dsisr);
286 if (stat & 4) /* ls compare & suspend on get */
289 if (stat & 8) /* ls compare & suspend on put */
292 return stat ? IRQ_HANDLED : IRQ_NONE;
296 spu_irq_class_2(int irq, void *data)
303 spin_lock(&spu->register_lock);
304 stat = spu_int_stat_get(spu, 2);
305 mask = spu_int_mask_get(spu, 2);
306 /* ignore interrupts we're not waiting for */
309 * mailbox interrupts (0x1 and 0x10) are level triggered.
310 * mask them now before acknowledging.
313 spu_int_mask_and(spu, 2, ~(stat & 0x11));
314 /* acknowledge all interrupts before the callbacks */
315 spu_int_stat_clear(spu, 2, stat);
316 spin_unlock(&spu->register_lock);
318 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
320 if (stat & 1) /* PPC core mailbox */
321 spu->ibox_callback(spu);
323 if (stat & 2) /* SPU stop-and-signal */
324 spu->stop_callback(spu);
326 if (stat & 4) /* SPU halted */
327 spu->stop_callback(spu);
329 if (stat & 8) /* DMA tag group complete */
330 spu->mfc_callback(spu);
332 if (stat & 0x10) /* SPU mailbox threshold */
333 spu->wbox_callback(spu);
335 spu->stats.class2_intr++;
336 return stat ? IRQ_HANDLED : IRQ_NONE;
339 static int spu_request_irqs(struct spu *spu)
343 if (spu->irqs[0] != NO_IRQ) {
344 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
346 ret = request_irq(spu->irqs[0], spu_irq_class_0,
352 if (spu->irqs[1] != NO_IRQ) {
353 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
355 ret = request_irq(spu->irqs[1], spu_irq_class_1,
361 if (spu->irqs[2] != NO_IRQ) {
362 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
364 ret = request_irq(spu->irqs[2], spu_irq_class_2,
373 if (spu->irqs[1] != NO_IRQ)
374 free_irq(spu->irqs[1], spu);
376 if (spu->irqs[0] != NO_IRQ)
377 free_irq(spu->irqs[0], spu);
382 static void spu_free_irqs(struct spu *spu)
384 if (spu->irqs[0] != NO_IRQ)
385 free_irq(spu->irqs[0], spu);
386 if (spu->irqs[1] != NO_IRQ)
387 free_irq(spu->irqs[1], spu);
388 if (spu->irqs[2] != NO_IRQ)
389 free_irq(spu->irqs[2], spu);
392 static void spu_init_channels(struct spu *spu)
394 static const struct {
398 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
399 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
401 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
402 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
403 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
405 struct spu_priv2 __iomem *priv2;
410 /* initialize all channel data to zero */
411 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
414 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
415 for (count = 0; count < zero_list[i].count; count++)
416 out_be64(&priv2->spu_chnldata_RW, 0);
419 /* initialize channel counts to meaningful values */
420 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
421 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
422 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
426 struct spu *spu_alloc_node(int node)
428 struct spu *spu = NULL;
430 mutex_lock(&spu_mutex);
431 if (!list_empty(&spu_list[node])) {
432 spu = list_entry(spu_list[node].next, struct spu, list);
433 list_del_init(&spu->list);
434 pr_debug("Got SPU %d %d\n", spu->number, spu->node);
436 mutex_unlock(&spu_mutex);
439 spu_init_channels(spu);
442 EXPORT_SYMBOL_GPL(spu_alloc_node);
444 struct spu *spu_alloc(void)
446 struct spu *spu = NULL;
449 for (node = 0; node < MAX_NUMNODES; node++) {
450 spu = spu_alloc_node(node);
458 void spu_free(struct spu *spu)
460 mutex_lock(&spu_mutex);
461 list_add_tail(&spu->list, &spu_list[spu->node]);
462 mutex_unlock(&spu_mutex);
464 EXPORT_SYMBOL_GPL(spu_free);
466 static int spu_shutdown(struct sys_device *sysdev)
468 struct spu *spu = container_of(sysdev, struct spu, sysdev);
471 spu_destroy_spu(spu);
475 struct sysdev_class spu_sysdev_class = {
476 set_kset_name("spu"),
477 .shutdown = spu_shutdown,
480 int spu_add_sysdev_attr(struct sysdev_attribute *attr)
483 mutex_lock(&spu_mutex);
485 list_for_each_entry(spu, &spu_full_list, full_list)
486 sysdev_create_file(&spu->sysdev, attr);
488 mutex_unlock(&spu_mutex);
491 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
493 int spu_add_sysdev_attr_group(struct attribute_group *attrs)
496 mutex_lock(&spu_mutex);
498 list_for_each_entry(spu, &spu_full_list, full_list)
499 sysfs_create_group(&spu->sysdev.kobj, attrs);
501 mutex_unlock(&spu_mutex);
504 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
507 void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
510 mutex_lock(&spu_mutex);
512 list_for_each_entry(spu, &spu_full_list, full_list)
513 sysdev_remove_file(&spu->sysdev, attr);
515 mutex_unlock(&spu_mutex);
517 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
519 void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
522 mutex_lock(&spu_mutex);
524 list_for_each_entry(spu, &spu_full_list, full_list)
525 sysfs_remove_group(&spu->sysdev.kobj, attrs);
527 mutex_unlock(&spu_mutex);
529 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
531 static int spu_create_sysdev(struct spu *spu)
535 spu->sysdev.id = spu->number;
536 spu->sysdev.cls = &spu_sysdev_class;
537 ret = sysdev_register(&spu->sysdev);
539 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
544 sysfs_add_device_to_node(&spu->sysdev, spu->node);
549 static int __init create_spu(void *data)
557 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
561 spin_lock_init(&spu->register_lock);
562 mutex_lock(&spu_mutex);
563 spu->number = number++;
564 mutex_unlock(&spu_mutex);
566 ret = spu_create_spu(spu, data);
571 spu_mfc_sdr_setup(spu);
572 spu_mfc_sr1_set(spu, 0x33);
573 ret = spu_request_irqs(spu);
577 ret = spu_create_sysdev(spu);
581 mutex_lock(&spu_mutex);
582 spin_lock_irqsave(&spu_list_lock, flags);
583 list_add(&spu->list, &spu_list[spu->node]);
584 list_add(&spu->full_list, &spu_full_list);
585 spin_unlock_irqrestore(&spu_list_lock, flags);
586 mutex_unlock(&spu_mutex);
588 spu->stats.utilization_state = SPU_UTIL_IDLE;
589 spu->stats.tstamp = jiffies;
596 spu_destroy_spu(spu);
603 static const char *spu_state_names[] = {
604 "user", "system", "iowait", "idle"
607 static unsigned long long spu_acct_time(struct spu *spu,
608 enum spu_utilization_state state)
610 unsigned long long time = spu->stats.times[state];
612 if (spu->stats.utilization_state == state)
613 time += jiffies - spu->stats.tstamp;
615 return jiffies_to_msecs(time);
619 static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
621 struct spu *spu = container_of(sysdev, struct spu, sysdev);
623 return sprintf(buf, "%s %llu %llu %llu %llu "
624 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
625 spu_state_names[spu->stats.utilization_state],
626 spu_acct_time(spu, SPU_UTIL_USER),
627 spu_acct_time(spu, SPU_UTIL_SYSTEM),
628 spu_acct_time(spu, SPU_UTIL_IOWAIT),
629 spu_acct_time(spu, SPU_UTIL_IDLE),
630 spu->stats.vol_ctx_switch,
631 spu->stats.invol_ctx_switch,
636 spu->stats.class2_intr,
637 spu->stats.libassist);
640 static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
642 static int __init init_spu_base(void)
646 for (i = 0; i < MAX_NUMNODES; i++)
647 INIT_LIST_HEAD(&spu_list[i]);
649 if (!spu_management_ops)
652 /* create sysdev class for spus */
653 ret = sysdev_class_register(&spu_sysdev_class);
657 ret = spu_enumerate_spus(create_spu);
660 printk(KERN_WARNING "%s: Error initializing spus\n",
662 goto out_unregister_sysdev_class;
665 xmon_register_spus(&spu_full_list);
667 spu_add_sysdev_attr(&attr_stat);
671 out_unregister_sysdev_class:
672 sysdev_class_unregister(&spu_sysdev_class);
677 module_init(init_spu_base);
679 MODULE_LICENSE("GPL");
680 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");