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   1 /*
   2  *    Disk Array driver for Compaq SMART2 Controllers
   3  *    Copyright 1998 Compaq Computer Corporation
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; either version 2 of the License, or
   8  *    (at your option) any later version.
   9  *
  10  *    This program is distributed in the hope that it will be useful,
  11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  14  *
  15  *    You should have received a copy of the GNU General Public License
  16  *    along with this program; if not, write to the Free Software
  17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20  *
  21  */
  22 #include <linux/module.h>
  23 #include <linux/types.h>
  24 #include <linux/pci.h>
  25 #include <linux/bio.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/major.h>
  31 #include <linux/fs.h>
  32 #include <linux/blkpg.h>
  33 #include <linux/timer.h>
  34 #include <linux/proc_fs.h>
  35 #include <linux/init.h>
  36 #include <linux/hdreg.h>
  37 #include <linux/spinlock.h>
  38 #include <linux/blkdev.h>
  39 #include <linux/genhd.h>
  40 #include <asm/uaccess.h>
  41 #include <asm/io.h>
  42
  43
  44 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  45
  46 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
  47 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
  48
  49 /* Embedded module documentation macros - see modules.h */
  50 /* Original author Chris Frantz - Compaq Computer Corporation */
  51 MODULE_AUTHOR("Compaq Computer Corporation");
  52 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
  53 MODULE_LICENSE("GPL");
  54
  55 #include "cpqarray.h"
  56 #include "ida_cmd.h"
  57 #include "smart1,2.h"
  58 #include "ida_ioctl.h"
  59
  60 #define READ_AHEAD      128
  61 #define NR_CMDS         128 /* This could probably go as high as ~400 */
  62
  63 #define MAX_CTLR        8
  64 #define CTLR_SHIFT      8
  65
  66 #define CPQARRAY_DMA_MASK       0xFFFFFFFF      /* 32 bit DMA */
  67
  68 static int nr_ctlr;
  69 static ctlr_info_t *hba[MAX_CTLR];
  70
  71 static int eisa[8];
  72
  73 #define NR_PRODUCTS ARRAY_SIZE(products)
  74
  75 /*  board_id = Subsystem Device ID & Vendor ID
  76  *  product = Marketing Name for the board
  77  *  access = Address of the struct of function pointers
  78  */
  79 static struct board_type products[] = {
  80         { 0x0040110E, "IDA",                    &smart1_access },
  81         { 0x0140110E, "IDA-2",                  &smart1_access },
  82         { 0x1040110E, "IAES",                   &smart1_access },
  83         { 0x2040110E, "SMART",                  &smart1_access },
  84         { 0x3040110E, "SMART-2/E",              &smart2e_access },
  85         { 0x40300E11, "SMART-2/P",              &smart2_access },
  86         { 0x40310E11, "SMART-2SL",              &smart2_access },
  87         { 0x40320E11, "Smart Array 3200",       &smart2_access },
  88         { 0x40330E11, "Smart Array 3100ES",     &smart2_access },
  89         { 0x40340E11, "Smart Array 221",        &smart2_access },
  90         { 0x40400E11, "Integrated Array",       &smart4_access },
  91         { 0x40480E11, "Compaq Raid LC2",        &smart4_access },
  92         { 0x40500E11, "Smart Array 4200",       &smart4_access },
  93         { 0x40510E11, "Smart Array 4250ES",     &smart4_access },
  94         { 0x40580E11, "Smart Array 431",        &smart4_access },
  95 };
  96
  97 /* define the PCI info for the PCI cards this driver can control */
  98 static const struct pci_device_id cpqarray_pci_device_id[] =
  99 {
 100         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 101                 0x0E11, 0x4058, 0, 0, 0},       /* SA431 */
 102         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 103                 0x0E11, 0x4051, 0, 0, 0},      /* SA4250ES */
 104         { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
 105                 0x0E11, 0x4050, 0, 0, 0},      /* SA4200 */
 106         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 107                 0x0E11, 0x4048, 0, 0, 0},       /* LC2 */
 108         { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
 109                 0x0E11, 0x4040, 0, 0, 0},      /* Integrated Array */
 110         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 111                 0x0E11, 0x4034, 0, 0, 0},       /* SA 221 */
 112         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 113                 0x0E11, 0x4033, 0, 0, 0},       /* SA 3100ES*/
 114         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 115                 0x0E11, 0x4032, 0, 0, 0},       /* SA 3200*/
 116         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 117                 0x0E11, 0x4031, 0, 0, 0},       /* SA 2SL*/
 118         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
 119                 0x0E11, 0x4030, 0, 0, 0},       /* SA 2P */
 120         { 0 }
 121 };
 122
 123 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
 124
 125 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
 126
 127 /* Debug... */
 128 #define DBG(s)  do { s } while(0)
 129 /* Debug (general info)... */
 130 #define DBGINFO(s) do { } while(0)
 131 /* Debug Paranoid... */
 132 #define DBGP(s)  do { } while(0)
 133 /* Debug Extra Paranoid... */
 134 #define DBGPX(s) do { } while(0)
 135
 136 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
 137 static void __iomem *remap_pci_mem(ulong base, ulong size);
 138 static int cpqarray_eisa_detect(void);
 139 static int pollcomplete(int ctlr);
 140 static void getgeometry(int ctlr);
 141 static void start_fwbk(int ctlr);
 142
 143 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
 144 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
 145
 146 static void free_hba(int i);
 147 static int alloc_cpqarray_hba(void);
 148
 149 static int sendcmd(
 150         __u8    cmd,
 151         int     ctlr,
 152         void    *buff,
 153         size_t  size,
 154         unsigned int blk,
 155         unsigned int blkcnt,
 156         unsigned int log_unit );
 157
 158 static int ida_open(struct inode *inode, struct file *filep);
 159 static int ida_release(struct inode *inode, struct file *filep);
 160 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
 161 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 162 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
 163
 164 static void do_ida_request(struct request_queue *q);
 165 static void start_io(ctlr_info_t *h);
 166
 167 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
 168 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
 169 static inline void complete_buffers(struct bio *bio, int ok);
 170 static inline void complete_command(cmdlist_t *cmd, int timeout);
 171
 172 static irqreturn_t do_ida_intr(int irq, void *dev_id);
 173 static void ida_timer(unsigned long tdata);
 174 static int ida_revalidate(struct gendisk *disk);
 175 static int revalidate_allvol(ctlr_info_t *host);
 176 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
 177
 178 #ifdef CONFIG_PROC_FS
 179 static void ida_procinit(int i);
 180 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
 181 #else
 182 static void ida_procinit(int i) {}
 183 #endif
 184
 185 static inline drv_info_t *get_drv(struct gendisk *disk)
 186 {
 187         return disk->private_data;
 188 }
 189
 190 static inline ctlr_info_t *get_host(struct gendisk *disk)
 191 {
 192         return disk->queue->queuedata;
 193 }
 194
 195
 196 static struct block_device_operations ida_fops  = {
 197         .owner          = THIS_MODULE,
 198         .open           = ida_open,
 199         .release        = ida_release,
 200         .ioctl          = ida_ioctl,
 201         .getgeo         = ida_getgeo,
 202         .revalidate_disk= ida_revalidate,
 203 };
 204
 205
 206 #ifdef CONFIG_PROC_FS
 207
 208 static struct proc_dir_entry *proc_array;
 209
 210 /*
 211  * Get us a file in /proc/array that says something about each controller.
 212  * Create /proc/array if it doesn't exist yet.
 213  */
 214 static void __init ida_procinit(int i)
 215 {
 216         if (proc_array == NULL) {
 217                 proc_array = proc_mkdir("cpqarray", proc_root_driver);
 218                 if (!proc_array) return;
 219         }
 220
 221         create_proc_read_entry(hba[i]->devname, 0, proc_array,
 222                                ida_proc_get_info, hba[i]);
 223 }
 224
 225 /*
 226  * Report information about this controller.
 227  */
 228 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
 229 {
 230         off_t pos = 0;
 231         off_t len = 0;
 232         int size, i, ctlr;
 233         ctlr_info_t *h = (ctlr_info_t*)data;
 234         drv_info_t *drv;
 235 #ifdef CPQ_PROC_PRINT_QUEUES
 236         cmdlist_t *c;
 237         unsigned long flags;
 238 #endif
 239
 240         ctlr = h->ctlr;
 241         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
 242                 "       Board ID: 0x%08lx\n"
 243                 "       Firmware Revision: %c%c%c%c\n"
 244                 "       Controller Sig: 0x%08lx\n"
 245                 "       Memory Address: 0x%08lx\n"
 246                 "       I/O Port: 0x%04x\n"
 247                 "       IRQ: %d\n"
 248                 "       Logical drives: %d\n"
 249                 "       Physical drives: %d\n\n"
 250                 "       Current Q depth: %d\n"
 251                 "       Max Q depth since init: %d\n\n",
 252                 h->devname,
 253                 h->product_name,
 254                 (unsigned long)h->board_id,
 255                 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
 256                 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
 257                 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
 258                 h->log_drives, h->phys_drives,
 259                 h->Qdepth, h->maxQsinceinit);
 260
 261         pos += size; len += size;
 262
 263         size = sprintf(buffer+len, "Logical Drive Info:\n");
 264         pos += size; len += size;
 265
 266         for(i=0; i<h->log_drives; i++) {
 267                 drv = &h->drv[i];
 268                 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
 269                                 ctlr, i, drv->blk_size, drv->nr_blks);
 270                 pos += size; len += size;
 271         }
 272
 273 #ifdef CPQ_PROC_PRINT_QUEUES
 274         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
 275         size = sprintf(buffer+len, "\nCurrent Queues:\n");
 276         pos += size; len += size;
 277
 278         c = h->reqQ;
 279         size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
 280         if (c) c=c->next;
 281         while(c && c != h->reqQ) {
 282                 size = sprintf(buffer+len, "->%p", c);
 283                 pos += size; len += size;
 284                 c=c->next;
 285         }
 286
 287         c = h->cmpQ;
 288         size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
 289         if (c) c=c->next;
 290         while(c && c != h->cmpQ) {
 291                 size = sprintf(buffer+len, "->%p", c);
 292                 pos += size; len += size;
 293                 c=c->next;
 294         }
 295
 296         size = sprintf(buffer+len, "\n"); pos += size; len += size;
 297         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
 298 #endif
 299         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
 300                         h->nr_allocs, h->nr_frees);
 301         pos += size; len += size;
 302
 303         *eof = 1;
 304         *start = buffer+offset;
 305         len -= offset;
 306         if (len>length)
 307                 len = length;
 308         return len;
 309 }
 310 #endif /* CONFIG_PROC_FS */
 311
 312 module_param_array(eisa, int, NULL, 0);
 313
 314 static void release_io_mem(ctlr_info_t *c)
 315 {
 316         /* if IO mem was not protected do nothing */
 317         if( c->io_mem_addr == 0)
 318                 return;
 319         release_region(c->io_mem_addr, c->io_mem_length);
 320         c->io_mem_addr = 0;
 321         c->io_mem_length = 0;
 322 }
 323
 324 static void __devexit cpqarray_remove_one(int i)
 325 {
 326         int j;
 327         char buff[4];
 328
 329         /* sendcmd will turn off interrupt, and send the flush...
 330          * To write all data in the battery backed cache to disks
 331          * no data returned, but don't want to send NULL to sendcmd */
 332         if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
 333         {
 334                 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
 335                                 i);
 336         }
 337         free_irq(hba[i]->intr, hba[i]);
 338         iounmap(hba[i]->vaddr);
 339         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 340         del_timer(&hba[i]->timer);
 341         remove_proc_entry(hba[i]->devname, proc_array);
 342         pci_free_consistent(hba[i]->pci_dev,
 343                         NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
 344                         hba[i]->cmd_pool_dhandle);
 345         kfree(hba[i]->cmd_pool_bits);
 346         for(j = 0; j < NWD; j++) {
 347                 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
 348                         del_gendisk(ida_gendisk[i][j]);
 349                 put_disk(ida_gendisk[i][j]);
 350         }
 351         blk_cleanup_queue(hba[i]->queue);
 352         release_io_mem(hba[i]);
 353         free_hba(i);
 354 }
 355
 356 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
 357 {
 358         int i;
 359         ctlr_info_t *tmp_ptr;
 360
 361         if (pci_get_drvdata(pdev) == NULL) {
 362                 printk( KERN_ERR "cpqarray: Unable to remove device \n");
 363                 return;
 364         }
 365
 366         tmp_ptr = pci_get_drvdata(pdev);
 367         i = tmp_ptr->ctlr;
 368         if (hba[i] == NULL) {
 369                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 370                         "already been removed \n", i);
 371                 return;
 372         }
 373         pci_set_drvdata(pdev, NULL);
 374
 375         cpqarray_remove_one(i);
 376 }
 377
 378 /* removing an instance that was not removed automatically..
 379  * must be an eisa card.
 380  */
 381 static void __devexit cpqarray_remove_one_eisa (int i)
 382 {
 383         if (hba[i] == NULL) {
 384                 printk(KERN_ERR "cpqarray: controller %d appears to have"
 385                         "already been removed \n", i);
 386                 return;
 387         }
 388         cpqarray_remove_one(i);
 389 }
 390
 391 /* pdev is NULL for eisa */
 392 static int __init cpqarray_register_ctlr( int i, struct pci_dev *pdev)
 393 {
 394         struct request_queue *q;
 395         int j;
 396
 397         /*
 398          * register block devices
 399          * Find disks and fill in structs
 400          * Get an interrupt, set the Q depth and get into /proc
 401          */
 402
 403         /* If this successful it should insure that we are the only */
 404         /* instance of the driver */
 405         if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
 406                 goto Enomem4;
 407         }
 408         hba[i]->access.set_intr_mask(hba[i], 0);
 409         if (request_irq(hba[i]->intr, do_ida_intr,
 410                 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
 411         {
 412                 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
 413                                 hba[i]->intr, hba[i]->devname);
 414                 goto Enomem3;
 415         }
 416
 417         for (j=0; j<NWD; j++) {
 418                 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
 419                 if (!ida_gendisk[i][j])
 420                         goto Enomem2;
 421         }
 422
 423         hba[i]->cmd_pool = pci_alloc_consistent(
 424                 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
 425                 &(hba[i]->cmd_pool_dhandle));
 426         hba[i]->cmd_pool_bits = kcalloc(
 427                 (NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG, sizeof(unsigned long),
 428                 GFP_KERNEL);
 429
 430         if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
 431                         goto Enomem1;
 432
 433         memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
 434         printk(KERN_INFO "cpqarray: Finding drives on %s",
 435                 hba[i]->devname);
 436
 437         spin_lock_init(&hba[i]->lock);
 438         q = blk_init_queue(do_ida_request, &hba[i]->lock);
 439         if (!q)
 440                 goto Enomem1;
 441
 442         hba[i]->queue = q;
 443         q->queuedata = hba[i];
 444
 445         getgeometry(i);
 446         start_fwbk(i);
 447
 448         ida_procinit(i);
 449
 450         if (pdev)
 451                 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
 452
 453         /* This is a hardware imposed limit. */
 454         blk_queue_max_hw_segments(q, SG_MAX);
 455
 456         /* This is a driver limit and could be eliminated. */
 457         blk_queue_max_phys_segments(q, SG_MAX);
 458
 459         init_timer(&hba[i]->timer);
 460         hba[i]->timer.expires = jiffies + IDA_TIMER;
 461         hba[i]->timer.data = (unsigned long)hba[i];
 462         hba[i]->timer.function = ida_timer;
 463         add_timer(&hba[i]->timer);
 464
 465         /* Enable IRQ now that spinlock and rate limit timer are set up */
 466         hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
 467
 468         for(j=0; j<NWD; j++) {
 469                 struct gendisk *disk = ida_gendisk[i][j];
 470                 drv_info_t *drv = &hba[i]->drv[j];
 471                 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
 472                 disk->major = COMPAQ_SMART2_MAJOR + i;
 473                 disk->first_minor = j<<NWD_SHIFT;
 474                 disk->fops = &ida_fops;
 475                 if (j && !drv->nr_blks)
 476                         continue;
 477                 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
 478                 set_capacity(disk, drv->nr_blks);
 479                 disk->queue = hba[i]->queue;
 480                 disk->private_data = drv;
 481                 add_disk(disk);
 482         }
 483
 484         /* done ! */
 485         return(i);
 486
 487 Enomem1:
 488         nr_ctlr = i;
 489         kfree(hba[i]->cmd_pool_bits);
 490         if (hba[i]->cmd_pool)
 491                 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
 492                                     hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
 493 Enomem2:
 494         while (j--) {
 495                 put_disk(ida_gendisk[i][j]);
 496                 ida_gendisk[i][j] = NULL;
 497         }
 498         free_irq(hba[i]->intr, hba[i]);
 499 Enomem3:
 500         unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
 501 Enomem4:
 502         if (pdev)
 503                 pci_set_drvdata(pdev, NULL);
 504         release_io_mem(hba[i]);
 505         free_hba(i);
 506
 507         printk( KERN_ERR "cpqarray: out of memory");
 508
 509         return -1;
 510 }
 511
 512 static int __init cpqarray_init_one( struct pci_dev *pdev,
 513         const struct pci_device_id *ent)
 514 {
 515         int i;
 516
 517         printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
 518                         " bus %d dev %d func %d\n",
 519                         pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
 520                         PCI_FUNC(pdev->devfn));
 521         i = alloc_cpqarray_hba();
 522         if( i < 0 )
 523                 return (-1);
 524         memset(hba[i], 0, sizeof(ctlr_info_t));
 525         sprintf(hba[i]->devname, "ida%d", i);
 526         hba[i]->ctlr = i;
 527         /* Initialize the pdev driver private data */
 528         pci_set_drvdata(pdev, hba[i]);
 529
 530         if (cpqarray_pci_init(hba[i], pdev) != 0) {
 531                 pci_set_drvdata(pdev, NULL);
 532                 release_io_mem(hba[i]);
 533                 free_hba(i);
 534                 return -1;
 535         }
 536
 537         return (cpqarray_register_ctlr(i, pdev));
 538 }
 539
 540 static struct pci_driver cpqarray_pci_driver = {
 541         .name = "cpqarray",
 542         .probe = cpqarray_init_one,
 543         .remove = __devexit_p(cpqarray_remove_one_pci),
 544         .id_table = cpqarray_pci_device_id,
 545 };
 546
 547 /*
 548  *  This is it.  Find all the controllers and register them.
 549  *  returns the number of block devices registered.
 550  */
 551 static int __init cpqarray_init(void)
 552 {
 553         int num_cntlrs_reg = 0;
 554         int i;
 555         int rc = 0;
 556
 557         /* detect controllers */
 558         printk(DRIVER_NAME "\n");
 559
 560         rc = pci_register_driver(&cpqarray_pci_driver);
 561         if (rc)
 562                 return rc;
 563         cpqarray_eisa_detect();
 564
 565         for (i=0; i < MAX_CTLR; i++) {
 566                 if (hba[i] != NULL)
 567                         num_cntlrs_reg++;
 568         }
 569
 570         return(num_cntlrs_reg);
 571 }
 572
 573 /* Function to find the first free pointer into our hba[] array */
 574 /* Returns -1 if no free entries are left.  */
 575 static int alloc_cpqarray_hba(void)
 576 {
 577         int i;
 578
 579         for(i=0; i< MAX_CTLR; i++) {
 580                 if (hba[i] == NULL) {
 581                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
 582                         if(hba[i]==NULL) {
 583                                 printk(KERN_ERR "cpqarray: out of memory.\n");
 584                                 return (-1);
 585                         }
 586                         return (i);
 587                 }
 588         }
 589         printk(KERN_WARNING "cpqarray: This driver supports a maximum"
 590                 " of 8 controllers.\n");
 591         return(-1);
 592 }
 593
 594 static void free_hba(int i)
 595 {
 596         kfree(hba[i]);
 597         hba[i]=NULL;
 598 }
 599
 600 /*
 601  * Find the IO address of the controller, its IRQ and so forth.  Fill
 602  * in some basic stuff into the ctlr_info_t structure.
 603  */
 604 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
 605 {
 606         ushort vendor_id, device_id, command;
 607         unchar cache_line_size, latency_timer;
 608         unchar irq, revision;
 609         unsigned long addr[6];
 610         __u32 board_id;
 611
 612         int i;
 613
 614         c->pci_dev = pdev;
 615         if (pci_enable_device(pdev)) {
 616                 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
 617                 return -1;
 618         }
 619         vendor_id = pdev->vendor;
 620         device_id = pdev->device;
 621         irq = pdev->irq;
 622
 623         for(i=0; i<6; i++)
 624                 addr[i] = pci_resource_start(pdev, i);
 625
 626         if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
 627         {
 628                 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
 629                 return -1;
 630         }
 631
 632         pci_read_config_word(pdev, PCI_COMMAND, &command);
 633         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
 634         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
 635         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
 636
 637         pci_read_config_dword(pdev, 0x2c, &board_id);
 638
 639         /* check to see if controller has been disabled */
 640         if(!(command & 0x02)) {
 641                 printk(KERN_WARNING
 642                         "cpqarray: controller appears to be disabled\n");
 643                 return(-1);
 644         }
 645
 646 DBGINFO(
 647         printk("vendor_id = %x\n", vendor_id);
 648         printk("device_id = %x\n", device_id);
 649         printk("command = %x\n", command);
 650         for(i=0; i<6; i++)
 651                 printk("addr[%d] = %lx\n", i, addr[i]);
 652         printk("revision = %x\n", revision);
 653         printk("irq = %x\n", irq);
 654         printk("cache_line_size = %x\n", cache_line_size);
 655         printk("latency_timer = %x\n", latency_timer);
 656         printk("board_id = %x\n", board_id);
 657 );
 658
 659         c->intr = irq;
 660
 661         for(i=0; i<6; i++) {
 662                 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
 663                 { /* IO space */
 664                         c->io_mem_addr = addr[i];
 665                         c->io_mem_length = pci_resource_end(pdev, i)
 666                                 - pci_resource_start(pdev, i) + 1;
 667                         if(!request_region( c->io_mem_addr, c->io_mem_length,
 668                                 "cpqarray"))
 669                         {
 670                                 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
 671                                 c->io_mem_addr = 0;
 672                                 c->io_mem_length = 0;
 673                         }
 674                         break;
 675                 }
 676         }
 677
 678         c->paddr = 0;
 679         for(i=0; i<6; i++)
 680                 if (!(pci_resource_flags(pdev, i) &
 681                                 PCI_BASE_ADDRESS_SPACE_IO)) {
 682                         c->paddr = pci_resource_start (pdev, i);
 683                         break;
 684                 }
 685         if (!c->paddr)
 686                 return -1;
 687         c->vaddr = remap_pci_mem(c->paddr, 128);
 688         if (!c->vaddr)
 689                 return -1;
 690         c->board_id = board_id;
 691
 692         for(i=0; i<NR_PRODUCTS; i++) {
 693                 if (board_id == products[i].board_id) {
 694                         c->product_name = products[i].product_name;
 695                         c->access = *(products[i].access);
 696                         break;
 697                 }
 698         }
 699         if (i == NR_PRODUCTS) {
 700                 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 701                         " to access the SMART Array controller %08lx\n",
 702                                 (unsigned long)board_id);
 703                 return -1;
 704         }
 705
 706         return 0;
 707 }
 708
 709 /*
 710  * Map (physical) PCI mem into (virtual) kernel space
 711  */
 712 static void __iomem *remap_pci_mem(ulong base, ulong size)
 713 {
 714         ulong page_base        = ((ulong) base) & PAGE_MASK;
 715         ulong page_offs        = ((ulong) base) - page_base;
 716         void __iomem *page_remapped    = ioremap(page_base, page_offs+size);
 717
 718         return (page_remapped ? (page_remapped + page_offs) : NULL);
 719 }
 720
 721 #ifndef MODULE
 722 /*
 723  * Config string is a comma separated set of i/o addresses of EISA cards.
 724  */
 725 static int cpqarray_setup(char *str)
 726 {
 727         int i, ints[9];
 728
 729         (void)get_options(str, ARRAY_SIZE(ints), ints);
 730
 731         for(i=0; i<ints[0] && i<8; i++)
 732                 eisa[i] = ints[i+1];
 733         return 1;
 734 }
 735
 736 __setup("smart2=", cpqarray_setup);
 737
 738 #endif
 739
 740 /*
 741  * Find an EISA controller's signature.  Set up an hba if we find it.
 742  */
 743 static int __init cpqarray_eisa_detect(void)
 744 {
 745         int i=0, j;
 746         __u32 board_id;
 747         int intr;
 748         int ctlr;
 749         int num_ctlr = 0;
 750
 751         while(i<8 && eisa[i]) {
 752                 ctlr = alloc_cpqarray_hba();
 753                 if(ctlr == -1)
 754                         break;
 755                 board_id = inl(eisa[i]+0xC80);
 756                 for(j=0; j < NR_PRODUCTS; j++)
 757                         if (board_id == products[j].board_id)
 758                                 break;
 759
 760                 if (j == NR_PRODUCTS) {
 761                         printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
 762                                 " to access the SMART Array controller %08lx\n",                                 (unsigned long)board_id);
 763                         continue;
 764                 }
 765
 766                 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
 767                 hba[ctlr]->io_mem_addr = eisa[i];
 768                 hba[ctlr]->io_mem_length = 0x7FF;
 769                 if(!request_region(hba[ctlr]->io_mem_addr,
 770                                 hba[ctlr]->io_mem_length,
 771                                 "cpqarray"))
 772                 {
 773                         printk(KERN_WARNING "cpqarray: I/O range already in "
 774                                         "use addr = %lx length = %ld\n",
 775                                         hba[ctlr]->io_mem_addr,
 776                                         hba[ctlr]->io_mem_length);
 777                         free_hba(ctlr);
 778                         continue;
 779                 }
 780
 781                 /*
 782                  * Read the config register to find our interrupt
 783                  */
 784                 intr = inb(eisa[i]+0xCC0) >> 4;
 785                 if (intr & 1) intr = 11;
 786                 else if (intr & 2) intr = 10;
 787                 else if (intr & 4) intr = 14;
 788                 else if (intr & 8) intr = 15;
 789
 790                 hba[ctlr]->intr = intr;
 791                 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
 792                 hba[ctlr]->product_name = products[j].product_name;
 793                 hba[ctlr]->access = *(products[j].access);
 794                 hba[ctlr]->ctlr = ctlr;
 795                 hba[ctlr]->board_id = board_id;
 796                 hba[ctlr]->pci_dev = NULL; /* not PCI */
 797
 798 DBGINFO(
 799         printk("i = %d, j = %d\n", i, j);
 800         printk("irq = %x\n", intr);
 801         printk("product name = %s\n", products[j].product_name);
 802         printk("board_id = %x\n", board_id);
 803 );
 804
 805                 num_ctlr++;
 806                 i++;
 807
 808                 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
 809                         printk(KERN_WARNING
 810                                 "cpqarray: Can't register EISA controller %d\n",
 811                                 ctlr);
 812
 813         }
 814
 815         return num_ctlr;
 816 }
 817
 818 /*
 819  * Open.  Make sure the device is really there.
 820  */
 821 static int ida_open(struct inode *inode, struct file *filep)
 822 {
 823         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
 824         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 825
 826         DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
 827         /*
 828          * Root is allowed to open raw volume zero even if it's not configured
 829          * so array config can still work.  I don't think I really like this,
 830          * but I'm already using way to many device nodes to claim another one
 831          * for "raw controller".
 832          */
 833         if (!drv->nr_blks) {
 834                 if (!capable(CAP_SYS_RAWIO))
 835                         return -ENXIO;
 836                 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
 837                         return -ENXIO;
 838         }
 839         host->usage_count++;
 840         return 0;
 841 }
 842
 843 /*
 844  * Close.  Sync first.
 845  */
 846 static int ida_release(struct inode *inode, struct file *filep)
 847 {
 848         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
 849         host->usage_count--;
 850         return 0;
 851 }
 852
 853 /*
 854  * Enqueuing and dequeuing functions for cmdlists.
 855  */
 856 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
 857 {
 858         if (*Qptr == NULL) {
 859                 *Qptr = c;
 860                 c->next = c->prev = c;
 861         } else {
 862                 c->prev = (*Qptr)->prev;
 863                 c->next = (*Qptr);
 864                 (*Qptr)->prev->next = c;
 865                 (*Qptr)->prev = c;
 866         }
 867 }
 868
 869 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
 870 {
 871         if (c && c->next != c) {
 872                 if (*Qptr == c) *Qptr = c->next;
 873                 c->prev->next = c->next;
 874                 c->next->prev = c->prev;
 875         } else {
 876                 *Qptr = NULL;
 877         }
 878         return c;
 879 }
 880
 881 /*
 882  * Get a request and submit it to the controller.
 883  * This routine needs to grab all the requests it possibly can from the
 884  * req Q and submit them.  Interrupts are off (and need to be off) when you
 885  * are in here (either via the dummy do_ida_request functions or by being
 886  * called from the interrupt handler
 887  */
 888 static void do_ida_request(struct request_queue *q)
 889 {
 890         ctlr_info_t *h = q->queuedata;
 891         cmdlist_t *c;
 892         struct request *creq;
 893         struct scatterlist tmp_sg[SG_MAX];
 894         int i, dir, seg;
 895
 896         if (blk_queue_plugged(q))
 897                 goto startio;
 898
 899 queue_next:
 900         creq = elv_next_request(q);
 901         if (!creq)
 902                 goto startio;
 903
 904         BUG_ON(creq->nr_phys_segments > SG_MAX);
 905
 906         if ((c = cmd_alloc(h,1)) == NULL)
 907                 goto startio;
 908
 909         blkdev_dequeue_request(creq);
 910
 911         c->ctlr = h->ctlr;
 912         c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
 913         c->hdr.size = sizeof(rblk_t) >> 2;
 914         c->size += sizeof(rblk_t);
 915
 916         c->req.hdr.blk = creq->sector;
 917         c->rq = creq;
 918 DBGPX(
 919         printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
 920 );
 921         seg = blk_rq_map_sg(q, creq, tmp_sg);
 922
 923         /* Now do all the DMA Mappings */
 924         if (rq_data_dir(creq) == READ)
 925                 dir = PCI_DMA_FROMDEVICE;
 926         else
 927                 dir = PCI_DMA_TODEVICE;
 928         for( i=0; i < seg; i++)
 929         {
 930                 c->req.sg[i].size = tmp_sg[i].length;
 931                 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
 932                                                  tmp_sg[i].page,
 933                                                  tmp_sg[i].offset,
 934                                                  tmp_sg[i].length, dir);
 935         }
 936 DBGPX(  printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
 937         c->req.hdr.sg_cnt = seg;
 938         c->req.hdr.blk_cnt = creq->nr_sectors;
 939         c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
 940         c->type = CMD_RWREQ;
 941
 942         /* Put the request on the tail of the request queue */
 943         addQ(&h->reqQ, c);
 944         h->Qdepth++;
 945         if (h->Qdepth > h->maxQsinceinit)
 946                 h->maxQsinceinit = h->Qdepth;
 947
 948         goto queue_next;
 949
 950 startio:
 951         start_io(h);
 952 }
 953
 954 /*
 955  * start_io submits everything on a controller's request queue
 956  * and moves it to the completion queue.
 957  *
 958  * Interrupts had better be off if you're in here
 959  */
 960 static void start_io(ctlr_info_t *h)
 961 {
 962         cmdlist_t *c;
 963
 964         while((c = h->reqQ) != NULL) {
 965                 /* Can't do anything if we're busy */
 966                 if (h->access.fifo_full(h) == 0)
 967                         return;
 968
 969                 /* Get the first entry from the request Q */
 970                 removeQ(&h->reqQ, c);
 971                 h->Qdepth--;
 972
 973                 /* Tell the controller to do our bidding */
 974                 h->access.submit_command(h, c);
 975
 976                 /* Get onto the completion Q */
 977                 addQ(&h->cmpQ, c);
 978         }
 979 }
 980
 981 static inline void complete_buffers(struct bio *bio, int ok)
 982 {
 983         struct bio *xbh;
 984
 985         while (bio) {
 986                 xbh = bio->bi_next;
 987                 bio->bi_next = NULL;
 988
 989                 bio_endio(bio, ok ? 0 : -EIO);
 990
 991                 bio = xbh;
 992         }
 993 }
 994 /*
 995  * Mark all buffers that cmd was responsible for
 996  */
 997 static inline void complete_command(cmdlist_t *cmd, int timeout)
 998 {
 999         struct request *rq = cmd->rq;
1000         int ok=1;
1001         int i, ddir;
1002
1003         if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1004            (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1005                 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1006                                 cmd->ctlr, cmd->hdr.unit);
1007                 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1008         }
1009         if (cmd->req.hdr.rcode & RCODE_FATAL) {
1010                 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1011                                 cmd->ctlr, cmd->hdr.unit);
1012                 ok = 0;
1013         }
1014         if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1015                                 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1016                                 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1017                                 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1018                                 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1019                 ok = 0;
1020         }
1021         if (timeout) ok = 0;
1022         /* unmap the DMA mapping for all the scatter gather elements */
1023         if (cmd->req.hdr.cmd == IDA_READ)
1024                 ddir = PCI_DMA_FROMDEVICE;
1025         else
1026                 ddir = PCI_DMA_TODEVICE;
1027         for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1028                 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1029                                 cmd->req.sg[i].size, ddir);
1030
1031         complete_buffers(rq->bio, ok);
1032
1033         if (blk_fs_request(rq)) {
1034                 const int rw = rq_data_dir(rq);
1035
1036                 disk_stat_add(rq->rq_disk, sectors[rw], rq->nr_sectors);
1037         }
1038
1039         add_disk_randomness(rq->rq_disk);
1040
1041         DBGPX(printk("Done with %p\n", rq););
1042         end_that_request_last(rq, ok ? 1 : -EIO);
1043 }
1044
1045 /*
1046  *  The controller will interrupt us upon completion of commands.
1047  *  Find the command on the completion queue, remove it, tell the OS and
1048  *  try to queue up more IO
1049  */
1050 static irqreturn_t do_ida_intr(int irq, void *dev_id)
1051 {
1052         ctlr_info_t *h = dev_id;
1053         cmdlist_t *c;
1054         unsigned long istat;
1055         unsigned long flags;
1056         __u32 a,a1;
1057
1058         istat = h->access.intr_pending(h);
1059         /* Is this interrupt for us? */
1060         if (istat == 0)
1061                 return IRQ_NONE;
1062
1063         /*
1064          * If there are completed commands in the completion queue,
1065          * we had better do something about it.
1066          */
1067         spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1068         if (istat & FIFO_NOT_EMPTY) {
1069                 while((a = h->access.command_completed(h))) {
1070                         a1 = a; a &= ~3;
1071                         if ((c = h->cmpQ) == NULL)
1072                         {
1073                                 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1074                                 continue;
1075                         }
1076                         while(c->busaddr != a) {
1077                                 c = c->next;
1078                                 if (c == h->cmpQ)
1079                                         break;
1080                         }
1081                         /*
1082                          * If we've found the command, take it off the
1083                          * completion Q and free it
1084                          */
1085                         if (c->busaddr == a) {
1086                                 removeQ(&h->cmpQ, c);
1087                                 /*  Check for invalid command.
1088                                  *  Controller returns command error,
1089                                  *  But rcode = 0.
1090                                  */
1091
1092                                 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1093                                 {
1094                                         c->req.hdr.rcode = RCODE_INVREQ;
1095                                 }
1096                                 if (c->type == CMD_RWREQ) {
1097                                         complete_command(c, 0);
1098                                         cmd_free(h, c, 1);
1099                                 } else if (c->type == CMD_IOCTL_PEND) {
1100                                         c->type = CMD_IOCTL_DONE;
1101                                 }
1102                                 continue;
1103                         }
1104                 }
1105         }
1106
1107         /*
1108          * See if we can queue up some more IO
1109          */
1110         do_ida_request(h->queue);
1111         spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1112         return IRQ_HANDLED;
1113 }
1114
1115 /*
1116  * This timer was for timing out requests that haven't happened after
1117  * IDA_TIMEOUT.  That wasn't such a good idea.  This timer is used to
1118  * reset a flags structure so we don't flood the user with
1119  * "Non-Fatal error" messages.
1120  */
1121 static void ida_timer(unsigned long tdata)
1122 {
1123         ctlr_info_t *h = (ctlr_info_t*)tdata;
1124
1125         h->timer.expires = jiffies + IDA_TIMER;
1126         add_timer(&h->timer);
1127         h->misc_tflags = 0;
1128 }
1129
1130 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1131 {
1132         drv_info_t *drv = get_drv(bdev->bd_disk);
1133
1134         if (drv->cylinders) {
1135                 geo->heads = drv->heads;
1136                 geo->sectors = drv->sectors;
1137                 geo->cylinders = drv->cylinders;
1138         } else {
1139                 geo->heads = 0xff;
1140                 geo->sectors = 0x3f;
1141                 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1142         }
1143
1144         return 0;
1145 }
1146
1147 /*
1148  *  ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1149  *  setting readahead and submitting commands from userspace to the controller.
1150  */
1151 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1152 {
1153         drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1154         ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1155         int error;
1156         ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1157         ida_ioctl_t *my_io;
1158
1159         switch(cmd) {
1160         case IDAGETDRVINFO:
1161                 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1162                         return -EFAULT;
1163                 return 0;
1164         case IDAPASSTHRU:
1165                 if (!capable(CAP_SYS_RAWIO))
1166                         return -EPERM;
1167                 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1168                 if (!my_io)
1169                         return -ENOMEM;
1170                 error = -EFAULT;
1171                 if (copy_from_user(my_io, io, sizeof(*my_io)))
1172                         goto out_passthru;
1173                 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1174                 if (error)
1175                         goto out_passthru;
1176                 error = -EFAULT;
1177                 if (copy_to_user(io, my_io, sizeof(*my_io)))
1178                         goto out_passthru;
1179                 error = 0;
1180 out_passthru:
1181                 kfree(my_io);
1182                 return error;
1183         case IDAGETCTLRSIG:
1184                 if (!arg) return -EINVAL;
1185                 put_user(host->ctlr_sig, (int __user *)arg);
1186                 return 0;
1187         case IDAREVALIDATEVOLS:
1188                 if (iminor(inode) != 0)
1189                         return -ENXIO;
1190                 return revalidate_allvol(host);
1191         case IDADRIVERVERSION:
1192                 if (!arg) return -EINVAL;
1193                 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1194                 return 0;
1195         case IDAGETPCIINFO:
1196         {
1197
1198                 ida_pci_info_struct pciinfo;
1199
1200                 if (!arg) return -EINVAL;
1201                 pciinfo.bus = host->pci_dev->bus->number;
1202                 pciinfo.dev_fn = host->pci_dev->devfn;
1203                 pciinfo.board_id = host->board_id;
1204                 if(copy_to_user((void __user *) arg, &pciinfo,
1205                         sizeof( ida_pci_info_struct)))
1206                                 return -EFAULT;
1207                 return(0);
1208         }
1209
1210         default:
1211                 return -EINVAL;
1212         }
1213
1214 }
1215 /*
1216  * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1217  * The command block (io) has already been copied to kernel space for us,
1218  * however, any elements in the sglist need to be copied to kernel space
1219  * or copied back to userspace.
1220  *
1221  * Only root may perform a controller passthru command, however I'm not doing
1222  * any serious sanity checking on the arguments.  Doing an IDA_WRITE_MEDIA and
1223  * putting a 64M buffer in the sglist is probably a *bad* idea.
1224  */
1225 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1226 {
1227         int ctlr = h->ctlr;
1228         cmdlist_t *c;
1229         void *p = NULL;
1230         unsigned long flags;
1231         int error;
1232
1233         if ((c = cmd_alloc(h, 0)) == NULL)
1234                 return -ENOMEM;
1235         c->ctlr = ctlr;
1236         c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1237         c->hdr.size = sizeof(rblk_t) >> 2;
1238         c->size += sizeof(rblk_t);
1239
1240         c->req.hdr.cmd = io->cmd;
1241         c->req.hdr.blk = io->blk;
1242         c->req.hdr.blk_cnt = io->blk_cnt;
1243         c->type = CMD_IOCTL_PEND;
1244
1245         /* Pre submit processing */
1246         switch(io->cmd) {
1247         case PASSTHRU_A:
1248                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1249                 if (!p)
1250                 {
1251                         error = -ENOMEM;
1252                         cmd_free(h, c, 0);
1253                         return(error);
1254                 }
1255                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1256                         kfree(p);
1257                         cmd_free(h, c, 0);
1258                         return -EFAULT;
1259                 }
1260                 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1261                                 sizeof(ida_ioctl_t),
1262                                 PCI_DMA_BIDIRECTIONAL);
1263                 c->req.sg[0].size = io->sg[0].size;
1264                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1265                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1266                 c->req.hdr.sg_cnt = 1;
1267                 break;
1268         case IDA_READ:
1269         case READ_FLASH_ROM:
1270         case SENSE_CONTROLLER_PERFORMANCE:
1271                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1272                 if (!p)
1273                 {
1274                         error = -ENOMEM;
1275                         cmd_free(h, c, 0);
1276                         return(error);
1277                 }
1278
1279                 c->req.sg[0].size = io->sg[0].size;
1280                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1281                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1282                 c->req.hdr.sg_cnt = 1;
1283                 break;
1284         case IDA_WRITE:
1285         case IDA_WRITE_MEDIA:
1286         case DIAG_PASS_THRU:
1287         case COLLECT_BUFFER:
1288         case WRITE_FLASH_ROM:
1289                 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1290                 if (!p)
1291                 {
1292                         error = -ENOMEM;
1293                         cmd_free(h, c, 0);
1294                         return(error);
1295                 }
1296                 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1297                         kfree(p);
1298                         cmd_free(h, c, 0);
1299                         return -EFAULT;
1300                 }
1301                 c->req.sg[0].size = io->sg[0].size;
1302                 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1303                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1304                 c->req.hdr.sg_cnt = 1;
1305                 break;
1306         default:
1307                 c->req.sg[0].size = sizeof(io->c);
1308                 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1309                         c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1310                 c->req.hdr.sg_cnt = 1;
1311         }
1312
1313         /* Put the request on the tail of the request queue */
1314         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1315         addQ(&h->reqQ, c);
1316         h->Qdepth++;
1317         start_io(h);
1318         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1319
1320         /* Wait for completion */
1321         while(c->type != CMD_IOCTL_DONE)
1322                 schedule();
1323
1324         /* Unmap the DMA  */
1325         pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1326                 PCI_DMA_BIDIRECTIONAL);
1327         /* Post submit processing */
1328         switch(io->cmd) {
1329         case PASSTHRU_A:
1330                 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1331                                 sizeof(ida_ioctl_t),
1332                                 PCI_DMA_BIDIRECTIONAL);
1333         case IDA_READ:
1334         case DIAG_PASS_THRU:
1335         case SENSE_CONTROLLER_PERFORMANCE:
1336         case READ_FLASH_ROM:
1337                 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1338                         kfree(p);
1339                         return -EFAULT;
1340                 }
1341                 /* fall through and free p */
1342         case IDA_WRITE:
1343         case IDA_WRITE_MEDIA:
1344         case COLLECT_BUFFER:
1345         case WRITE_FLASH_ROM:
1346                 kfree(p);
1347                 break;
1348         default:;
1349                 /* Nothing to do */
1350         }
1351
1352         io->rcode = c->req.hdr.rcode;
1353         cmd_free(h, c, 0);
1354         return(0);
1355 }
1356
1357 /*
1358  * Commands are pre-allocated in a large block.  Here we use a simple bitmap
1359  * scheme to suballocte them to the driver.  Operations that are not time
1360  * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1361  * as the first argument to get a new command.
1362  */
1363 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1364 {
1365         cmdlist_t * c;
1366         int i;
1367         dma_addr_t cmd_dhandle;
1368
1369         if (!get_from_pool) {
1370                 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1371                         sizeof(cmdlist_t), &cmd_dhandle);
1372                 if(c==NULL)
1373                         return NULL;
1374         } else {
1375                 do {
1376                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1377                         if (i == NR_CMDS)
1378                                 return NULL;
1379                 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1380                 c = h->cmd_pool + i;
1381                 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1382                 h->nr_allocs++;
1383         }
1384
1385         memset(c, 0, sizeof(cmdlist_t));
1386         c->busaddr = cmd_dhandle;
1387         return c;
1388 }
1389
1390 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1391 {
1392         int i;
1393
1394         if (!got_from_pool) {
1395                 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1396                         c->busaddr);
1397         } else {
1398                 i = c - h->cmd_pool;
1399                 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1400                 h->nr_frees++;
1401         }
1402 }
1403
1404 /***********************************************************************
1405     name:        sendcmd
1406     Send a command to an IDA using the memory mapped FIFO interface
1407     and wait for it to complete.
1408     This routine should only be called at init time.
1409 ***********************************************************************/
1410 static int sendcmd(
1411         __u8    cmd,
1412         int     ctlr,
1413         void    *buff,
1414         size_t  size,
1415         unsigned int blk,
1416         unsigned int blkcnt,
1417         unsigned int log_unit )
1418 {
1419         cmdlist_t *c;
1420         int complete;
1421         unsigned long temp;
1422         unsigned long i;
1423         ctlr_info_t *info_p = hba[ctlr];
1424
1425         c = cmd_alloc(info_p, 1);
1426         if(!c)
1427                 return IO_ERROR;
1428         c->ctlr = ctlr;
1429         c->hdr.unit = log_unit;
1430         c->hdr.prio = 0;
1431         c->hdr.size = sizeof(rblk_t) >> 2;
1432         c->size += sizeof(rblk_t);
1433
1434         /* The request information. */
1435         c->req.hdr.next = 0;
1436         c->req.hdr.rcode = 0;
1437         c->req.bp = 0;
1438         c->req.hdr.sg_cnt = 1;
1439         c->req.hdr.reserved = 0;
1440
1441         if (size == 0)
1442                 c->req.sg[0].size = 512;
1443         else
1444                 c->req.sg[0].size = size;
1445
1446         c->req.hdr.blk = blk;
1447         c->req.hdr.blk_cnt = blkcnt;
1448         c->req.hdr.cmd = (unsigned char) cmd;
1449         c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1450                 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1451         /*
1452          * Disable interrupt
1453          */
1454         info_p->access.set_intr_mask(info_p, 0);
1455         /* Make sure there is room in the command FIFO */
1456         /* Actually it should be completely empty at this time. */
1457         for (i = 200000; i > 0; i--) {
1458                 temp = info_p->access.fifo_full(info_p);
1459                 if (temp != 0) {
1460                         break;
1461                 }
1462                 udelay(10);
1463 DBG(
1464                 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1465                         " waiting!\n", ctlr);
1466 );
1467         }
1468         /*
1469          * Send the cmd
1470          */
1471         info_p->access.submit_command(info_p, c);
1472         complete = pollcomplete(ctlr);
1473
1474         pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1475                 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1476         if (complete != 1) {
1477                 if (complete != c->busaddr) {
1478                         printk( KERN_WARNING
1479                         "cpqarray ida%d: idaSendPciCmd "
1480                       "Invalid command list address returned! (%08lx)\n",
1481                                 ctlr, (unsigned long)complete);
1482                         cmd_free(info_p, c, 1);
1483                         return (IO_ERROR);
1484                 }
1485         } else {
1486                 printk( KERN_WARNING
1487                         "cpqarray ida%d: idaSendPciCmd Timeout out, "
1488                         "No command list address returned!\n",
1489                         ctlr);
1490                 cmd_free(info_p, c, 1);
1491                 return (IO_ERROR);
1492         }
1493
1494         if (c->req.hdr.rcode & 0x00FE) {
1495                 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1496                         printk( KERN_WARNING
1497                         "cpqarray ida%d: idaSendPciCmd, error: "
1498                                 "Controller failed at init time "
1499                                 "cmd: 0x%x, return code = 0x%x\n",
1500                                 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1501
1502                         cmd_free(info_p, c, 1);
1503                         return (IO_ERROR);
1504                 }
1505         }
1506         cmd_free(info_p, c, 1);
1507         return (IO_OK);
1508 }
1509
1510 /*
1511  * revalidate_allvol is for online array config utilities.  After a
1512  * utility reconfigures the drives in the array, it can use this function
1513  * (through an ioctl) to make the driver zap any previous disk structs for
1514  * that controller and get new ones.
1515  *
1516  * Right now I'm using the getgeometry() function to do this, but this
1517  * function should probably be finer grained and allow you to revalidate one
1518  * particualar logical volume (instead of all of them on a particular
1519  * controller).
1520  */
1521 static int revalidate_allvol(ctlr_info_t *host)
1522 {
1523         int ctlr = host->ctlr;
1524         int i;
1525         unsigned long flags;
1526
1527         spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1528         if (host->usage_count > 1) {
1529                 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1530                 printk(KERN_WARNING "cpqarray: Device busy for volume"
1531                         " revalidation (usage=%d)\n", host->usage_count);
1532                 return -EBUSY;
1533         }
1534         host->usage_count++;
1535         spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1536
1537         /*
1538          * Set the partition and block size structures for all volumes
1539          * on this controller to zero.  We will reread all of this data
1540          */
1541         set_capacity(ida_gendisk[ctlr][0], 0);
1542         for (i = 1; i < NWD; i++) {
1543                 struct gendisk *disk = ida_gendisk[ctlr][i];
1544                 if (disk->flags & GENHD_FL_UP)
1545                         del_gendisk(disk);
1546         }
1547         memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1548
1549         /*
1550          * Tell the array controller not to give us any interrupts while
1551          * we check the new geometry.  Then turn interrupts back on when
1552          * we're done.
1553          */
1554         host->access.set_intr_mask(host, 0);
1555         getgeometry(ctlr);
1556         host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1557
1558         for(i=0; i<NWD; i++) {
1559                 struct gendisk *disk = ida_gendisk[ctlr][i];
1560                 drv_info_t *drv = &host->drv[i];
1561                 if (i && !drv->nr_blks)
1562                         continue;
1563                 blk_queue_hardsect_size(host->queue, drv->blk_size);
1564                 set_capacity(disk, drv->nr_blks);
1565                 disk->queue = host->queue;
1566                 disk->private_data = drv;
1567                 if (i)
1568                         add_disk(disk);
1569         }
1570
1571         host->usage_count--;
1572         return 0;
1573 }
1574
1575 static int ida_revalidate(struct gendisk *disk)
1576 {
1577         drv_info_t *drv = disk->private_data;
1578         set_capacity(disk, drv->nr_blks);
1579         return 0;
1580 }
1581
1582 /********************************************************************
1583     name: pollcomplete
1584     Wait polling for a command to complete.
1585     The memory mapped FIFO is polled for the completion.
1586     Used only at init time, interrupts disabled.
1587  ********************************************************************/
1588 static int pollcomplete(int ctlr)
1589 {
1590         int done;
1591         int i;
1592
1593         /* Wait (up to 2 seconds) for a command to complete */
1594
1595         for (i = 200000; i > 0; i--) {
1596                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1597                 if (done == 0) {
1598                         udelay(10);     /* a short fixed delay */
1599                 } else
1600                         return (done);
1601         }
1602         /* Invalid address to tell caller we ran out of time */
1603         return 1;
1604 }
1605 /*****************************************************************
1606     start_fwbk
1607     Starts controller firmwares background processing.
1608     Currently only the Integrated Raid controller needs this done.
1609     If the PCI mem address registers are written to after this,
1610          data corruption may occur
1611 *****************************************************************/
1612 static void start_fwbk(int ctlr)
1613 {
1614                 id_ctlr_t *id_ctlr_buf;
1615         int ret_code;
1616
1617         if(     (hba[ctlr]->board_id != 0x40400E11)
1618                 && (hba[ctlr]->board_id != 0x40480E11) )
1619
1620         /* Not a Integrated Raid, so there is nothing for us to do */
1621                 return;
1622         printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1623                 " processing\n");
1624         /* Command does not return anything, but idasend command needs a
1625                 buffer */
1626         id_ctlr_buf = kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1627         if(id_ctlr_buf==NULL)
1628         {
1629                 printk(KERN_WARNING "cpqarray: Out of memory. "
1630                         "Unable to start background processing.\n");
1631                 return;
1632         }
1633         ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1634                 id_ctlr_buf, 0, 0, 0, 0);
1635         if(ret_code != IO_OK)
1636                 printk(KERN_WARNING "cpqarray: Unable to start"
1637                         " background processing\n");
1638
1639         kfree(id_ctlr_buf);
1640 }
1641 /*****************************************************************
1642     getgeometry
1643     Get ida logical volume geometry from the controller
1644     This is a large bit of code which once existed in two flavors,
1645     It is used only at init time.
1646 *****************************************************************/
1647 static void getgeometry(int ctlr)
1648 {
1649         id_log_drv_t *id_ldrive;
1650         id_ctlr_t *id_ctlr_buf;
1651         sense_log_drv_stat_t *id_lstatus_buf;
1652         config_t *sense_config_buf;
1653         unsigned int log_unit, log_index;
1654         int ret_code, size;
1655         drv_info_t *drv;
1656         ctlr_info_t *info_p = hba[ctlr];
1657         int i;
1658
1659         info_p->log_drv_map = 0;
1660
1661         id_ldrive = kzalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1662         if (!id_ldrive) {
1663                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1664                 goto err_0;
1665         }
1666
1667         id_ctlr_buf = kzalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1668         if (!id_ctlr_buf) {
1669                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1670                 goto err_1;
1671         }
1672
1673         id_lstatus_buf = kzalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1674         if (!id_lstatus_buf) {
1675                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1676                 goto err_2;
1677         }
1678
1679         sense_config_buf = kzalloc(sizeof(config_t), GFP_KERNEL);
1680         if (!sense_config_buf) {
1681                 printk( KERN_ERR "cpqarray:  out of memory.\n");
1682                 goto err_3;
1683         }
1684
1685         info_p->phys_drives = 0;
1686         info_p->log_drv_map = 0;
1687         info_p->drv_assign_map = 0;
1688         info_p->drv_spare_map = 0;
1689         info_p->mp_failed_drv_map = 0;  /* only initialized here */
1690         /* Get controllers info for this logical drive */
1691         ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1692         if (ret_code == IO_ERROR) {
1693                 /*
1694                  * If can't get controller info, set the logical drive map to 0,
1695                  * so the idastubopen will fail on all logical drives
1696                  * on the controller.
1697                  */
1698                 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1699                 goto err_4;
1700         }
1701
1702         info_p->log_drives = id_ctlr_buf->nr_drvs;
1703         for(i=0;i<4;i++)
1704                 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1705         info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1706
1707         printk(" (%s)\n", info_p->product_name);
1708         /*
1709          * Initialize logical drive map to zero
1710          */
1711         log_index = 0;
1712         /*
1713          * Get drive geometry for all logical drives
1714          */
1715         if (id_ctlr_buf->nr_drvs > 16)
1716                 printk(KERN_WARNING "cpqarray ida%d:  This driver supports "
1717                         "16 logical drives per controller.\n.  "
1718                         " Additional drives will not be "
1719                         "detected\n", ctlr);
1720
1721         for (log_unit = 0;
1722              (log_index < id_ctlr_buf->nr_drvs)
1723              && (log_unit < NWD);
1724              log_unit++) {
1725                 size = sizeof(sense_log_drv_stat_t);
1726
1727                 /*
1728                    Send "Identify logical drive status" cmd
1729                  */
1730                 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1731                              ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1732                 if (ret_code == IO_ERROR) {
1733                         /*
1734                            If can't get logical drive status, set
1735                            the logical drive map to 0, so the
1736                            idastubopen will fail for all logical drives
1737                            on the controller.
1738                          */
1739                         info_p->log_drv_map = 0;
1740                         printk( KERN_WARNING
1741                              "cpqarray ida%d: idaGetGeometry - Controller"
1742                                 " failed to report status of logical drive %d\n"
1743                          "Access to this controller has been disabled\n",
1744                                 ctlr, log_unit);
1745                         goto err_4;
1746                 }
1747                 /*
1748                    Make sure the logical drive is configured
1749                  */
1750                 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1751                         ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1752                                sizeof(id_log_drv_t), 0, 0, log_unit);
1753                         /*
1754                            If error, the bit for this
1755                            logical drive won't be set and
1756                            idastubopen will return error.
1757                          */
1758                         if (ret_code != IO_ERROR) {
1759                                 drv = &info_p->drv[log_unit];
1760                                 drv->blk_size = id_ldrive->blk_size;
1761                                 drv->nr_blks = id_ldrive->nr_blks;
1762                                 drv->cylinders = id_ldrive->drv.cyl;
1763                                 drv->heads = id_ldrive->drv.heads;
1764                                 drv->sectors = id_ldrive->drv.sect_per_track;
1765                                 info_p->log_drv_map |=  (1 << log_unit);
1766
1767         printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1768                 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1769                                 ret_code = sendcmd(SENSE_CONFIG,
1770                                                   ctlr, sense_config_buf,
1771                                  sizeof(config_t), 0, 0, log_unit);
1772                                 if (ret_code == IO_ERROR) {
1773                                         info_p->log_drv_map = 0;
1774                                         printk(KERN_ERR "cpqarray: error sending sense config\n");
1775                                         goto err_4;
1776                                 }
1777
1778                                 info_p->phys_drives =
1779                                     sense_config_buf->ctlr_phys_drv;
1780                                 info_p->drv_assign_map
1781                                     |= sense_config_buf->drv_asgn_map;
1782                                 info_p->drv_assign_map
1783                                     |= sense_config_buf->spare_asgn_map;
1784                                 info_p->drv_spare_map
1785                                     |= sense_config_buf->spare_asgn_map;
1786                         }       /* end of if no error on id_ldrive */
1787                         log_index = log_index + 1;
1788                 }               /* end of if logical drive configured */
1789         }                       /* end of for log_unit */
1790
1791         /* Free all the buffers and return */
1792 err_4:
1793         kfree(sense_config_buf);
1794 err_3:
1795         kfree(id_lstatus_buf);
1796 err_2:
1797         kfree(id_ctlr_buf);
1798 err_1:
1799         kfree(id_ldrive);
1800 err_0:
1801         return;
1802 }
1803
1804 static void __exit cpqarray_exit(void)
1805 {
1806         int i;
1807
1808         pci_unregister_driver(&cpqarray_pci_driver);
1809
1810         /* Double check that all controller entries have been removed */
1811         for(i=0; i<MAX_CTLR; i++) {
1812                 if (hba[i] != NULL) {
1813                         printk(KERN_WARNING "cpqarray: Removing EISA "
1814                                         "controller %d\n", i);
1815                         cpqarray_remove_one_eisa(i);
1816                 }
1817         }
1818
1819         remove_proc_entry("cpqarray", proc_root_driver);
1820 }
1821
1822 module_init(cpqarray_init)
1823 module_exit(cpqarray_exit)