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   1 /*
   2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /*
  24     Supports following chips:
  25
  26     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  27     as99127f    7       3       0       3       0x31    0x12c3  yes     no
  28     as99127f rev.2 (type_name = as99127f)       0x31    0x5ca3  yes     no
  29     w83781d     7       3       0       3       0x10-1  0x5ca3  yes     yes
  30     w83627hf    9       3       2       3       0x21    0x5ca3  yes     yes(LPC)
  31     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
  32     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
  33
  34 */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/slab.h>
  39 #include <linux/jiffies.h>
  40 #include <linux/i2c.h>
  41 #include <linux/i2c-isa.h>
  42 #include <linux/hwmon.h>
  43 #include <linux/hwmon-vid.h>
  44 #include <linux/err.h>
  45 #include <linux/mutex.h>
  46 #include <asm/io.h>
  47 #include "lm75.h"
  48
  49 /* Addresses to scan */
  50 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
  51                                         0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
  52                                         0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  53 static unsigned short isa_address = 0x290;
  54
  55 /* Insmod parameters */
  56 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
  57 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  58                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  59
  60 static int reset;
  61 module_param(reset, bool, 0);
  62 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  63
  64 static int init = 1;
  65 module_param(init, bool, 0);
  66 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  67
  68 /* Constants specified below */
  69
  70 /* Length of ISA address segment */
  71 #define W83781D_EXTENT                  8
  72
  73 /* Where are the ISA address/data registers relative to the base address */
  74 #define W83781D_ADDR_REG_OFFSET         5
  75 #define W83781D_DATA_REG_OFFSET         6
  76
  77 /* The W83781D registers */
  78 /* The W83782D registers for nr=7,8 are in bank 5 */
  79 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
  80                                                     (0x554 + (((nr) - 7) * 2)))
  81 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
  82                                                     (0x555 + (((nr) - 7) * 2)))
  83 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
  84                                                     (0x550 + (nr) - 7))
  85
  86 #define W83781D_REG_FAN_MIN(nr)         (0x3a + (nr))
  87 #define W83781D_REG_FAN(nr)             (0x27 + (nr))
  88
  89 #define W83781D_REG_BANK                0x4E
  90 #define W83781D_REG_TEMP2_CONFIG        0x152
  91 #define W83781D_REG_TEMP3_CONFIG        0x252
  92 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
  93                                         ((nr == 2) ? (0x0150) : \
  94                                                      (0x27)))
  95 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
  96                                         ((nr == 2) ? (0x153) : \
  97                                                      (0x3A)))
  98 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
  99                                         ((nr == 2) ? (0x155) : \
 100                                                      (0x39)))
 101
 102 #define W83781D_REG_CONFIG              0x40
 103
 104 /* Interrupt status (W83781D, AS99127F) */
 105 #define W83781D_REG_ALARM1              0x41
 106 #define W83781D_REG_ALARM2              0x42
 107
 108 /* Real-time status (W83782D, W83783S, W83627HF) */
 109 #define W83782D_REG_ALARM1              0x459
 110 #define W83782D_REG_ALARM2              0x45A
 111 #define W83782D_REG_ALARM3              0x45B
 112
 113 #define W83781D_REG_BEEP_CONFIG         0x4D
 114 #define W83781D_REG_BEEP_INTS1          0x56
 115 #define W83781D_REG_BEEP_INTS2          0x57
 116 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
 117
 118 #define W83781D_REG_VID_FANDIV          0x47
 119
 120 #define W83781D_REG_CHIPID              0x49
 121 #define W83781D_REG_WCHIPID             0x58
 122 #define W83781D_REG_CHIPMAN             0x4F
 123 #define W83781D_REG_PIN                 0x4B
 124
 125 /* 782D/783S only */
 126 #define W83781D_REG_VBAT                0x5D
 127
 128 /* PWM 782D (1-4) and 783S (1-2) only */
 129 #define W83781D_REG_PWM1                0x5B    /* 782d and 783s/627hf datasheets disagree */
 130                                                 /* on which is which; */
 131 #define W83781D_REG_PWM2                0x5A    /* We follow the 782d convention here, */
 132                                                 /* However 782d is probably wrong. */
 133 #define W83781D_REG_PWM3                0x5E
 134 #define W83781D_REG_PWM4                0x5F
 135 #define W83781D_REG_PWMCLK12            0x5C
 136 #define W83781D_REG_PWMCLK34            0x45C
 137 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
 138         W83781D_REG_PWM3, W83781D_REG_PWM4
 139 };
 140
 141 #define W83781D_REG_PWM(nr)             (regpwm[(nr) - 1])
 142
 143 #define W83781D_REG_I2C_ADDR            0x48
 144 #define W83781D_REG_I2C_SUBADDR         0x4A
 145
 146 /* The following are undocumented in the data sheets however we
 147    received the information in an email from Winbond tech support */
 148 /* Sensor selection - not on 781d */
 149 #define W83781D_REG_SCFG1               0x5D
 150 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 151
 152 #define W83781D_REG_SCFG2               0x59
 153 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 154
 155 #define W83781D_DEFAULT_BETA            3435
 156
 157 /* RT Table registers */
 158 #define W83781D_REG_RT_IDX              0x50
 159 #define W83781D_REG_RT_VAL              0x51
 160
 161 /* Conversions. Rounding and limit checking is only done on the TO_REG
 162    variants. Note that you should be a bit careful with which arguments
 163    these macros are called: arguments may be evaluated more than once.
 164    Fixing this is just not worth it. */
 165 #define IN_TO_REG(val)                  (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
 166 #define IN_FROM_REG(val)                (((val) * 16) / 10)
 167
 168 static inline u8
 169 FAN_TO_REG(long rpm, int div)
 170 {
 171         if (rpm == 0)
 172                 return 255;
 173         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 174         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 175 }
 176
 177 #define FAN_FROM_REG(val,div)           ((val) == 0   ? -1 : \
 178                                         ((val) == 255 ? 0 : \
 179                                                         1350000 / ((val) * (div))))
 180
 181 #define TEMP_TO_REG(val)                (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
 182                                                 : (val)) / 1000, 0, 0xff))
 183 #define TEMP_FROM_REG(val)              (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
 184
 185 #define PWM_FROM_REG(val)               (val)
 186 #define PWM_TO_REG(val)                 (SENSORS_LIMIT((val),0,255))
 187 #define BEEP_MASK_FROM_REG(val,type)    ((type) == as99127f ? \
 188                                          (val) ^ 0x7fff : (val))
 189 #define BEEP_MASK_TO_REG(val,type)      ((type) == as99127f ? \
 190                                          (~(val)) & 0x7fff : (val) & 0xffffff)
 191
 192 #define BEEP_ENABLE_TO_REG(val)         ((val) ? 1 : 0)
 193 #define BEEP_ENABLE_FROM_REG(val)       ((val) ? 1 : 0)
 194
 195 #define DIV_FROM_REG(val)               (1 << (val))
 196
 197 static inline u8
 198 DIV_TO_REG(long val, enum chips type)
 199 {
 200         int i;
 201         val = SENSORS_LIMIT(val, 1,
 202                             ((type == w83781d
 203                               || type == as99127f) ? 8 : 128)) >> 1;
 204         for (i = 0; i < 7; i++) {
 205                 if (val == 0)
 206                         break;
 207                 val >>= 1;
 208         }
 209         return ((u8) i);
 210 }
 211
 212 /* There are some complications in a module like this. First off, W83781D chips
 213    may be both present on the SMBus and the ISA bus, and we have to handle
 214    those cases separately at some places. Second, there might be several
 215    W83781D chips available (well, actually, that is probably never done; but
 216    it is a clean illustration of how to handle a case like that). Finally,
 217    a specific chip may be attached to *both* ISA and SMBus, and we would
 218    not like to detect it double. Fortunately, in the case of the W83781D at
 219    least, a register tells us what SMBus address we are on, so that helps
 220    a bit - except if there could be more than one SMBus. Groan. No solution
 221    for this yet. */
 222
 223 /* This module may seem overly long and complicated. In fact, it is not so
 224    bad. Quite a lot of bookkeeping is done. A real driver can often cut
 225    some corners. */
 226
 227 /* For each registered W83781D, we need to keep some data in memory. That
 228    data is pointed to by w83781d_list[NR]->data. The structure itself is
 229    dynamically allocated, at the same time when a new w83781d client is
 230    allocated. */
 231 struct w83781d_data {
 232         struct i2c_client client;
 233         struct class_device *class_dev;
 234         struct mutex lock;
 235         enum chips type;
 236
 237         struct mutex update_lock;
 238         char valid;             /* !=0 if following fields are valid */
 239         unsigned long last_updated;     /* In jiffies */
 240
 241         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
 242         /* array of 2 pointers to subclients */
 243
 244         u8 in[9];               /* Register value - 8 & 9 for 782D only */
 245         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
 246         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
 247         u8 fan[3];              /* Register value */
 248         u8 fan_min[3];          /* Register value */
 249         u8 temp;
 250         u8 temp_max;            /* Register value */
 251         u8 temp_max_hyst;       /* Register value */
 252         u16 temp_add[2];        /* Register value */
 253         u16 temp_max_add[2];    /* Register value */
 254         u16 temp_max_hyst_add[2];       /* Register value */
 255         u8 fan_div[3];          /* Register encoding, shifted right */
 256         u8 vid;                 /* Register encoding, combined */
 257         u32 alarms;             /* Register encoding, combined */
 258         u32 beep_mask;          /* Register encoding, combined */
 259         u8 beep_enable;         /* Boolean */
 260         u8 pwm[4];              /* Register value */
 261         u8 pwmenable[4];        /* Boolean */
 262         u16 sens[3];            /* 782D/783S only.
 263                                    1 = pentium diode; 2 = 3904 diode;
 264                                    3000-5000 = thermistor beta.
 265                                    Default = 3435.
 266                                    Other Betas unimplemented */
 267         u8 vrm;
 268 };
 269
 270 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
 271 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
 272 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
 273 static int w83781d_detach_client(struct i2c_client *client);
 274
 275 static int w83781d_read_value(struct i2c_client *client, u16 reg);
 276 static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value);
 277 static struct w83781d_data *w83781d_update_device(struct device *dev);
 278 static void w83781d_init_client(struct i2c_client *client);
 279
 280 static struct i2c_driver w83781d_driver = {
 281         .driver = {
 282                 .name = "w83781d",
 283         },
 284         .id = I2C_DRIVERID_W83781D,
 285         .attach_adapter = w83781d_attach_adapter,
 286         .detach_client = w83781d_detach_client,
 287 };
 288
 289 static struct i2c_driver w83781d_isa_driver = {
 290         .driver = {
 291                 .owner = THIS_MODULE,
 292                 .name = "w83781d-isa",
 293         },
 294         .attach_adapter = w83781d_isa_attach_adapter,
 295         .detach_client = w83781d_detach_client,
 296 };
 297
 298
 299 /* following are the sysfs callback functions */
 300 #define show_in_reg(reg) \
 301 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 302 { \
 303         struct w83781d_data *data = w83781d_update_device(dev); \
 304         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
 305 }
 306 show_in_reg(in);
 307 show_in_reg(in_min);
 308 show_in_reg(in_max);
 309
 310 #define store_in_reg(REG, reg) \
 311 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 312 { \
 313         struct i2c_client *client = to_i2c_client(dev); \
 314         struct w83781d_data *data = i2c_get_clientdata(client); \
 315         u32 val; \
 316          \
 317         val = simple_strtoul(buf, NULL, 10) / 10; \
 318          \
 319         mutex_lock(&data->update_lock); \
 320         data->in_##reg[nr] = IN_TO_REG(val); \
 321         w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
 322          \
 323         mutex_unlock(&data->update_lock); \
 324         return count; \
 325 }
 326 store_in_reg(MIN, min);
 327 store_in_reg(MAX, max);
 328
 329 #define sysfs_in_offset(offset) \
 330 static ssize_t \
 331 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 332 { \
 333         return show_in(dev, buf, offset); \
 334 } \
 335 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 336
 337 #define sysfs_in_reg_offset(reg, offset) \
 338 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 339 { \
 340         return show_in_##reg (dev, buf, offset); \
 341 } \
 342 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 343 { \
 344         return store_in_##reg (dev, buf, count, offset); \
 345 } \
 346 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 347
 348 #define sysfs_in_offsets(offset) \
 349 sysfs_in_offset(offset); \
 350 sysfs_in_reg_offset(min, offset); \
 351 sysfs_in_reg_offset(max, offset);
 352
 353 sysfs_in_offsets(0);
 354 sysfs_in_offsets(1);
 355 sysfs_in_offsets(2);
 356 sysfs_in_offsets(3);
 357 sysfs_in_offsets(4);
 358 sysfs_in_offsets(5);
 359 sysfs_in_offsets(6);
 360 sysfs_in_offsets(7);
 361 sysfs_in_offsets(8);
 362
 363 #define device_create_file_in(client, offset) \
 364 do { \
 365 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 366 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 367 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 368 } while (0)
 369
 370 #define show_fan_reg(reg) \
 371 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 372 { \
 373         struct w83781d_data *data = w83781d_update_device(dev); \
 374         return sprintf(buf,"%ld\n", \
 375                 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 376 }
 377 show_fan_reg(fan);
 378 show_fan_reg(fan_min);
 379
 380 static ssize_t
 381 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 382 {
 383         struct i2c_client *client = to_i2c_client(dev);
 384         struct w83781d_data *data = i2c_get_clientdata(client);
 385         u32 val;
 386
 387         val = simple_strtoul(buf, NULL, 10);
 388
 389         mutex_lock(&data->update_lock);
 390         data->fan_min[nr - 1] =
 391             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 392         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
 393                             data->fan_min[nr - 1]);
 394
 395         mutex_unlock(&data->update_lock);
 396         return count;
 397 }
 398
 399 #define sysfs_fan_offset(offset) \
 400 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 401 { \
 402         return show_fan(dev, buf, offset); \
 403 } \
 404 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 405
 406 #define sysfs_fan_min_offset(offset) \
 407 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 408 { \
 409         return show_fan_min(dev, buf, offset); \
 410 } \
 411 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 412 { \
 413         return store_fan_min(dev, buf, count, offset); \
 414 } \
 415 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
 416
 417 sysfs_fan_offset(1);
 418 sysfs_fan_min_offset(1);
 419 sysfs_fan_offset(2);
 420 sysfs_fan_min_offset(2);
 421 sysfs_fan_offset(3);
 422 sysfs_fan_min_offset(3);
 423
 424 #define device_create_file_fan(client, offset) \
 425 do { \
 426 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 427 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 428 } while (0)
 429
 430 #define show_temp_reg(reg) \
 431 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 432 { \
 433         struct w83781d_data *data = w83781d_update_device(dev); \
 434         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 435                 return sprintf(buf,"%d\n", \
 436                         LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 437         } else {        /* TEMP1 */ \
 438                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 439         } \
 440 }
 441 show_temp_reg(temp);
 442 show_temp_reg(temp_max);
 443 show_temp_reg(temp_max_hyst);
 444
 445 #define store_temp_reg(REG, reg) \
 446 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 447 { \
 448         struct i2c_client *client = to_i2c_client(dev); \
 449         struct w83781d_data *data = i2c_get_clientdata(client); \
 450         s32 val; \
 451          \
 452         val = simple_strtol(buf, NULL, 10); \
 453          \
 454         mutex_lock(&data->update_lock); \
 455          \
 456         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 457                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 458                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 459                                 data->temp_##reg##_add[nr-2]); \
 460         } else {        /* TEMP1 */ \
 461                 data->temp_##reg = TEMP_TO_REG(val); \
 462                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 463                         data->temp_##reg); \
 464         } \
 465          \
 466         mutex_unlock(&data->update_lock); \
 467         return count; \
 468 }
 469 store_temp_reg(OVER, max);
 470 store_temp_reg(HYST, max_hyst);
 471
 472 #define sysfs_temp_offset(offset) \
 473 static ssize_t \
 474 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 475 { \
 476         return show_temp(dev, buf, offset); \
 477 } \
 478 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 479
 480 #define sysfs_temp_reg_offset(reg, offset) \
 481 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 482 { \
 483         return show_temp_##reg (dev, buf, offset); \
 484 } \
 485 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 486 { \
 487         return store_temp_##reg (dev, buf, count, offset); \
 488 } \
 489 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 490
 491 #define sysfs_temp_offsets(offset) \
 492 sysfs_temp_offset(offset); \
 493 sysfs_temp_reg_offset(max, offset); \
 494 sysfs_temp_reg_offset(max_hyst, offset);
 495
 496 sysfs_temp_offsets(1);
 497 sysfs_temp_offsets(2);
 498 sysfs_temp_offsets(3);
 499
 500 #define device_create_file_temp(client, offset) \
 501 do { \
 502 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 503 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 504 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 505 } while (0)
 506
 507 static ssize_t
 508 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 509 {
 510         struct w83781d_data *data = w83781d_update_device(dev);
 511         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 512 }
 513
 514 static
 515 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 516 #define device_create_file_vid(client) \
 517 device_create_file(&client->dev, &dev_attr_cpu0_vid);
 518 static ssize_t
 519 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 520 {
 521         struct w83781d_data *data = w83781d_update_device(dev);
 522         return sprintf(buf, "%ld\n", (long) data->vrm);
 523 }
 524
 525 static ssize_t
 526 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 527 {
 528         struct i2c_client *client = to_i2c_client(dev);
 529         struct w83781d_data *data = i2c_get_clientdata(client);
 530         u32 val;
 531
 532         val = simple_strtoul(buf, NULL, 10);
 533         data->vrm = val;
 534
 535         return count;
 536 }
 537
 538 static
 539 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 540 #define device_create_file_vrm(client) \
 541 device_create_file(&client->dev, &dev_attr_vrm);
 542 static ssize_t
 543 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 544 {
 545         struct w83781d_data *data = w83781d_update_device(dev);
 546         return sprintf(buf, "%u\n", data->alarms);
 547 }
 548
 549 static
 550 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 551 #define device_create_file_alarms(client) \
 552 device_create_file(&client->dev, &dev_attr_alarms);
 553 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
 554 {
 555         struct w83781d_data *data = w83781d_update_device(dev);
 556         return sprintf(buf, "%ld\n",
 557                        (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
 558 }
 559 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
 560 {
 561         struct w83781d_data *data = w83781d_update_device(dev);
 562         return sprintf(buf, "%ld\n",
 563                        (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
 564 }
 565
 566 #define BEEP_ENABLE                     0       /* Store beep_enable */
 567 #define BEEP_MASK                       1       /* Store beep_mask */
 568
 569 static ssize_t
 570 store_beep_reg(struct device *dev, const char *buf, size_t count,
 571                int update_mask)
 572 {
 573         struct i2c_client *client = to_i2c_client(dev);
 574         struct w83781d_data *data = i2c_get_clientdata(client);
 575         u32 val, val2;
 576
 577         val = simple_strtoul(buf, NULL, 10);
 578
 579         mutex_lock(&data->update_lock);
 580
 581         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 582                 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
 583                 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
 584                                     data->beep_mask & 0xff);
 585
 586                 if ((data->type != w83781d) && (data->type != as99127f)) {
 587                         w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
 588                                             ((data->beep_mask) >> 16) & 0xff);
 589                 }
 590
 591                 val2 = (data->beep_mask >> 8) & 0x7f;
 592         } else {                /* We are storing beep_enable */
 593                 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 594                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 595         }
 596
 597         w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
 598                             val2 | data->beep_enable << 7);
 599
 600         mutex_unlock(&data->update_lock);
 601         return count;
 602 }
 603
 604 #define sysfs_beep(REG, reg) \
 605 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 606 { \
 607         return show_beep_##reg(dev, attr, buf); \
 608 } \
 609 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 610 { \
 611         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 612 } \
 613 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
 614
 615 sysfs_beep(ENABLE, enable);
 616 sysfs_beep(MASK, mask);
 617
 618 #define device_create_file_beep(client) \
 619 do { \
 620 device_create_file(&client->dev, &dev_attr_beep_enable); \
 621 device_create_file(&client->dev, &dev_attr_beep_mask); \
 622 } while (0)
 623
 624 static ssize_t
 625 show_fan_div_reg(struct device *dev, char *buf, int nr)
 626 {
 627         struct w83781d_data *data = w83781d_update_device(dev);
 628         return sprintf(buf, "%ld\n",
 629                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 630 }
 631
 632 /* Note: we save and restore the fan minimum here, because its value is
 633    determined in part by the fan divisor.  This follows the principle of
 634    least surprise; the user doesn't expect the fan minimum to change just
 635    because the divisor changed. */
 636 static ssize_t
 637 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 638 {
 639         struct i2c_client *client = to_i2c_client(dev);
 640         struct w83781d_data *data = i2c_get_clientdata(client);
 641         unsigned long min;
 642         u8 reg;
 643         unsigned long val = simple_strtoul(buf, NULL, 10);
 644
 645         mutex_lock(&data->update_lock);
 646
 647         /* Save fan_min */
 648         min = FAN_FROM_REG(data->fan_min[nr],
 649                            DIV_FROM_REG(data->fan_div[nr]));
 650
 651         data->fan_div[nr] = DIV_TO_REG(val, data->type);
 652
 653         reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 654                & (nr==0 ? 0xcf : 0x3f))
 655             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 656         w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 657
 658         /* w83781d and as99127f don't have extended divisor bits */
 659         if (data->type != w83781d && data->type != as99127f) {
 660                 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
 661                        & ~(1 << (5 + nr)))
 662                     | ((data->fan_div[nr] & 0x04) << (3 + nr));
 663                 w83781d_write_value(client, W83781D_REG_VBAT, reg);
 664         }
 665
 666         /* Restore fan_min */
 667         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 668         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 669
 670         mutex_unlock(&data->update_lock);
 671         return count;
 672 }
 673
 674 #define sysfs_fan_div(offset) \
 675 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 676 { \
 677         return show_fan_div_reg(dev, buf, offset); \
 678 } \
 679 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 680 { \
 681         return store_fan_div_reg(dev, buf, count, offset - 1); \
 682 } \
 683 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 684
 685 sysfs_fan_div(1);
 686 sysfs_fan_div(2);
 687 sysfs_fan_div(3);
 688
 689 #define device_create_file_fan_div(client, offset) \
 690 do { \
 691 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 692 } while (0)
 693
 694 static ssize_t
 695 show_pwm_reg(struct device *dev, char *buf, int nr)
 696 {
 697         struct w83781d_data *data = w83781d_update_device(dev);
 698         return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
 699 }
 700
 701 static ssize_t
 702 show_pwmenable_reg(struct device *dev, char *buf, int nr)
 703 {
 704         struct w83781d_data *data = w83781d_update_device(dev);
 705         return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
 706 }
 707
 708 static ssize_t
 709 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 710 {
 711         struct i2c_client *client = to_i2c_client(dev);
 712         struct w83781d_data *data = i2c_get_clientdata(client);
 713         u32 val;
 714
 715         val = simple_strtoul(buf, NULL, 10);
 716
 717         mutex_lock(&data->update_lock);
 718         data->pwm[nr - 1] = PWM_TO_REG(val);
 719         w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
 720         mutex_unlock(&data->update_lock);
 721         return count;
 722 }
 723
 724 static ssize_t
 725 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
 726 {
 727         struct i2c_client *client = to_i2c_client(dev);
 728         struct w83781d_data *data = i2c_get_clientdata(client);
 729         u32 val, reg;
 730
 731         val = simple_strtoul(buf, NULL, 10);
 732
 733         mutex_lock(&data->update_lock);
 734
 735         switch (val) {
 736         case 0:
 737         case 1:
 738                 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
 739                 w83781d_write_value(client, W83781D_REG_PWMCLK12,
 740                                     (reg & 0xf7) | (val << 3));
 741
 742                 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
 743                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
 744                                     (reg & 0xef) | (!val << 4));
 745
 746                 data->pwmenable[nr - 1] = val;
 747                 break;
 748
 749         default:
 750                 mutex_unlock(&data->update_lock);
 751                 return -EINVAL;
 752         }
 753
 754         mutex_unlock(&data->update_lock);
 755         return count;
 756 }
 757
 758 #define sysfs_pwm(offset) \
 759 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 760 { \
 761         return show_pwm_reg(dev, buf, offset); \
 762 } \
 763 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
 764                 const char *buf, size_t count) \
 765 { \
 766         return store_pwm_reg(dev, buf, count, offset); \
 767 } \
 768 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 769                 show_regs_pwm_##offset, store_regs_pwm_##offset);
 770
 771 #define sysfs_pwmenable(offset) \
 772 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 773 { \
 774         return show_pwmenable_reg(dev, buf, offset); \
 775 } \
 776 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
 777                 const char *buf, size_t count) \
 778 { \
 779         return store_pwmenable_reg(dev, buf, count, offset); \
 780 } \
 781 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
 782                 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
 783
 784 sysfs_pwm(1);
 785 sysfs_pwm(2);
 786 sysfs_pwmenable(2);             /* only PWM2 can be enabled/disabled */
 787 sysfs_pwm(3);
 788 sysfs_pwm(4);
 789
 790 #define device_create_file_pwm(client, offset) \
 791 do { \
 792 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 793 } while (0)
 794
 795 #define device_create_file_pwmenable(client, offset) \
 796 do { \
 797 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
 798 } while (0)
 799
 800 static ssize_t
 801 show_sensor_reg(struct device *dev, char *buf, int nr)
 802 {
 803         struct w83781d_data *data = w83781d_update_device(dev);
 804         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 805 }
 806
 807 static ssize_t
 808 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 809 {
 810         struct i2c_client *client = to_i2c_client(dev);
 811         struct w83781d_data *data = i2c_get_clientdata(client);
 812         u32 val, tmp;
 813
 814         val = simple_strtoul(buf, NULL, 10);
 815
 816         mutex_lock(&data->update_lock);
 817
 818         switch (val) {
 819         case 1:         /* PII/Celeron diode */
 820                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 821                 w83781d_write_value(client, W83781D_REG_SCFG1,
 822                                     tmp | BIT_SCFG1[nr - 1]);
 823                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 824                 w83781d_write_value(client, W83781D_REG_SCFG2,
 825                                     tmp | BIT_SCFG2[nr - 1]);
 826                 data->sens[nr - 1] = val;
 827                 break;
 828         case 2:         /* 3904 */
 829                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 830                 w83781d_write_value(client, W83781D_REG_SCFG1,
 831                                     tmp | BIT_SCFG1[nr - 1]);
 832                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 833                 w83781d_write_value(client, W83781D_REG_SCFG2,
 834                                     tmp & ~BIT_SCFG2[nr - 1]);
 835                 data->sens[nr - 1] = val;
 836                 break;
 837         case W83781D_DEFAULT_BETA:      /* thermistor */
 838                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 839                 w83781d_write_value(client, W83781D_REG_SCFG1,
 840                                     tmp & ~BIT_SCFG1[nr - 1]);
 841                 data->sens[nr - 1] = val;
 842                 break;
 843         default:
 844                 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
 845                        (long) val, W83781D_DEFAULT_BETA);
 846                 break;
 847         }
 848
 849         mutex_unlock(&data->update_lock);
 850         return count;
 851 }
 852
 853 #define sysfs_sensor(offset) \
 854 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 855 { \
 856     return show_sensor_reg(dev, buf, offset); \
 857 } \
 858 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 859 { \
 860     return store_sensor_reg(dev, buf, count, offset); \
 861 } \
 862 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
 863
 864 sysfs_sensor(1);
 865 sysfs_sensor(2);
 866 sysfs_sensor(3);
 867
 868 #define device_create_file_sensor(client, offset) \
 869 do { \
 870 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 871 } while (0)
 872
 873 /* This function is called when:
 874      * w83781d_driver is inserted (when this module is loaded), for each
 875        available adapter
 876      * when a new adapter is inserted (and w83781d_driver is still present) */
 877 static int
 878 w83781d_attach_adapter(struct i2c_adapter *adapter)
 879 {
 880         if (!(adapter->class & I2C_CLASS_HWMON))
 881                 return 0;
 882         return i2c_probe(adapter, &addr_data, w83781d_detect);
 883 }
 884
 885 static int
 886 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
 887 {
 888         return w83781d_detect(adapter, isa_address, -1);
 889 }
 890
 891 /* Assumes that adapter is of I2C, not ISA variety.
 892  * OTHERWISE DON'T CALL THIS
 893  */
 894 static int
 895 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
 896                 struct i2c_client *new_client)
 897 {
 898         int i, val1 = 0, id;
 899         int err;
 900         const char *client_name = "";
 901         struct w83781d_data *data = i2c_get_clientdata(new_client);
 902
 903         data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
 904         if (!(data->lm75[0])) {
 905                 err = -ENOMEM;
 906                 goto ERROR_SC_0;
 907         }
 908
 909         id = i2c_adapter_id(adapter);
 910
 911         if (force_subclients[0] == id && force_subclients[1] == address) {
 912                 for (i = 2; i <= 3; i++) {
 913                         if (force_subclients[i] < 0x48 ||
 914                             force_subclients[i] > 0x4f) {
 915                                 dev_err(&new_client->dev, "Invalid subclient "
 916                                         "address %d; must be 0x48-0x4f\n",
 917                                         force_subclients[i]);
 918                                 err = -EINVAL;
 919                                 goto ERROR_SC_1;
 920                         }
 921                 }
 922                 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
 923                                 (force_subclients[2] & 0x07) |
 924                                 ((force_subclients[3] & 0x07) << 4));
 925                 data->lm75[0]->addr = force_subclients[2];
 926         } else {
 927                 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
 928                 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
 929         }
 930
 931         if (kind != w83783s) {
 932                 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
 933                 if (!(data->lm75[1])) {
 934                         err = -ENOMEM;
 935                         goto ERROR_SC_1;
 936                 }
 937
 938                 if (force_subclients[0] == id &&
 939                     force_subclients[1] == address) {
 940                         data->lm75[1]->addr = force_subclients[3];
 941                 } else {
 942                         data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
 943                 }
 944                 if (data->lm75[0]->addr == data->lm75[1]->addr) {
 945                         dev_err(&new_client->dev,
 946                                "Duplicate addresses 0x%x for subclients.\n",
 947                                data->lm75[0]->addr);
 948                         err = -EBUSY;
 949                         goto ERROR_SC_2;
 950                 }
 951         }
 952
 953         if (kind == w83781d)
 954                 client_name = "w83781d subclient";
 955         else if (kind == w83782d)
 956                 client_name = "w83782d subclient";
 957         else if (kind == w83783s)
 958                 client_name = "w83783s subclient";
 959         else if (kind == w83627hf)
 960                 client_name = "w83627hf subclient";
 961         else if (kind == as99127f)
 962                 client_name = "as99127f subclient";
 963
 964         for (i = 0; i <= 1; i++) {
 965                 /* store all data in w83781d */
 966                 i2c_set_clientdata(data->lm75[i], NULL);
 967                 data->lm75[i]->adapter = adapter;
 968                 data->lm75[i]->driver = &w83781d_driver;
 969                 data->lm75[i]->flags = 0;
 970                 strlcpy(data->lm75[i]->name, client_name,
 971                         I2C_NAME_SIZE);
 972                 if ((err = i2c_attach_client(data->lm75[i]))) {
 973                         dev_err(&new_client->dev, "Subclient %d "
 974                                 "registration at address 0x%x "
 975                                 "failed.\n", i, data->lm75[i]->addr);
 976                         if (i == 1)
 977                                 goto ERROR_SC_3;
 978                         goto ERROR_SC_2;
 979                 }
 980                 if (kind == w83783s)
 981                         break;
 982         }
 983
 984         return 0;
 985
 986 /* Undo inits in case of errors */
 987 ERROR_SC_3:
 988         i2c_detach_client(data->lm75[0]);
 989 ERROR_SC_2:
 990         kfree(data->lm75[1]);
 991 ERROR_SC_1:
 992         kfree(data->lm75[0]);
 993 ERROR_SC_0:
 994         return err;
 995 }
 996
 997 static int
 998 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
 999 {
1000         int i = 0, val1 = 0, val2;
1001         struct i2c_client *new_client;
1002         struct w83781d_data *data;
1003         int err;
1004         const char *client_name = "";
1005         int is_isa = i2c_is_isa_adapter(adapter);
1006         enum vendor { winbond, asus } vendid;
1007
1008         if (!is_isa
1009             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1010                 err = -EINVAL;
1011                 goto ERROR0;
1012         }
1013
1014         /* Prevent users from forcing a kind for a bus it isn't supposed
1015            to possibly be on */
1016         if (is_isa && (kind == as99127f || kind == w83783s)) {
1017                 dev_err(&adapter->dev,
1018                         "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1019                         address);
1020                 err = -EINVAL;
1021                 goto ERROR0;
1022         }
1023
1024         if (is_isa)
1025                 if (!request_region(address, W83781D_EXTENT,
1026                                     w83781d_isa_driver.driver.name)) {
1027                         dev_dbg(&adapter->dev, "Request of region "
1028                                 "0x%x-0x%x for w83781d failed\n", address,
1029                                 address + W83781D_EXTENT - 1);
1030                         err = -EBUSY;
1031                         goto ERROR0;
1032                 }
1033
1034         /* Probe whether there is anything available on this address. Already
1035            done for SMBus clients */
1036         if (kind < 0) {
1037                 if (is_isa) {
1038
1039 #define REALLY_SLOW_IO
1040                         /* We need the timeouts for at least some LM78-like
1041                            chips. But only if we read 'undefined' registers. */
1042                         i = inb_p(address + 1);
1043                         if (inb_p(address + 2) != i
1044                          || inb_p(address + 3) != i
1045                          || inb_p(address + 7) != i) {
1046                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1047                                         "chip failed at step 1\n");
1048                                 err = -ENODEV;
1049                                 goto ERROR1;
1050                         }
1051 #undef REALLY_SLOW_IO
1052
1053                         /* Let's just hope nothing breaks here */
1054                         i = inb_p(address + 5) & 0x7f;
1055                         outb_p(~i & 0x7f, address + 5);
1056                         val2 = inb_p(address + 5) & 0x7f;
1057                         if (val2 != (~i & 0x7f)) {
1058                                 outb_p(i, address + 5);
1059                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1060                                         "chip failed at step 2 (0x%x != "
1061                                         "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1062                                         address + 5);
1063                                 err = -ENODEV;
1064                                 goto ERROR1;
1065                         }
1066                 }
1067         }
1068
1069         /* OK. For now, we presume we have a valid client. We now create the
1070            client structure, even though we cannot fill it completely yet.
1071            But it allows us to access w83781d_{read,write}_value. */
1072
1073         if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1074                 err = -ENOMEM;
1075                 goto ERROR1;
1076         }
1077
1078         new_client = &data->client;
1079         i2c_set_clientdata(new_client, data);
1080         new_client->addr = address;
1081         mutex_init(&data->lock);
1082         new_client->adapter = adapter;
1083         new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1084         new_client->flags = 0;
1085
1086         /* Now, we do the remaining detection. */
1087
1088         /* The w8378?d may be stuck in some other bank than bank 0. This may
1089            make reading other information impossible. Specify a force=... or
1090            force_*=... parameter, and the Winbond will be reset to the right
1091            bank. */
1092         if (kind < 0) {
1093                 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1094                         dev_dbg(&new_client->dev, "Detection failed at step "
1095                                 "3\n");
1096                         err = -ENODEV;
1097                         goto ERROR2;
1098                 }
1099                 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1100                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1101                 /* Check for Winbond or Asus ID if in bank 0 */
1102                 if ((!(val1 & 0x07)) &&
1103                     (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1104                      || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1105                         dev_dbg(&new_client->dev, "Detection failed at step "
1106                                 "4\n");
1107                         err = -ENODEV;
1108                         goto ERROR2;
1109                 }
1110                 /* If Winbond SMBus, check address at 0x48.
1111                    Asus doesn't support, except for as99127f rev.2 */
1112                 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1113                                   ((val1 & 0x80) && (val2 == 0x5c)))) {
1114                         if (w83781d_read_value
1115                             (new_client, W83781D_REG_I2C_ADDR) != address) {
1116                                 dev_dbg(&new_client->dev, "Detection failed "
1117                                         "at step 5\n");
1118                                 err = -ENODEV;
1119                                 goto ERROR2;
1120                         }
1121                 }
1122         }
1123
1124         /* We have either had a force parameter, or we have already detected the
1125            Winbond. Put it now into bank 0 and Vendor ID High Byte */
1126         w83781d_write_value(new_client, W83781D_REG_BANK,
1127                             (w83781d_read_value(new_client,
1128                                                 W83781D_REG_BANK) & 0x78) |
1129                             0x80);
1130
1131         /* Determine the chip type. */
1132         if (kind <= 0) {
1133                 /* get vendor ID */
1134                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1135                 if (val2 == 0x5c)
1136                         vendid = winbond;
1137                 else if (val2 == 0x12)
1138                         vendid = asus;
1139                 else {
1140                         dev_dbg(&new_client->dev, "Chip was made by neither "
1141                                 "Winbond nor Asus?\n");
1142                         err = -ENODEV;
1143                         goto ERROR2;
1144                 }
1145
1146                 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1147                 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1148                         kind = w83781d;
1149                 else if (val1 == 0x30 && vendid == winbond)
1150                         kind = w83782d;
1151                 else if (val1 == 0x40 && vendid == winbond && !is_isa
1152                                 && address == 0x2d)
1153                         kind = w83783s;
1154                 else if (val1 == 0x21 && vendid == winbond)
1155                         kind = w83627hf;
1156                 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1157                         kind = as99127f;
1158                 else {
1159                         if (kind == 0)
1160                                 dev_warn(&new_client->dev, "Ignoring 'force' "
1161                                          "parameter for unknown chip at "
1162                                          "adapter %d, address 0x%02x\n",
1163                                          i2c_adapter_id(adapter), address);
1164                         err = -EINVAL;
1165                         goto ERROR2;
1166                 }
1167         }
1168
1169         if (kind == w83781d) {
1170                 client_name = "w83781d";
1171         } else if (kind == w83782d) {
1172                 client_name = "w83782d";
1173         } else if (kind == w83783s) {
1174                 client_name = "w83783s";
1175         } else if (kind == w83627hf) {
1176                 client_name = "w83627hf";
1177         } else if (kind == as99127f) {
1178                 client_name = "as99127f";
1179         }
1180
1181         /* Fill in the remaining client fields and put into the global list */
1182         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1183         data->type = kind;
1184
1185         data->valid = 0;
1186         mutex_init(&data->update_lock);
1187
1188         /* Tell the I2C layer a new client has arrived */
1189         if ((err = i2c_attach_client(new_client)))
1190                 goto ERROR2;
1191
1192         /* attach secondary i2c lm75-like clients */
1193         if (!is_isa) {
1194                 if ((err = w83781d_detect_subclients(adapter, address,
1195                                 kind, new_client)))
1196                         goto ERROR3;
1197         } else {
1198                 data->lm75[0] = NULL;
1199                 data->lm75[1] = NULL;
1200         }
1201
1202         /* Initialize the chip */
1203         w83781d_init_client(new_client);
1204
1205         /* A few vars need to be filled upon startup */
1206         for (i = 1; i <= 3; i++) {
1207                 data->fan_min[i - 1] = w83781d_read_value(new_client,
1208                                         W83781D_REG_FAN_MIN(i));
1209         }
1210         if (kind != w83781d && kind != as99127f)
1211                 for (i = 0; i < 4; i++)
1212                         data->pwmenable[i] = 1;
1213
1214         /* Register sysfs hooks */
1215         data->class_dev = hwmon_device_register(&new_client->dev);
1216         if (IS_ERR(data->class_dev)) {
1217                 err = PTR_ERR(data->class_dev);
1218                 goto ERROR4;
1219         }
1220
1221         device_create_file_in(new_client, 0);
1222         if (kind != w83783s)
1223                 device_create_file_in(new_client, 1);
1224         device_create_file_in(new_client, 2);
1225         device_create_file_in(new_client, 3);
1226         device_create_file_in(new_client, 4);
1227         device_create_file_in(new_client, 5);
1228         device_create_file_in(new_client, 6);
1229         if (kind != as99127f && kind != w83781d && kind != w83783s) {
1230                 device_create_file_in(new_client, 7);
1231                 device_create_file_in(new_client, 8);
1232         }
1233
1234         device_create_file_fan(new_client, 1);
1235         device_create_file_fan(new_client, 2);
1236         device_create_file_fan(new_client, 3);
1237
1238         device_create_file_temp(new_client, 1);
1239         device_create_file_temp(new_client, 2);
1240         if (kind != w83783s)
1241                 device_create_file_temp(new_client, 3);
1242
1243         device_create_file_vid(new_client);
1244         device_create_file_vrm(new_client);
1245
1246         device_create_file_fan_div(new_client, 1);
1247         device_create_file_fan_div(new_client, 2);
1248         device_create_file_fan_div(new_client, 3);
1249
1250         device_create_file_alarms(new_client);
1251
1252         device_create_file_beep(new_client);
1253
1254         if (kind != w83781d && kind != as99127f) {
1255                 device_create_file_pwm(new_client, 1);
1256                 device_create_file_pwm(new_client, 2);
1257                 device_create_file_pwmenable(new_client, 2);
1258         }
1259         if (kind == w83782d && !is_isa) {
1260                 device_create_file_pwm(new_client, 3);
1261                 device_create_file_pwm(new_client, 4);
1262         }
1263
1264         if (kind != as99127f && kind != w83781d) {
1265                 device_create_file_sensor(new_client, 1);
1266                 device_create_file_sensor(new_client, 2);
1267                 if (kind != w83783s)
1268                         device_create_file_sensor(new_client, 3);
1269         }
1270
1271         return 0;
1272
1273 ERROR4:
1274         if (data->lm75[1]) {
1275                 i2c_detach_client(data->lm75[1]);
1276                 kfree(data->lm75[1]);
1277         }
1278         if (data->lm75[0]) {
1279                 i2c_detach_client(data->lm75[0]);
1280                 kfree(data->lm75[0]);
1281         }
1282 ERROR3:
1283         i2c_detach_client(new_client);
1284 ERROR2:
1285         kfree(data);
1286 ERROR1:
1287         if (is_isa)
1288                 release_region(address, W83781D_EXTENT);
1289 ERROR0:
1290         return err;
1291 }
1292
1293 static int
1294 w83781d_detach_client(struct i2c_client *client)
1295 {
1296         struct w83781d_data *data = i2c_get_clientdata(client);
1297         int err;
1298
1299         /* main client */
1300         if (data)
1301                 hwmon_device_unregister(data->class_dev);
1302
1303         if (i2c_is_isa_client(client))
1304                 release_region(client->addr, W83781D_EXTENT);
1305
1306         if ((err = i2c_detach_client(client)))
1307                 return err;
1308
1309         /* main client */
1310         if (data)
1311                 kfree(data);
1312
1313         /* subclient */
1314         else
1315                 kfree(client);
1316
1317         return 0;
1318 }
1319
1320 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1321    bank switches. ISA access must always be locked explicitly!
1322    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1323    would slow down the W83781D access and should not be necessary.
1324    There are some ugly typecasts here, but the good news is - they should
1325    nowhere else be necessary! */
1326 static int
1327 w83781d_read_value(struct i2c_client *client, u16 reg)
1328 {
1329         struct w83781d_data *data = i2c_get_clientdata(client);
1330         int res, word_sized, bank;
1331         struct i2c_client *cl;
1332
1333         mutex_lock(&data->lock);
1334         if (i2c_is_isa_client(client)) {
1335                 word_sized = (((reg & 0xff00) == 0x100)
1336                               || ((reg & 0xff00) == 0x200))
1337                     && (((reg & 0x00ff) == 0x50)
1338                         || ((reg & 0x00ff) == 0x53)
1339                         || ((reg & 0x00ff) == 0x55));
1340                 if (reg & 0xff00) {
1341                         outb_p(W83781D_REG_BANK,
1342                                client->addr + W83781D_ADDR_REG_OFFSET);
1343                         outb_p(reg >> 8,
1344                                client->addr + W83781D_DATA_REG_OFFSET);
1345                 }
1346                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1347                 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1348                 if (word_sized) {
1349                         outb_p((reg & 0xff) + 1,
1350                                client->addr + W83781D_ADDR_REG_OFFSET);
1351                         res =
1352                             (res << 8) + inb_p(client->addr +
1353                                                W83781D_DATA_REG_OFFSET);
1354                 }
1355                 if (reg & 0xff00) {
1356                         outb_p(W83781D_REG_BANK,
1357                                client->addr + W83781D_ADDR_REG_OFFSET);
1358                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1359                 }
1360         } else {
1361                 bank = (reg >> 8) & 0x0f;
1362                 if (bank > 2)
1363                         /* switch banks */
1364                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1365                                                   bank);
1366                 if (bank == 0 || bank > 2) {
1367                         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1368                 } else {
1369                         /* switch to subclient */
1370                         cl = data->lm75[bank - 1];
1371                         /* convert from ISA to LM75 I2C addresses */
1372                         switch (reg & 0xff) {
1373                         case 0x50:      /* TEMP */
1374                                 res = swab16(i2c_smbus_read_word_data(cl, 0));
1375                                 break;
1376                         case 0x52:      /* CONFIG */
1377                                 res = i2c_smbus_read_byte_data(cl, 1);
1378                                 break;
1379                         case 0x53:      /* HYST */
1380                                 res = swab16(i2c_smbus_read_word_data(cl, 2));
1381                                 break;
1382                         case 0x55:      /* OVER */
1383                         default:
1384                                 res = swab16(i2c_smbus_read_word_data(cl, 3));
1385                                 break;
1386                         }
1387                 }
1388                 if (bank > 2)
1389                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1390         }
1391         mutex_unlock(&data->lock);
1392         return res;
1393 }
1394
1395 static int
1396 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1397 {
1398         struct w83781d_data *data = i2c_get_clientdata(client);
1399         int word_sized, bank;
1400         struct i2c_client *cl;
1401
1402         mutex_lock(&data->lock);
1403         if (i2c_is_isa_client(client)) {
1404                 word_sized = (((reg & 0xff00) == 0x100)
1405                               || ((reg & 0xff00) == 0x200))
1406                     && (((reg & 0x00ff) == 0x53)
1407                         || ((reg & 0x00ff) == 0x55));
1408                 if (reg & 0xff00) {
1409                         outb_p(W83781D_REG_BANK,
1410                                client->addr + W83781D_ADDR_REG_OFFSET);
1411                         outb_p(reg >> 8,
1412                                client->addr + W83781D_DATA_REG_OFFSET);
1413                 }
1414                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1415                 if (word_sized) {
1416                         outb_p(value >> 8,
1417                                client->addr + W83781D_DATA_REG_OFFSET);
1418                         outb_p((reg & 0xff) + 1,
1419                                client->addr + W83781D_ADDR_REG_OFFSET);
1420                 }
1421                 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1422                 if (reg & 0xff00) {
1423                         outb_p(W83781D_REG_BANK,
1424                                client->addr + W83781D_ADDR_REG_OFFSET);
1425                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1426                 }
1427         } else {
1428                 bank = (reg >> 8) & 0x0f;
1429                 if (bank > 2)
1430                         /* switch banks */
1431                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1432                                                   bank);
1433                 if (bank == 0 || bank > 2) {
1434                         i2c_smbus_write_byte_data(client, reg & 0xff,
1435                                                   value & 0xff);
1436                 } else {
1437                         /* switch to subclient */
1438                         cl = data->lm75[bank - 1];
1439                         /* convert from ISA to LM75 I2C addresses */
1440                         switch (reg & 0xff) {
1441                         case 0x52:      /* CONFIG */
1442                                 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1443                                 break;
1444                         case 0x53:      /* HYST */
1445                                 i2c_smbus_write_word_data(cl, 2, swab16(value));
1446                                 break;
1447                         case 0x55:      /* OVER */
1448                                 i2c_smbus_write_word_data(cl, 3, swab16(value));
1449                                 break;
1450                         }
1451                 }
1452                 if (bank > 2)
1453                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1454         }
1455         mutex_unlock(&data->lock);
1456         return 0;
1457 }
1458
1459 static void
1460 w83781d_init_client(struct i2c_client *client)
1461 {
1462         struct w83781d_data *data = i2c_get_clientdata(client);
1463         int i, p;
1464         int type = data->type;
1465         u8 tmp;
1466
1467         if (reset && type != as99127f) { /* this resets registers we don't have
1468                                            documentation for on the as99127f */
1469                 /* Resetting the chip has been the default for a long time,
1470                    but it causes the BIOS initializations (fan clock dividers,
1471                    thermal sensor types...) to be lost, so it is now optional.
1472                    It might even go away if nobody reports it as being useful,
1473                    as I see very little reason why this would be needed at
1474                    all. */
1475                 dev_info(&client->dev, "If reset=1 solved a problem you were "
1476                          "having, please report!\n");
1477
1478                 /* save these registers */
1479                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1480                 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1481                 /* Reset all except Watchdog values and last conversion values
1482                    This sets fan-divs to 2, among others */
1483                 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1484                 /* Restore the registers and disable power-on abnormal beep.
1485                    This saves FAN 1/2/3 input/output values set by BIOS. */
1486                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1487                 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1488                 /* Disable master beep-enable (reset turns it on).
1489                    Individual beep_mask should be reset to off but for some reason
1490                    disabling this bit helps some people not get beeped */
1491                 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1492         }
1493
1494         /* Disable power-on abnormal beep, as advised by the datasheet.
1495            Already done if reset=1. */
1496         if (init && !reset && type != as99127f) {
1497                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1498                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1499         }
1500
1501         data->vrm = vid_which_vrm();
1502
1503         if ((type != w83781d) && (type != as99127f)) {
1504                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1505                 for (i = 1; i <= 3; i++) {
1506                         if (!(tmp & BIT_SCFG1[i - 1])) {
1507                                 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1508                         } else {
1509                                 if (w83781d_read_value
1510                                     (client,
1511                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1512                                         data->sens[i - 1] = 1;
1513                                 else
1514                                         data->sens[i - 1] = 2;
1515                         }
1516                         if (type == w83783s && i == 2)
1517                                 break;
1518                 }
1519         }
1520
1521         if (init && type != as99127f) {
1522                 /* Enable temp2 */
1523                 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1524                 if (tmp & 0x01) {
1525                         dev_warn(&client->dev, "Enabling temp2, readings "
1526                                  "might not make sense\n");
1527                         w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1528                                 tmp & 0xfe);
1529                 }
1530
1531                 /* Enable temp3 */
1532                 if (type != w83783s) {
1533                         tmp = w83781d_read_value(client,
1534                                 W83781D_REG_TEMP3_CONFIG);
1535                         if (tmp & 0x01) {
1536                                 dev_warn(&client->dev, "Enabling temp3, "
1537                                          "readings might not make sense\n");
1538                                 w83781d_write_value(client,
1539                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1540                         }
1541                 }
1542         }
1543
1544         /* Start monitoring */
1545         w83781d_write_value(client, W83781D_REG_CONFIG,
1546                             (w83781d_read_value(client,
1547                                                 W83781D_REG_CONFIG) & 0xf7)
1548                             | 0x01);
1549 }
1550
1551 static struct w83781d_data *w83781d_update_device(struct device *dev)
1552 {
1553         struct i2c_client *client = to_i2c_client(dev);
1554         struct w83781d_data *data = i2c_get_clientdata(client);
1555         int i;
1556
1557         mutex_lock(&data->update_lock);
1558
1559         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1560             || !data->valid) {
1561                 dev_dbg(dev, "Starting device update\n");
1562
1563                 for (i = 0; i <= 8; i++) {
1564                         if (data->type == w83783s && i == 1)
1565                                 continue;       /* 783S has no in1 */
1566                         data->in[i] =
1567                             w83781d_read_value(client, W83781D_REG_IN(i));
1568                         data->in_min[i] =
1569                             w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1570                         data->in_max[i] =
1571                             w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1572                         if ((data->type != w83782d)
1573                             && (data->type != w83627hf) && (i == 6))
1574                                 break;
1575                 }
1576                 for (i = 1; i <= 3; i++) {
1577                         data->fan[i - 1] =
1578                             w83781d_read_value(client, W83781D_REG_FAN(i));
1579                         data->fan_min[i - 1] =
1580                             w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1581                 }
1582                 if (data->type != w83781d && data->type != as99127f) {
1583                         for (i = 1; i <= 4; i++) {
1584                                 data->pwm[i - 1] =
1585                                     w83781d_read_value(client,
1586                                                        W83781D_REG_PWM(i));
1587                                 if ((data->type != w83782d
1588                                      || i2c_is_isa_client(client))
1589                                     && i == 2)
1590                                         break;
1591                         }
1592                         /* Only PWM2 can be disabled */
1593                         data->pwmenable[1] = (w83781d_read_value(client,
1594                                               W83781D_REG_PWMCLK12) & 0x08) >> 3;
1595                 }
1596
1597                 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1598                 data->temp_max =
1599                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1600                 data->temp_max_hyst =
1601                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1602                 data->temp_add[0] =
1603                     w83781d_read_value(client, W83781D_REG_TEMP(2));
1604                 data->temp_max_add[0] =
1605                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1606                 data->temp_max_hyst_add[0] =
1607                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1608                 if (data->type != w83783s) {
1609                         data->temp_add[1] =
1610                             w83781d_read_value(client, W83781D_REG_TEMP(3));
1611                         data->temp_max_add[1] =
1612                             w83781d_read_value(client,
1613                                                W83781D_REG_TEMP_OVER(3));
1614                         data->temp_max_hyst_add[1] =
1615                             w83781d_read_value(client,
1616                                                W83781D_REG_TEMP_HYST(3));
1617                 }
1618                 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1619                 data->vid = i & 0x0f;
1620                 data->vid |= (w83781d_read_value(client,
1621                                         W83781D_REG_CHIPID) & 0x01) << 4;
1622                 data->fan_div[0] = (i >> 4) & 0x03;
1623                 data->fan_div[1] = (i >> 6) & 0x03;
1624                 data->fan_div[2] = (w83781d_read_value(client,
1625                                         W83781D_REG_PIN) >> 6) & 0x03;
1626                 if ((data->type != w83781d) && (data->type != as99127f)) {
1627                         i = w83781d_read_value(client, W83781D_REG_VBAT);
1628                         data->fan_div[0] |= (i >> 3) & 0x04;
1629                         data->fan_div[1] |= (i >> 4) & 0x04;
1630                         data->fan_div[2] |= (i >> 5) & 0x04;
1631                 }
1632                 if ((data->type == w83782d) || (data->type == w83627hf)) {
1633                         data->alarms = w83781d_read_value(client,
1634                                                 W83782D_REG_ALARM1)
1635                                      | (w83781d_read_value(client,
1636                                                 W83782D_REG_ALARM2) << 8)
1637                                      | (w83781d_read_value(client,
1638                                                 W83782D_REG_ALARM3) << 16);
1639                 } else if (data->type == w83783s) {
1640                         data->alarms = w83781d_read_value(client,
1641                                                 W83782D_REG_ALARM1)
1642                                      | (w83781d_read_value(client,
1643                                                 W83782D_REG_ALARM2) << 8);
1644                 } else {
1645                         /* No real-time status registers, fall back to
1646                            interrupt status registers */
1647                         data->alarms = w83781d_read_value(client,
1648                                                 W83781D_REG_ALARM1)
1649                                      | (w83781d_read_value(client,
1650                                                 W83781D_REG_ALARM2) << 8);
1651                 }
1652                 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1653                 data->beep_enable = i >> 7;
1654                 data->beep_mask = ((i & 0x7f) << 8) +
1655                     w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1656                 if ((data->type != w83781d) && (data->type != as99127f)) {
1657                         data->beep_mask |=
1658                             w83781d_read_value(client,
1659                                                W83781D_REG_BEEP_INTS3) << 16;
1660                 }
1661                 data->last_updated = jiffies;
1662                 data->valid = 1;
1663         }
1664
1665         mutex_unlock(&data->update_lock);
1666
1667         return data;
1668 }
1669
1670 static int __init
1671 sensors_w83781d_init(void)
1672 {
1673         int res;
1674
1675         res = i2c_add_driver(&w83781d_driver);
1676         if (res)
1677                 return res;
1678
1679         res = i2c_isa_add_driver(&w83781d_isa_driver);
1680         if (res) {
1681                 i2c_del_driver(&w83781d_driver);
1682                 return res;
1683         }
1684
1685         return 0;
1686 }
1687
1688 static void __exit
1689 sensors_w83781d_exit(void)
1690 {
1691         i2c_isa_del_driver(&w83781d_isa_driver);
1692         i2c_del_driver(&w83781d_driver);
1693 }
1694
1695 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1696               "Philip Edelbrock <phil@netroedge.com>, "
1697               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1698 MODULE_DESCRIPTION("W83781D driver");
1699 MODULE_LICENSE("GPL");
1700
1701 module_init(sensors_w83781d_init);
1702 module_exit(sensors_w83781d_exit);