1 #ifndef __X86_64_MMU_CONTEXT_H
2 #define __X86_64_MMU_CONTEXT_H
4 #include <linux/config.h>
6 #include <asm/atomic.h>
7 #include <asm/pgalloc.h>
9 #include <asm/pgtable.h>
10 #include <asm/tlbflush.h>
13 * possibly do the LDT unload here?
15 int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
16 void destroy_context(struct mm_struct *mm);
20 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
22 if (read_pda(mmu_state) == TLBSTATE_OK)
23 write_pda(mmu_state, TLBSTATE_LAZY);
26 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
31 static inline void load_cr3(pgd_t *pgd)
33 asm volatile("movq %0,%%cr3" :: "r" (__pa(pgd)) : "memory");
36 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
37 struct task_struct *tsk)
39 unsigned cpu = smp_processor_id();
40 if (likely(prev != next)) {
41 /* stop flush ipis for the previous mm */
42 clear_bit(cpu, &prev->cpu_vm_mask);
44 write_pda(mmu_state, TLBSTATE_OK);
45 write_pda(active_mm, next);
47 set_bit(cpu, &next->cpu_vm_mask);
50 if (unlikely(next->context.ldt != prev->context.ldt))
51 load_LDT_nolock(&next->context, cpu);
55 write_pda(mmu_state, TLBSTATE_OK);
56 if (read_pda(active_mm) != next)
58 if(!test_and_set_bit(cpu, &next->cpu_vm_mask)) {
59 /* We were in lazy tlb mode and leave_mm disabled
60 * tlb flush IPI delivery. We must reload CR3
61 * to make sure to use no freed page tables.
64 load_LDT_nolock(&next->context, cpu);
70 #define deactivate_mm(tsk,mm) do { \
72 asm volatile("movl %0,%%fs"::"r"(0)); \
75 #define activate_mm(prev, next) \
76 switch_mm((prev),(next),NULL)