2 * Copyright 2001 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 * Copyright (c) 2003, 2004 Maciej W. Rozycki
6 * Common time service routines for MIPS machines. See
7 * Documentation/mips/time.README.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 #include <linux/types.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/sched.h>
18 #include <linux/param.h>
19 #include <linux/time.h>
20 #include <linux/timex.h>
21 #include <linux/smp.h>
22 #include <linux/kernel_stat.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/module.h>
27 #include <asm/bootinfo.h>
28 #include <asm/cache.h>
29 #include <asm/compiler.h>
31 #include <asm/cpu-features.h>
32 #include <asm/div64.h>
33 #include <asm/sections.h>
37 * The integer part of the number of usecs per jiffy is taken from tick,
38 * but the fractional part is not recorded, so we calculate it using the
39 * initial value of HZ. This aids systems where tick isn't really an
40 * integer (e.g. for HZ = 128).
42 #define USECS_PER_JIFFY TICK_SIZE
43 #define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ))
45 #define TICK_SIZE (tick_nsec / 1000)
50 DEFINE_SPINLOCK(rtc_lock);
53 * By default we provide the null RTC ops
55 static unsigned long null_rtc_get_time(void)
57 return mktime(2000, 1, 1, 0, 0, 0);
60 static int null_rtc_set_time(unsigned long sec)
65 unsigned long (*rtc_mips_get_time)(void) = null_rtc_get_time;
66 int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time;
67 int (*rtc_mips_set_mmss)(unsigned long);
70 /* usecs per counter cycle, shifted to left by 32 bits */
71 static unsigned int sll32_usecs_per_cycle;
73 /* how many counter cycles in a jiffy */
74 static unsigned long cycles_per_jiffy __read_mostly;
76 /* Cycle counter value at the previous timer interrupt.. */
77 static unsigned int timerhi, timerlo;
79 /* expirelo is the count value for next CPU timer interrupt */
80 static unsigned int expirelo;
84 * Null timer ack for systems not needing one (e.g. i8254).
86 static void null_timer_ack(void) { /* nothing */ }
89 * Null high precision timer functions for systems lacking one.
91 static unsigned int null_hpt_read(void)
96 static void null_hpt_init(unsigned int count)
103 * Timer ack for an R4k-compatible timer of a known frequency.
105 static void c0_timer_ack(void)
109 #ifndef CONFIG_SOC_PNX8550 /* pnx8550 resets to zero */
110 /* Ack this timer interrupt and set the next one. */
111 expirelo += cycles_per_jiffy;
113 write_c0_compare(expirelo);
115 /* Check to see if we have missed any timer interrupts. */
116 while (((count = read_c0_count()) - expirelo) < 0x7fffffff) {
117 /* missed_timer_count++; */
118 expirelo = count + cycles_per_jiffy;
119 write_c0_compare(expirelo);
124 * High precision timer functions for a R4k-compatible timer.
126 static unsigned int c0_hpt_read(void)
128 return read_c0_count();
131 /* For use solely as a high precision timer. */
132 static void c0_hpt_init(unsigned int count)
134 write_c0_count(read_c0_count() - count);
137 /* For use both as a high precision timer and an interrupt source. */
138 static void c0_hpt_timer_init(unsigned int count)
140 count = read_c0_count() - count;
141 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
142 write_c0_count(expirelo - cycles_per_jiffy);
143 write_c0_compare(expirelo);
144 write_c0_count(count);
147 int (*mips_timer_state)(void);
148 void (*mips_timer_ack)(void);
149 unsigned int (*mips_hpt_read)(void);
150 void (*mips_hpt_init)(unsigned int);
153 * Gettimeoffset routines. These routines returns the time duration
154 * since last timer interrupt in usecs.
156 * If the exact CPU counter frequency is known, use fixed_rate_gettimeoffset.
157 * Otherwise use calibrate_gettimeoffset()
159 * If the CPU does not have the counter register, you can either supply
160 * your own gettimeoffset() routine, or use null_gettimeoffset(), which
161 * gives the same resolution as HZ.
164 static unsigned long null_gettimeoffset(void)
170 /* The function pointer to one of the gettimeoffset funcs. */
171 unsigned long (*do_gettimeoffset)(void) = null_gettimeoffset;
174 static unsigned long fixed_rate_gettimeoffset(void)
179 /* Get last timer tick in absolute kernel time */
180 count = mips_hpt_read();
182 /* .. relative to previous jiffy (32 bits is enough) */
185 __asm__("multu %1,%2"
187 : "r" (count), "r" (sll32_usecs_per_cycle)
188 : "lo", GCC_REG_ACCUM);
191 * Due to possible jiffies inconsistencies, we need to check
192 * the result so that we'll get a timer that is monotonic.
194 if (res >= USECS_PER_JIFFY)
195 res = USECS_PER_JIFFY - 1;
202 * Cached "1/(clocks per usec) * 2^32" value.
203 * It has to be recalculated once each jiffy.
205 static unsigned long cached_quotient;
207 /* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
208 static unsigned long last_jiffies;
211 * This is moved from dec/time.c:do_ioasic_gettimeoffset() by Maciej.
213 static unsigned long calibrate_div32_gettimeoffset(void)
216 unsigned long res, tmp;
217 unsigned long quotient;
221 quotient = cached_quotient;
223 if (last_jiffies != tmp) {
225 if (last_jiffies != 0) {
227 do_div64_32(r0, timerhi, timerlo, tmp);
228 do_div64_32(quotient, USECS_PER_JIFFY,
229 USECS_PER_JIFFY_FRAC, r0);
230 cached_quotient = quotient;
234 /* Get last timer tick in absolute kernel time */
235 count = mips_hpt_read();
237 /* .. relative to previous jiffy (32 bits is enough) */
240 __asm__("multu %1,%2"
242 : "r" (count), "r" (quotient)
243 : "lo", GCC_REG_ACCUM);
246 * Due to possible jiffies inconsistencies, we need to check
247 * the result so that we'll get a timer that is monotonic.
249 if (res >= USECS_PER_JIFFY)
250 res = USECS_PER_JIFFY - 1;
255 static unsigned long calibrate_div64_gettimeoffset(void)
258 unsigned long res, tmp;
259 unsigned long quotient;
263 quotient = cached_quotient;
265 if (last_jiffies != tmp) {
269 __asm__(".set push\n\t"
281 : "=&r" (quotient), "=&r" (r0)
282 : "r" (timerhi), "m" (timerlo),
283 "r" (tmp), "r" (USECS_PER_JIFFY),
284 "r" (USECS_PER_JIFFY_FRAC)
285 : "hi", "lo", GCC_REG_ACCUM);
286 cached_quotient = quotient;
290 /* Get last timer tick in absolute kernel time */
291 count = mips_hpt_read();
293 /* .. relative to previous jiffy (32 bits is enough) */
296 __asm__("multu %1,%2"
298 : "r" (count), "r" (quotient)
299 : "lo", GCC_REG_ACCUM);
302 * Due to possible jiffies inconsistencies, we need to check
303 * the result so that we'll get a timer that is monotonic.
305 if (res >= USECS_PER_JIFFY)
306 res = USECS_PER_JIFFY - 1;
312 /* last time when xtime and rtc are sync'ed up */
313 static long last_rtc_update;
316 * local_timer_interrupt() does profiling and process accounting
317 * on a per-CPU basis.
319 * In UP mode, it is invoked from the (global) timer_interrupt.
321 * In SMP mode, it might invoked by per-CPU timer interrupt, or
322 * a broadcasted inter-processor interrupt which itself is triggered
323 * by the global timer interrupt.
325 void local_timer_interrupt(int irq, void *dev_id)
327 profile_tick(CPU_PROFILING);
328 update_process_times(user_mode(get_irq_regs()));
332 * High-level timer interrupt service routines. This function
333 * is set as irqaction->handler and is invoked through do_IRQ.
335 irqreturn_t timer_interrupt(int irq, void *dev_id)
340 write_seqlock(&xtime_lock);
342 count = mips_hpt_read();
345 /* Update timerhi/timerlo for intra-jiffy calibration. */
346 timerhi += count < timerlo; /* Wrap around */
350 * call the generic timer interrupt handling
355 * If we have an externally synchronized Linux clock, then update
356 * CMOS clock accordingly every ~11 minutes. rtc_mips_set_time() has to be
357 * called as close as possible to 500 ms before the new second starts.
360 xtime.tv_sec > last_rtc_update + 660 &&
361 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
362 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
363 if (rtc_mips_set_mmss(xtime.tv_sec) == 0) {
364 last_rtc_update = xtime.tv_sec;
366 /* do it again in 60 s */
367 last_rtc_update = xtime.tv_sec - 600;
372 * If jiffies has overflown in this timer_interrupt, we must
373 * update the timer[hi]/[lo] to make fast gettimeoffset funcs
374 * quotient calc still valid. -arca
376 * The first timer interrupt comes late as interrupts are
377 * enabled long after timers are initialized. Therefore the
378 * high precision timer is fast, leading to wrong gettimeoffset()
379 * calculations. We deal with it by setting it based on the
380 * number of its ticks between the second and the third interrupt.
381 * That is still somewhat imprecise, but it's a good estimate.
386 static unsigned int prev_count;
387 static int hpt_initialized;
391 timerhi = timerlo = 0;
392 mips_hpt_init(count);
398 if (!hpt_initialized) {
399 unsigned int c3 = 3 * (count - prev_count);
403 mips_hpt_init(count - c3);
412 write_sequnlock(&xtime_lock);
415 * In UP mode, we call local_timer_interrupt() to do profiling
416 * and process accouting.
418 * In SMP mode, local_timer_interrupt() is invoked by appropriate
419 * low-level local timer interrupt handler.
421 local_timer_interrupt(irq, dev_id);
426 int null_perf_irq(void)
431 int (*perf_irq)(void) = null_perf_irq;
433 EXPORT_SYMBOL(null_perf_irq);
434 EXPORT_SYMBOL(perf_irq);
436 asmlinkage void ll_timer_interrupt(int irq)
438 int r2 = cpu_has_mips_r2;
441 kstat_this_cpu.irqs[irq]++;
445 * Before R2 of the architecture there was no way to see if a
446 * performance counter interrupt was pending, so we have to run the
447 * performance counter interrupt handler anyway.
449 if (!r2 || (read_c0_cause() & (1 << 26)))
453 /* we keep interrupt disabled all the time */
454 if (!r2 || (read_c0_cause() & (1 << 30)))
455 timer_interrupt(irq, NULL);
461 asmlinkage void ll_local_timer_interrupt(int irq)
464 if (smp_processor_id() != 0)
465 kstat_this_cpu.irqs[irq]++;
467 /* we keep interrupt disabled all the time */
468 local_timer_interrupt(irq, NULL);
474 * time_init() - it does the following things.
476 * 1) board_time_init() -
477 * a) (optional) set up RTC routines,
478 * b) (optional) calibrate and set the mips_hpt_frequency
479 * (only needed if you intended to use fixed_rate_gettimeoffset
480 * or use cpu counter as timer interrupt source)
481 * 2) setup xtime based on rtc_mips_get_time().
482 * 3) choose a appropriate gettimeoffset routine.
483 * 4) calculate a couple of cached variables for later usage
484 * 5) plat_timer_setup() -
485 * a) (optional) over-write any choices made above by time_init().
486 * b) machine specific code should setup the timer irqaction.
487 * c) enable the timer interrupt
490 void (*board_time_init)(void);
492 unsigned int mips_hpt_frequency;
494 static struct irqaction timer_irqaction = {
495 .handler = timer_interrupt,
496 .flags = IRQF_DISABLED,
500 static unsigned int __init calibrate_hpt(void)
503 u32 hpt_start, hpt_end, hpt_count, hz;
505 const int loops = HZ / 10;
510 * We want to calibrate for 0.1s, but to avoid a 64-bit
511 * division we round the number of loops up to the nearest
514 while (loops > 1 << log_2_loops)
516 i = 1 << log_2_loops;
519 * Wait for a rising edge of the timer interrupt.
521 while (mips_timer_state());
522 while (!mips_timer_state());
525 * Now see how many high precision timer ticks happen
526 * during the calculated number of periods between timer
529 hpt_start = mips_hpt_read();
531 while (mips_timer_state());
532 while (!mips_timer_state());
534 hpt_end = mips_hpt_read();
536 hpt_count = hpt_end - hpt_start;
538 frequency = (u64)hpt_count * (u64)hz;
540 return frequency >> log_2_loops;
543 void __init time_init(void)
548 if (!rtc_mips_set_mmss)
549 rtc_mips_set_mmss = rtc_mips_set_time;
551 xtime.tv_sec = rtc_mips_get_time();
554 set_normalized_timespec(&wall_to_monotonic,
555 -xtime.tv_sec, -xtime.tv_nsec);
557 /* Choose appropriate high precision timer routines. */
558 if (!cpu_has_counter && !mips_hpt_read) {
559 /* No high precision timer -- sorry. */
560 mips_hpt_read = null_hpt_read;
561 mips_hpt_init = null_hpt_init;
562 } else if (!mips_hpt_frequency && !mips_timer_state) {
563 /* A high precision timer of unknown frequency. */
564 if (!mips_hpt_read) {
565 /* No external high precision timer -- use R4k. */
566 mips_hpt_read = c0_hpt_read;
567 mips_hpt_init = c0_hpt_init;
570 if (cpu_has_mips32r1 || cpu_has_mips32r2 ||
571 (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
572 (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
574 * We need to calibrate the counter but we don't have
577 do_gettimeoffset = calibrate_div32_gettimeoffset;
580 * We need to calibrate the counter but we *do* have
583 do_gettimeoffset = calibrate_div64_gettimeoffset;
585 /* We know counter frequency. Or we can get it. */
586 if (!mips_hpt_read) {
587 /* No external high precision timer -- use R4k. */
588 mips_hpt_read = c0_hpt_read;
590 if (mips_timer_state)
591 mips_hpt_init = c0_hpt_init;
593 /* No external timer interrupt -- use R4k. */
594 mips_hpt_init = c0_hpt_timer_init;
595 mips_timer_ack = c0_timer_ack;
598 if (!mips_hpt_frequency)
599 mips_hpt_frequency = calibrate_hpt();
601 do_gettimeoffset = fixed_rate_gettimeoffset;
603 /* Calculate cache parameters. */
604 cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;
606 /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */
607 do_div64_32(sll32_usecs_per_cycle,
608 1000000, mips_hpt_frequency / 2,
611 /* Report the high precision timer rate for a reference. */
612 printk("Using %u.%03u MHz high precision timer.\n",
613 ((mips_hpt_frequency + 500) / 1000) / 1000,
614 ((mips_hpt_frequency + 500) / 1000) % 1000);
618 /* No timer interrupt ack (e.g. i8254). */
619 mips_timer_ack = null_timer_ack;
621 /* This sets up the high precision timer for the first interrupt. */
622 mips_hpt_init(mips_hpt_read());
625 * Call board specific timer interrupt setup.
627 * this pointer must be setup in machine setup routine.
629 * Even if a machine chooses to use a low-level timer interrupt,
630 * it still needs to setup the timer_irqaction.
631 * In that case, it might be better to set timer_irqaction.handler
632 * to be NULL function so that we are sure the high-level code
633 * is not invoked accidentally.
635 plat_timer_setup(&timer_irqaction);
639 #define STARTOFTIME 1970
640 #define SECDAY 86400L
641 #define SECYR (SECDAY * 365)
642 #define leapyear(y) ((!((y) % 4) && ((y) % 100)) || !((y) % 400))
643 #define days_in_year(y) (leapyear(y) ? 366 : 365)
644 #define days_in_month(m) (month_days[(m) - 1])
646 static int month_days[12] = {
647 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
650 void to_tm(unsigned long tim, struct rtc_time *tm)
655 gday = day = tim / SECDAY;
658 /* Hours, minutes, seconds are easy */
659 tm->tm_hour = hms / 3600;
660 tm->tm_min = (hms % 3600) / 60;
661 tm->tm_sec = (hms % 3600) % 60;
663 /* Number of years in days */
664 for (i = STARTOFTIME; day >= days_in_year(i); i++)
665 day -= days_in_year(i);
668 /* Number of months in days left */
669 if (leapyear(tm->tm_year))
670 days_in_month(FEBRUARY) = 29;
671 for (i = 1; day >= days_in_month(i); i++)
672 day -= days_in_month(i);
673 days_in_month(FEBRUARY) = 28;
674 tm->tm_mon = i - 1; /* tm_mon starts from 0 to 11 */
676 /* Days are what is left over (+1) from all that. */
677 tm->tm_mday = day + 1;
680 * Determine the day of week
682 tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */
685 EXPORT_SYMBOL(rtc_lock);
686 EXPORT_SYMBOL(to_tm);
687 EXPORT_SYMBOL(rtc_mips_set_time);
688 EXPORT_SYMBOL(rtc_mips_get_time);
690 unsigned long long sched_clock(void)
692 return (unsigned long long)jiffies*(1000000000/HZ);