git.oblomov.eu Git - linux-2.6/blob - drivers/staging/rt2870/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #ifndef RT30xx
  42 #include "firmware.h"
  43 #endif
  44 #ifdef RT30xx
  45 #include "../../rt3070/firmware.h"
  46 #endif
  47
  48 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  49 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  50                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  51                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  52                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  53                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  54                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  55                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  56                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  57
  58 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  59
  60 const unsigned short ccitt_16Table[] = {
  61         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  62         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  63         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  64         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  65         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  66         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  67         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  68         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  69         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  70         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  71         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  72         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  73         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  74         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  75         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  76         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  77         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  78         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  79         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  80         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  81         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  82         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  83         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  84         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  85         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  86         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  87         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  88         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  89         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  90         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  91         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  92         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  93 };
  94 #define ByteCRC16(v, crc) \
  95         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
  96
  97 unsigned char BitReverse(unsigned char x)
  98 {
  99         int i;
 100         unsigned char Temp=0;
 101         for(i=0; ; i++)
 102         {
 103                 if(x & 0x80)    Temp |= 0x80;
 104                 if(i==7)                break;
 105                 x       <<= 1;
 106                 Temp >>= 1;
 107         }
 108         return Temp;
 109 }
 110
 111 //
 112 // BBP register initialization set
 113 //
 114 REG_PAIR   BBPRegTable[] = {
 115         {BBP_R65,               0x2C},          // fix rssi issue
 116         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
 117         {BBP_R69,               0x12},
 118         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 119         {BBP_R73,               0x10},
 120         {BBP_R81,               0x37},
 121         {BBP_R82,               0x62},
 122         {BBP_R83,               0x6A},
 123         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 124         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 125         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 126         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 127         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 128         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 129 };
 130 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 131
 132 //
 133 // RF register initialization set
 134 //
 135 #ifdef RT2870
 136 REG_PAIR   RT30xx_RFRegTable[] = {
 137         {RF_R04,          0x40},
 138         {RF_R05,          0x03},
 139         {RF_R06,          0x02},
 140         {RF_R07,          0x70},
 141         {RF_R09,          0x0F},
 142 #ifndef RT30xx
 143         {RF_R10,          0x71},
 144 #endif
 145 #ifdef RT30xx
 146         {RF_R10,          0x41},
 147 #endif
 148         {RF_R11,          0x21},
 149         {RF_R12,          0x7B},
 150         {RF_R14,          0x90},
 151         {RF_R15,          0x58},
 152         {RF_R16,          0xB3},
 153         {RF_R17,          0x92},
 154         {RF_R18,          0x2C},
 155         {RF_R19,          0x02},
 156         {RF_R20,          0xBA},
 157         {RF_R21,          0xDB},
 158         {RF_R24,          0x16},
 159         {RF_R25,          0x01},
 160 #ifndef RT30xx
 161         {RF_R27,          0x03},
 162 #endif
 163         {RF_R29,          0x1F},
 164 };
 165 #define NUM_RF_REG_PARMS        (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
 166 #endif // RT2870 //
 167
 168 //
 169 // ASIC register initialization sets
 170 //
 171
 172 RTMP_REG_PAIR   MACRegTable[] = {
 173 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 174         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 175         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 176 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 177         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 178         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 179 #else
 180     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 181 #endif // HW_BEACON_OFFSET //
 182
 183         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 184         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 185         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 186         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 187         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 188         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 189         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 190         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 191         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 192         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 193         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 194         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 195         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 196         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 197         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 198         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 199 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
 200 #ifdef RT2870
 201         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 202         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 203         {WPDMA_GLO_CFG,                 0x00000030},
 204 #endif // RT2870 //
 205         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 206         {GF40_PROT_CFG,                 0x03F44084},
 207         {MM20_PROT_CFG,                 0x01744004},
 208         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 209         {TX_RTS_CFG,                    0x00092b20},
 210         {EXP_ACK_TIME,                  0x002400ca},    // default value
 211         {TXOP_HLDR_ET,                  0x00000002},
 212
 213         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 214                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 215                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 216                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 217         {XIFS_TIME_CFG,                 0x33a41010},
 218         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 219 };
 220
 221 RTMP_REG_PAIR   STAMACRegTable[] =      {
 222         {WMM_AIFSN_CFG,         0x00002273},
 223         {WMM_CWMIN_CFG, 0x00002344},
 224         {WMM_CWMAX_CFG, 0x000034aa},
 225 };
 226
 227 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 228 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 229
 230 #ifdef RT2870
 231 //
 232 // RT2870 Firmware Spec only used 1 oct for version expression
 233 //
 234 #define FIRMWARE_MINOR_VERSION  7
 235
 236 #endif // RT2870 //
 237
 238 // New 8k byte firmware size for RT3071/RT3072
 239 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 240 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 241 #define FIRMWARE_MAJOR_VERSION  0
 242
 243 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 244 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 245
 246
 247
 248 /*
 249         ========================================================================
 250
 251         Routine Description:
 252                 Allocate RTMP_ADAPTER data block and do some initialization
 253
 254         Arguments:
 255                 Adapter         Pointer to our adapter
 256
 257         Return Value:
 258                 NDIS_STATUS_SUCCESS
 259                 NDIS_STATUS_FAILURE
 260
 261         IRQL = PASSIVE_LEVEL
 262
 263         Note:
 264
 265         ========================================================================
 266 */
 267 NDIS_STATUS     RTMPAllocAdapterBlock(
 268         IN  PVOID       handle,
 269         OUT     PRTMP_ADAPTER   *ppAdapter)
 270 {
 271         PRTMP_ADAPTER   pAd;
 272         NDIS_STATUS             Status;
 273         INT                     index;
 274         UCHAR                   *pBeaconBuf = NULL;
 275
 276         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 277
 278         *ppAdapter = NULL;
 279
 280         do
 281         {
 282                 // Allocate RTMP_ADAPTER memory block
 283                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 284                 if (pBeaconBuf == NULL)
 285                 {
 286                         Status = NDIS_STATUS_FAILURE;
 287                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 288                         break;
 289                 }
 290
 291                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 292                 if (Status != NDIS_STATUS_SUCCESS)
 293                 {
 294                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 295                         break;
 296                 }
 297                 pAd->BeaconBuf = pBeaconBuf;
 298                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 299
 300
 301                 // Init spin locks
 302                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 303
 304                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 305                 {
 306                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 307                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 308                         pAd->DeQueueRunning[index] = FALSE;
 309                 }
 310
 311                 NdisAllocateSpinLock(&pAd->irq_lock);
 312
 313         } while (FALSE);
 314
 315         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 316                 kfree(pBeaconBuf);
 317
 318         *ppAdapter = pAd;
 319
 320         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 321         return Status;
 322 }
 323
 324 /*
 325         ========================================================================
 326
 327         Routine Description:
 328                 Read initial Tx power per MCS and BW from EEPROM
 329
 330         Arguments:
 331                 Adapter                                         Pointer to our adapter
 332
 333         Return Value:
 334                 None
 335
 336         IRQL = PASSIVE_LEVEL
 337
 338         Note:
 339
 340         ========================================================================
 341 */
 342 VOID    RTMPReadTxPwrPerRate(
 343         IN      PRTMP_ADAPTER   pAd)
 344 {
 345         ULONG           data, Adata, Gdata;
 346         USHORT          i, value, value2;
 347         INT                     Apwrdelta, Gpwrdelta;
 348         UCHAR           t1,t2,t3,t4;
 349         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 350
 351         //
 352         // Get power delta for 20MHz and 40MHz.
 353         //
 354         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 355         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 356         Apwrdelta = 0;
 357         Gpwrdelta = 0;
 358
 359         if ((value2 & 0xff) != 0xff)
 360         {
 361                 if ((value2 & 0x80))
 362                         Gpwrdelta = (value2&0xf);
 363
 364                 if ((value2 & 0x40))
 365                         bGpwrdeltaMinus = FALSE;
 366                 else
 367                         bGpwrdeltaMinus = TRUE;
 368         }
 369         if ((value2 & 0xff00) != 0xff00)
 370         {
 371                 if ((value2 & 0x8000))
 372                         Apwrdelta = ((value2&0xf00)>>8);
 373
 374                 if ((value2 & 0x4000))
 375                         bApwrdeltaMinus = FALSE;
 376                 else
 377                         bApwrdeltaMinus = TRUE;
 378         }
 379         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 380
 381         //
 382         // Get Txpower per MCS for 20MHz in 2.4G.
 383         //
 384         for (i=0; i<5; i++)
 385         {
 386                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 387                 data = value;
 388                 if (bApwrdeltaMinus == FALSE)
 389                 {
 390                         t1 = (value&0xf)+(Apwrdelta);
 391                         if (t1 > 0xf)
 392                                 t1 = 0xf;
 393                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 394                         if (t2 > 0xf)
 395                                 t2 = 0xf;
 396                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 397                         if (t3 > 0xf)
 398                                 t3 = 0xf;
 399                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 400                         if (t4 > 0xf)
 401                                 t4 = 0xf;
 402                 }
 403                 else
 404                 {
 405                         if ((value&0xf) > Apwrdelta)
 406                                 t1 = (value&0xf)-(Apwrdelta);
 407                         else
 408                                 t1 = 0;
 409                         if (((value&0xf0)>>4) > Apwrdelta)
 410                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 411                         else
 412                                 t2 = 0;
 413                         if (((value&0xf00)>>8) > Apwrdelta)
 414                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 415                         else
 416                                 t3 = 0;
 417                         if (((value&0xf000)>>12) > Apwrdelta)
 418                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 419                         else
 420                                 t4 = 0;
 421                 }
 422                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 423                 if (bGpwrdeltaMinus == FALSE)
 424                 {
 425                         t1 = (value&0xf)+(Gpwrdelta);
 426                         if (t1 > 0xf)
 427                                 t1 = 0xf;
 428                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 429                         if (t2 > 0xf)
 430                                 t2 = 0xf;
 431                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 432                         if (t3 > 0xf)
 433                                 t3 = 0xf;
 434                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 435                         if (t4 > 0xf)
 436                                 t4 = 0xf;
 437                 }
 438                 else
 439                 {
 440                         if ((value&0xf) > Gpwrdelta)
 441                                 t1 = (value&0xf)-(Gpwrdelta);
 442                         else
 443                                 t1 = 0;
 444                         if (((value&0xf0)>>4) > Gpwrdelta)
 445                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 446                         else
 447                                 t2 = 0;
 448                         if (((value&0xf00)>>8) > Gpwrdelta)
 449                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 450                         else
 451                                 t3 = 0;
 452                         if (((value&0xf000)>>12) > Gpwrdelta)
 453                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 454                         else
 455                                 t4 = 0;
 456                 }
 457                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 458
 459                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 460                 if (bApwrdeltaMinus == FALSE)
 461                 {
 462                         t1 = (value&0xf)+(Apwrdelta);
 463                         if (t1 > 0xf)
 464                                 t1 = 0xf;
 465                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 466                         if (t2 > 0xf)
 467                                 t2 = 0xf;
 468                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 469                         if (t3 > 0xf)
 470                                 t3 = 0xf;
 471                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 472                         if (t4 > 0xf)
 473                                 t4 = 0xf;
 474                 }
 475                 else
 476                 {
 477                         if ((value&0xf) > Apwrdelta)
 478                                 t1 = (value&0xf)-(Apwrdelta);
 479                         else
 480                                 t1 = 0;
 481                         if (((value&0xf0)>>4) > Apwrdelta)
 482                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 483                         else
 484                                 t2 = 0;
 485                         if (((value&0xf00)>>8) > Apwrdelta)
 486                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 487                         else
 488                                 t3 = 0;
 489                         if (((value&0xf000)>>12) > Apwrdelta)
 490                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 491                         else
 492                                 t4 = 0;
 493                 }
 494                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 495                 if (bGpwrdeltaMinus == FALSE)
 496                 {
 497                         t1 = (value&0xf)+(Gpwrdelta);
 498                         if (t1 > 0xf)
 499                                 t1 = 0xf;
 500                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 501                         if (t2 > 0xf)
 502                                 t2 = 0xf;
 503                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 504                         if (t3 > 0xf)
 505                                 t3 = 0xf;
 506                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 507                         if (t4 > 0xf)
 508                                 t4 = 0xf;
 509                 }
 510                 else
 511                 {
 512                         if ((value&0xf) > Gpwrdelta)
 513                                 t1 = (value&0xf)-(Gpwrdelta);
 514                         else
 515                                 t1 = 0;
 516                         if (((value&0xf0)>>4) > Gpwrdelta)
 517                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 518                         else
 519                                 t2 = 0;
 520                         if (((value&0xf00)>>8) > Gpwrdelta)
 521                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 522                         else
 523                                 t3 = 0;
 524                         if (((value&0xf000)>>12) > Gpwrdelta)
 525                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 526                         else
 527                                 t4 = 0;
 528                 }
 529                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 530                 data |= (value<<16);
 531
 532                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 533                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 534
 535                 if (data != 0xffffffff)
 536                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 537                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 538         }
 539
 540         //
 541         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 542         //
 543         bValid = TRUE;
 544         for (i=0; i<6; i++)
 545         {
 546                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 547                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 548                 {
 549                         bValid = FALSE;
 550                         break;
 551                 }
 552         }
 553
 554         //
 555         // Get Txpower per MCS for 40MHz in 2.4G.
 556         //
 557         if (bValid)
 558         {
 559                 for (i=0; i<4; i++)
 560                 {
 561                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 562                         if (bGpwrdeltaMinus == FALSE)
 563                         {
 564                                 t1 = (value&0xf)+(Gpwrdelta);
 565                                 if (t1 > 0xf)
 566                                         t1 = 0xf;
 567                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 568                                 if (t2 > 0xf)
 569                                         t2 = 0xf;
 570                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 571                                 if (t3 > 0xf)
 572                                         t3 = 0xf;
 573                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 574                                 if (t4 > 0xf)
 575                                         t4 = 0xf;
 576                         }
 577                         else
 578                         {
 579                                 if ((value&0xf) > Gpwrdelta)
 580                                         t1 = (value&0xf)-(Gpwrdelta);
 581                                 else
 582                                         t1 = 0;
 583                                 if (((value&0xf0)>>4) > Gpwrdelta)
 584                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 585                                 else
 586                                         t2 = 0;
 587                                 if (((value&0xf00)>>8) > Gpwrdelta)
 588                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 589                                 else
 590                                         t3 = 0;
 591                                 if (((value&0xf000)>>12) > Gpwrdelta)
 592                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 593                                 else
 594                                         t4 = 0;
 595                         }
 596                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 597
 598                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 599                         if (bGpwrdeltaMinus == FALSE)
 600                         {
 601                                 t1 = (value&0xf)+(Gpwrdelta);
 602                                 if (t1 > 0xf)
 603                                         t1 = 0xf;
 604                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 605                                 if (t2 > 0xf)
 606                                         t2 = 0xf;
 607                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 608                                 if (t3 > 0xf)
 609                                         t3 = 0xf;
 610                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 611                                 if (t4 > 0xf)
 612                                         t4 = 0xf;
 613                         }
 614                         else
 615                         {
 616                                 if ((value&0xf) > Gpwrdelta)
 617                                         t1 = (value&0xf)-(Gpwrdelta);
 618                                 else
 619                                         t1 = 0;
 620                                 if (((value&0xf0)>>4) > Gpwrdelta)
 621                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 622                                 else
 623                                         t2 = 0;
 624                                 if (((value&0xf00)>>8) > Gpwrdelta)
 625                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 626                                 else
 627                                         t3 = 0;
 628                                 if (((value&0xf000)>>12) > Gpwrdelta)
 629                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 630                                 else
 631                                         t4 = 0;
 632                         }
 633                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 634
 635                         if (i == 0)
 636                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 637                         else
 638                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 639
 640                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 641                 }
 642         }
 643
 644         //
 645         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 646         //
 647         bValid = TRUE;
 648         for (i=0; i<8; i++)
 649         {
 650                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 651                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 652                 {
 653                         bValid = FALSE;
 654                         break;
 655                 }
 656         }
 657
 658         //
 659         // Get Txpower per MCS for 20MHz in 5G.
 660         //
 661         if (bValid)
 662         {
 663                 for (i=0; i<5; i++)
 664                 {
 665                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 666                         if (bApwrdeltaMinus == FALSE)
 667                         {
 668                                 t1 = (value&0xf)+(Apwrdelta);
 669                                 if (t1 > 0xf)
 670                                         t1 = 0xf;
 671                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 672                                 if (t2 > 0xf)
 673                                         t2 = 0xf;
 674                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 675                                 if (t3 > 0xf)
 676                                         t3 = 0xf;
 677                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 678                                 if (t4 > 0xf)
 679                                         t4 = 0xf;
 680                         }
 681                         else
 682                         {
 683                                 if ((value&0xf) > Apwrdelta)
 684                                         t1 = (value&0xf)-(Apwrdelta);
 685                                 else
 686                                         t1 = 0;
 687                                 if (((value&0xf0)>>4) > Apwrdelta)
 688                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 689                                 else
 690                                         t2 = 0;
 691                                 if (((value&0xf00)>>8) > Apwrdelta)
 692                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 693                                 else
 694                                         t3 = 0;
 695                                 if (((value&0xf000)>>12) > Apwrdelta)
 696                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 697                                 else
 698                                         t4 = 0;
 699                         }
 700                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 701
 702                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 703                         if (bApwrdeltaMinus == FALSE)
 704                         {
 705                                 t1 = (value&0xf)+(Apwrdelta);
 706                                 if (t1 > 0xf)
 707                                         t1 = 0xf;
 708                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 709                                 if (t2 > 0xf)
 710                                         t2 = 0xf;
 711                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 712                                 if (t3 > 0xf)
 713                                         t3 = 0xf;
 714                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 715                                 if (t4 > 0xf)
 716                                         t4 = 0xf;
 717                         }
 718                         else
 719                         {
 720                                 if ((value&0xf) > Apwrdelta)
 721                                         t1 = (value&0xf)-(Apwrdelta);
 722                                 else
 723                                         t1 = 0;
 724                                 if (((value&0xf0)>>4) > Apwrdelta)
 725                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 726                                 else
 727                                         t2 = 0;
 728                                 if (((value&0xf00)>>8) > Apwrdelta)
 729                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 730                                 else
 731                                         t3 = 0;
 732                                 if (((value&0xf000)>>12) > Apwrdelta)
 733                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 734                                 else
 735                                         t4 = 0;
 736                         }
 737                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 738
 739                         if (i == 0)
 740                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 741                         else
 742                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 743
 744                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 745                 }
 746         }
 747
 748         //
 749         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 750         //
 751         bValid = TRUE;
 752         for (i=0; i<6; i++)
 753         {
 754                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 755                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 756                 {
 757                         bValid = FALSE;
 758                         break;
 759                 }
 760         }
 761
 762         //
 763         // Get Txpower per MCS for 40MHz in 5G.
 764         //
 765         if (bValid)
 766         {
 767                 for (i=0; i<4; i++)
 768                 {
 769                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 770                         if (bApwrdeltaMinus == FALSE)
 771                         {
 772                                 t1 = (value&0xf)+(Apwrdelta);
 773                                 if (t1 > 0xf)
 774                                         t1 = 0xf;
 775                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 776                                 if (t2 > 0xf)
 777                                         t2 = 0xf;
 778                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 779                                 if (t3 > 0xf)
 780                                         t3 = 0xf;
 781                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 782                                 if (t4 > 0xf)
 783                                         t4 = 0xf;
 784                         }
 785                         else
 786                         {
 787                                 if ((value&0xf) > Apwrdelta)
 788                                         t1 = (value&0xf)-(Apwrdelta);
 789                                 else
 790                                         t1 = 0;
 791                                 if (((value&0xf0)>>4) > Apwrdelta)
 792                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 793                                 else
 794                                         t2 = 0;
 795                                 if (((value&0xf00)>>8) > Apwrdelta)
 796                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 797                                 else
 798                                         t3 = 0;
 799                                 if (((value&0xf000)>>12) > Apwrdelta)
 800                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 801                                 else
 802                                         t4 = 0;
 803                         }
 804                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 805
 806                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 807                         if (bApwrdeltaMinus == FALSE)
 808                         {
 809                                 t1 = (value&0xf)+(Apwrdelta);
 810                                 if (t1 > 0xf)
 811                                         t1 = 0xf;
 812                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 813                                 if (t2 > 0xf)
 814                                         t2 = 0xf;
 815                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 816                                 if (t3 > 0xf)
 817                                         t3 = 0xf;
 818                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 819                                 if (t4 > 0xf)
 820                                         t4 = 0xf;
 821                         }
 822                         else
 823                         {
 824                                 if ((value&0xf) > Apwrdelta)
 825                                         t1 = (value&0xf)-(Apwrdelta);
 826                                 else
 827                                         t1 = 0;
 828                                 if (((value&0xf0)>>4) > Apwrdelta)
 829                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 830                                 else
 831                                         t2 = 0;
 832                                 if (((value&0xf00)>>8) > Apwrdelta)
 833                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 834                                 else
 835                                         t3 = 0;
 836                                 if (((value&0xf000)>>12) > Apwrdelta)
 837                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 838                                 else
 839                                         t4 = 0;
 840                         }
 841                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 842
 843                         if (i == 0)
 844                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 845                         else
 846                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 847
 848                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 849                 }
 850         }
 851 }
 852
 853
 854 /*
 855         ========================================================================
 856
 857         Routine Description:
 858                 Read initial channel power parameters from EEPROM
 859
 860         Arguments:
 861                 Adapter                                         Pointer to our adapter
 862
 863         Return Value:
 864                 None
 865
 866         IRQL = PASSIVE_LEVEL
 867
 868         Note:
 869
 870         ========================================================================
 871 */
 872 VOID    RTMPReadChannelPwr(
 873         IN      PRTMP_ADAPTER   pAd)
 874 {
 875         UCHAR                           i, choffset;
 876         EEPROM_TX_PWR_STRUC         Power;
 877         EEPROM_TX_PWR_STRUC         Power2;
 878
 879         // Read Tx power value for all channels
 880         // Value from 1 - 0x7f. Default value is 24.
 881         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 882         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 883
 884         // 0. 11b/g, ch1 - ch 14
 885         for (i = 0; i < 7; i++)
 886         {
 887                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 888                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 889                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 890                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 891
 892                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 893                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 894                 else
 895                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 896
 897                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 898                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 899                 else
 900                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 901
 902                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 903                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 904                 else
 905                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 906
 907                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 908                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 909                 else
 910                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 911         }
 912
 913         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 914         // 1.1 Fill up channel
 915         choffset = 14;
 916         for (i = 0; i < 4; i++)
 917         {
 918                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 919                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 920                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 921
 922                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 923                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 924                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 925
 926                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 927                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 928                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 929         }
 930
 931         // 1.2 Fill up power
 932         for (i = 0; i < 6; i++)
 933         {
 934                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 935                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 936
 937                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 938                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 939
 940                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 941                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 942
 943                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 944                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 945
 946                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 947                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 948         }
 949
 950         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 951         // 2.1 Fill up channel
 952         choffset = 14 + 12;
 953         for (i = 0; i < 5; i++)
 954         {
 955                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 956                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 957                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 958
 959                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 960                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 961                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 962
 963                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 964                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 965                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 966         }
 967         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 968         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 969         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 970
 971         // 2.2 Fill up power
 972         for (i = 0; i < 8; i++)
 973         {
 974                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 975                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 976
 977                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 978                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 979
 980                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 981                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 982
 983                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 984                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 985
 986                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 987                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 988         }
 989
 990         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
 991         // 3.1 Fill up channel
 992         choffset = 14 + 12 + 16;
 993         for (i = 0; i < 2; i++)
 994         {
 995                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 996                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 997                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 998
 999                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
1000                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
1001                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
1002
1003                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
1004                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
1005                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
1006         }
1007         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
1008         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
1009         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
1010
1011         // 3.2 Fill up power
1012         for (i = 0; i < 4; i++)
1013         {
1014                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1015                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1016
1017                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1018                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1019
1020                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1021                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1022
1023                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1024                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1025
1026                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1027                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1028         }
1029
1030         // 4. Print and Debug
1031         choffset = 14 + 12 + 16 + 7;
1032
1033 }
1034
1035 /*
1036         ========================================================================
1037
1038         Routine Description:
1039                 Read the following from the registry
1040                 1. All the parameters
1041                 2. NetworkAddres
1042
1043         Arguments:
1044                 Adapter                                         Pointer to our adapter
1045                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1046
1047         Return Value:
1048                 NDIS_STATUS_SUCCESS
1049                 NDIS_STATUS_FAILURE
1050                 NDIS_STATUS_RESOURCES
1051
1052         IRQL = PASSIVE_LEVEL
1053
1054         Note:
1055
1056         ========================================================================
1057 */
1058 NDIS_STATUS     NICReadRegParameters(
1059         IN      PRTMP_ADAPTER           pAd,
1060         IN      NDIS_HANDLE                     WrapperConfigurationContext
1061         )
1062 {
1063         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1064         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1065         return Status;
1066 }
1067
1068
1069 #ifdef RT2870
1070 /*
1071         ========================================================================
1072
1073         Routine Description:
1074                 For RF filter calibration purpose
1075
1076         Arguments:
1077                 pAd                          Pointer to our adapter
1078
1079         Return Value:
1080                 None
1081
1082         IRQL = PASSIVE_LEVEL
1083
1084         ========================================================================
1085 */
1086 #ifndef RT30xx
1087 VOID RTUSBFilterCalibration(
1088         IN PRTMP_ADAPTER pAd)
1089 {
1090         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue;
1091         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1092         UCHAR   RF_R24_Value = 0;
1093
1094         // Give bbp filter initial value
1095         pAd->Mlme.CaliBW20RfR24 = 0x16;
1096         pAd->Mlme.CaliBW40RfR24 = 0x36;  //Bit[5] must be 1 for BW 40
1097
1098         do
1099         {
1100                 if (loop == 1)  //BandWidth = 40 MHz
1101                 {
1102                         // Write 0x27 to RF_R24 to program filter
1103                         RF_R24_Value = 0x27;
1104                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1105                         FilterTarget = 0x19;
1106
1107                         // when calibrate BW40, BBP mask must set to BW40.
1108                         RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1109                         BBPValue&= (~0x18);
1110                         BBPValue|= (0x10);
1111                         RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1112                 }
1113                 else                    //BandWidth = 20 MHz
1114                 {
1115                         // Write 0x07 to RF_R24 to program filter
1116                         RF_R24_Value = 0x07;
1117                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1118                         FilterTarget = 0x16;
1119                 }
1120
1121                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1122                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1123                 value |= 0x01;
1124                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1125
1126                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1127                 RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1128
1129                 do
1130                 {
1131                         // Write 0x90 to BBP_R25 to transmit test tone
1132                         RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1133
1134                         RTMPusecDelay(1000);
1135                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1136                         RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1137                         R55x = value & 0xFF;
1138
1139                 } while ((ReTry++ < 100) && (R55x == 0));
1140
1141                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1142                 RTUSBWriteBBPRegister(pAd, BBP_R24, 0x06);
1143
1144                 while(TRUE)
1145                 {
1146                         // Write 0x90 to BBP_R25 to transmit test tone
1147                         RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1148
1149                         //We need to wait for calibration
1150                         RTMPusecDelay(1000);
1151                         RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1152                         value &= 0xFF;
1153                         if ((R55x - value) < FilterTarget)
1154                         {
1155                                 RF_R24_Value ++;
1156                         }
1157                         else if ((R55x - value) == FilterTarget)
1158                         {
1159                                 RF_R24_Value ++;
1160                                 count ++;
1161                         }
1162                         else
1163                         {
1164                                 break;
1165                         }
1166
1167                         // prevent infinite loop cause driver hang.
1168                         if (loopcnt++ > 100)
1169                         {
1170                                 DBGPRINT(RT_DEBUG_ERROR, ("RTUSBFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1171                                 break;
1172                         }
1173
1174                         // Write RF_R24 to program filter
1175                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1176                 }
1177
1178                 if (count > 0)
1179                 {
1180                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1181                 }
1182
1183                 // Store for future usage
1184                 if (loopcnt < 100)
1185                 {
1186                         if (loop++ == 0)
1187                         {
1188                                 //BandWidth = 20 MHz
1189                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1190                         }
1191                         else
1192                         {
1193                                 //BandWidth = 40 MHz
1194                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1195                                 break;
1196                         }
1197                 }
1198                 else
1199                         break;
1200
1201                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1202
1203                 // reset count
1204                 count = 0;
1205         } while(TRUE);
1206
1207         //
1208         // Set back to initial state
1209         //
1210         RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1211
1212         RT30xxReadRFRegister(pAd, RF_R22, &value);
1213         value &= ~(0x01);
1214         RT30xxWriteRFRegister(pAd, RF_R22, value);
1215
1216         // set BBP back to BW20
1217         RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1218         BBPValue&= (~0x18);
1219         RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1220
1221         DBGPRINT(RT_DEBUG_TRACE, ("RTUSBFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1222 }
1223 #endif /* RT30xx */
1224 #ifdef RT30xx
1225 VOID RTMPFilterCalibration(
1226         IN PRTMP_ADAPTER pAd)
1227 {
1228         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1229         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1230         UCHAR   RF_R24_Value = 0;
1231
1232         // Give bbp filter initial value
1233         pAd->Mlme.CaliBW20RfR24 = 0x1F;
1234         pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1235
1236         do
1237         {
1238                 if (loop == 1)  //BandWidth = 40 MHz
1239                 {
1240                         // Write 0x27 to RF_R24 to program filter
1241                         RF_R24_Value = 0x27;
1242                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1243                         if (IS_RT3090(pAd))
1244                                 FilterTarget = 0x15;
1245                         else
1246                                 FilterTarget = 0x19;
1247
1248                         // when calibrate BW40, BBP mask must set to BW40.
1249                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1250                         BBPValue&= (~0x18);
1251                         BBPValue|= (0x10);
1252                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1253
1254                         // set to BW40
1255                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1256                         value |= 0x20;
1257                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1258                 }
1259                 else                    //BandWidth = 20 MHz
1260                 {
1261                         // Write 0x07 to RF_R24 to program filter
1262                         RF_R24_Value = 0x07;
1263                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1264                         if (IS_RT3090(pAd))
1265                                 FilterTarget = 0x13;
1266                         else
1267                                 FilterTarget = 0x16;
1268
1269                         // set to BW20
1270                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1271                         value &= (~0x20);
1272                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1273                 }
1274
1275                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1276                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1277                 value |= 0x01;
1278                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1279
1280                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1281                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1282
1283                 do
1284                 {
1285                         // Write 0x90 to BBP_R25 to transmit test tone
1286                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1287
1288                         RTMPusecDelay(1000);
1289                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1290                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1291                         R55x = value & 0xFF;
1292
1293                 } while ((ReTry++ < 100) && (R55x == 0));
1294
1295                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1296                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1297
1298                 while(TRUE)
1299                 {
1300                         // Write 0x90 to BBP_R25 to transmit test tone
1301                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1302
1303                         //We need to wait for calibration
1304                         RTMPusecDelay(1000);
1305                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1306                         value &= 0xFF;
1307                         if ((R55x - value) < FilterTarget)
1308                         {
1309                                 RF_R24_Value ++;
1310                         }
1311                         else if ((R55x - value) == FilterTarget)
1312                         {
1313                                 RF_R24_Value ++;
1314                                 count ++;
1315                         }
1316                         else
1317                         {
1318                                 break;
1319                         }
1320
1321                         // prevent infinite loop cause driver hang.
1322                         if (loopcnt++ > 100)
1323                         {
1324                                 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1325                                 break;
1326                         }
1327
1328                         // Write RF_R24 to program filter
1329                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1330                 }
1331
1332                 if (count > 0)
1333                 {
1334                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1335                 }
1336
1337                 // Store for future usage
1338                 if (loopcnt < 100)
1339                 {
1340                         if (loop++ == 0)
1341                         {
1342                                 //BandWidth = 20 MHz
1343                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1344                         }
1345                         else
1346                         {
1347                                 //BandWidth = 40 MHz
1348                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1349                                 break;
1350                         }
1351                 }
1352                 else
1353                         break;
1354
1355                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1356
1357                 // reset count
1358                 count = 0;
1359         } while(TRUE);
1360
1361         //
1362         // Set back to initial state
1363         //
1364         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1365
1366         RT30xxReadRFRegister(pAd, RF_R22, &value);
1367         value &= ~(0x01);
1368         RT30xxWriteRFRegister(pAd, RF_R22, value);
1369
1370         // set BBP back to BW20
1371         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1372         BBPValue&= (~0x18);
1373         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1374
1375         DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1376 }
1377 #endif /* RT30xx */
1378
1379 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1380 {
1381         INT i;
1382         // Driver must read EEPROM to get RfIcType before initial RF registers
1383         // Initialize RF register to default value
1384 #ifndef RT30xx
1385         if (IS_RT3070(pAd) && ((pAd->RfIcType == RFIC_3020) ||(pAd->RfIcType == RFIC_2020)))
1386         {
1387                 // Init RF calibration
1388                 // Driver should toggle RF R30 bit7 before init RF registers
1389                 ULONG RfReg = 0;
1390                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1391                 RfReg |= 0x80;
1392                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1393                 RTMPusecDelay(1000);
1394                 RfReg &= 0x7F;
1395                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1396
1397                 // Initialize RF register to default value
1398                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1399                 {
1400                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1401                 }
1402
1403                 //For RF filter Calibration
1404                 RTUSBFilterCalibration(pAd);
1405         }
1406 #endif
1407 #ifdef RT30xx
1408         if (IS_RT3070(pAd) || IS_RT3071(pAd))
1409         {
1410                 // Init RF calibration
1411                 // Driver should toggle RF R30 bit7 before init RF registers
1412                 UINT32 RfReg = 0;
1413                 UINT32 data;
1414
1415                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1416                 RfReg |= 0x80;
1417                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1418                 RTMPusecDelay(1000);
1419                 RfReg &= 0x7F;
1420                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1421
1422                 // Initialize RF register to default value
1423                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1424                 {
1425                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1426                 }
1427
1428                 // add by johnli
1429                 if (IS_RT3070(pAd))
1430                 {
1431                         //  Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1432                         RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1433                         data = ((data & 0xF0FFFFFF) | 0x0D000000);
1434                         RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1435                 }
1436                 else if (IS_RT3071(pAd))
1437                 {
1438                         // Driver should set RF R6 bit6 on before init RF registers
1439                         RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1440                         RfReg |= 0x40;
1441                         RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1442
1443                         // init R31
1444                         RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1445
1446                         // RT3071 version E has fixed this issue
1447                         if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1448                         {
1449                                 // patch tx EVM issue temporarily
1450                                 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1451                                 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1452                                 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1453                         }
1454                         else
1455                         {
1456                                 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1457                                 data = ((data & 0xE0FFFFFF) | 0x01000000);
1458                                 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1459                         }
1460
1461                         // patch LNA_PE_G1 failed issue
1462                         RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1463                         data &= ~(0x20);
1464                         RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1465                 }
1466
1467                 //For RF filter Calibration
1468                 RTMPFilterCalibration(pAd);
1469
1470                 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1471                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1472                         RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1473
1474                 // set led open drain enable
1475                 RTUSBReadMACRegister(pAd, OPT_14, &data);
1476                 data |= 0x01;
1477                 RTUSBWriteMACRegister(pAd, OPT_14, data);
1478
1479                 if (IS_RT3071(pAd))
1480                 {
1481                         // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1482                         RT30xxLoadRFNormalModeSetup(pAd);
1483                 }
1484         }
1485 #endif
1486 }
1487 #endif // RT2870 //
1488
1489
1490 /*
1491         ========================================================================
1492
1493         Routine Description:
1494                 Read initial parameters from EEPROM
1495
1496         Arguments:
1497                 Adapter                                         Pointer to our adapter
1498
1499         Return Value:
1500                 None
1501
1502         IRQL = PASSIVE_LEVEL
1503
1504         Note:
1505
1506         ========================================================================
1507 */
1508 VOID    NICReadEEPROMParameters(
1509         IN      PRTMP_ADAPTER   pAd,
1510         IN      PUCHAR                  mac_addr)
1511 {
1512         UINT32                  data = 0;
1513         USHORT                  i, value, value2;
1514         UCHAR                   TmpPhy;
1515         EEPROM_TX_PWR_STRUC         Power;
1516         EEPROM_VERSION_STRUC    Version;
1517         EEPROM_ANTENNA_STRUC    Antenna;
1518         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1519
1520         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1521
1522         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1523         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1524         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1525
1526         if((data & 0x30) == 0)
1527                 pAd->EEPROMAddressNum = 6;              // 93C46
1528         else if((data & 0x30) == 0x10)
1529                 pAd->EEPROMAddressNum = 8;     // 93C66
1530         else
1531                 pAd->EEPROMAddressNum = 8;     // 93C86
1532         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1533
1534         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1535         // MAC address registers according to E2PROM setting
1536         if (mac_addr == NULL ||
1537                 strlen(mac_addr) != 17 ||
1538                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1539                 mac_addr[11] != ':' || mac_addr[14] != ':')
1540         {
1541                 USHORT  Addr01,Addr23,Addr45 ;
1542
1543                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1544                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1545                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1546
1547                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1548                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1549                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1550                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1551                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1552                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1553
1554                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1555         }
1556         else
1557         {
1558                 INT             j;
1559                 PUCHAR  macptr;
1560
1561                 macptr = mac_addr;
1562
1563                 for (j=0; j<MAC_ADDR_LEN; j++)
1564                 {
1565                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1566                         macptr=macptr+3;
1567                 }
1568
1569                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1570         }
1571
1572
1573         {
1574                 //more conveninet to test mbssid, so ap's bssid &0xf1
1575                 if (pAd->PermanentAddress[0] == 0xff)
1576                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1577
1578                 //if (pAd->PermanentAddress[5] == 0xff)
1579                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1580
1581                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1582                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1583                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1584                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1585                 if (pAd->bLocalAdminMAC == FALSE)
1586                 {
1587                         MAC_DW0_STRUC csr2;
1588                         MAC_DW1_STRUC csr3;
1589                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1590                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1591                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1592                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1593                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1594                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1595                         csr3.word = 0;
1596                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1597                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1598                         csr3.field.U2MeMask = 0xff;
1599                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1600                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1601                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1602                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1603                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1604                 }
1605         }
1606
1607         // if not return early. cause fail at emulation.
1608         // Init the channel number for TX channel power
1609         RTMPReadChannelPwr(pAd);
1610
1611         // if E2PROM version mismatch with driver's expectation, then skip
1612         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1613         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1614         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1615         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1616
1617         if (Version.field.Version > VALID_EEPROM_VERSION)
1618         {
1619                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1620                 /*pAd->SystemErrorBitmap |= 0x00000001;
1621
1622                 // hard-code default value when no proper E2PROM installed
1623                 pAd->bAutoTxAgcA = FALSE;
1624                 pAd->bAutoTxAgcG = FALSE;
1625
1626                 // Default the channel power
1627                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1628                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1629
1630                 // Default the channel power
1631                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1632                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1633
1634                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1635                         pAd->EEPROMDefaultValue[i] = 0xffff;
1636                 return;  */
1637         }
1638
1639         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1640         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1641         pAd->EEPROMDefaultValue[0] = value;
1642
1643         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1644         pAd->EEPROMDefaultValue[1] = value;
1645
1646         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1647         pAd->EEPROMDefaultValue[2] = value;
1648
1649         for(i = 0; i < 8; i++)
1650         {
1651                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1652                 pAd->EEPROMDefaultValue[i+3] = value;
1653         }
1654
1655         // We have to parse NIC configuration 0 at here.
1656         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1657         // Therefore, we have to read TxAutoAgc control beforehand.
1658         // Read Tx AGC control bit
1659         Antenna.word = pAd->EEPROMDefaultValue[0];
1660         if (Antenna.word == 0xFFFF)
1661         {
1662 #ifdef RT30xx
1663                 if(IS_RT3090(pAd))
1664                 {
1665                         Antenna.word = 0;
1666                         Antenna.field.RfIcType = RFIC_3020;
1667                         Antenna.field.TxPath = 1;
1668                         Antenna.field.RxPath = 1;
1669                 }
1670                 else
1671                 {
1672 #endif // RT30xx //
1673                         Antenna.word = 0;
1674                         Antenna.field.RfIcType = RFIC_2820;
1675                         Antenna.field.TxPath = 1;
1676                         Antenna.field.RxPath = 2;
1677                         DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1678 #ifdef RT30xx
1679                 }
1680 #endif // RT30xx //
1681         }
1682
1683         // Choose the desired Tx&Rx stream.
1684         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1685                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1686
1687         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1688         {
1689                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1690
1691                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1692                         (pAd->CommonCfg.RxStream > 2))
1693                 {
1694                         // only 2 Rx streams for RT2860 series
1695                         pAd->CommonCfg.RxStream = 2;
1696                 }
1697         }
1698
1699         // 3*3
1700         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1701         // yet implement
1702         for(i=0; i<3; i++)
1703         {
1704         }
1705
1706         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1707
1708         {
1709 #ifndef RT30xx
1710                 NicConfig2.word = 0;
1711 #endif
1712                 if ((NicConfig2.word & 0x00ff) == 0xff)
1713                 {
1714                         NicConfig2.word &= 0xff00;
1715                 }
1716
1717                 if ((NicConfig2.word >> 8) == 0xff)
1718                 {
1719                         NicConfig2.word &= 0x00ff;
1720                 }
1721         }
1722
1723         if (NicConfig2.field.DynamicTxAgcControl == 1)
1724                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1725         else
1726                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1727
1728         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1729
1730         // Save the antenna for future use
1731         pAd->Antenna.word = Antenna.word;
1732
1733         //
1734         // Reset PhyMode if we don't support 802.11a
1735         // Only RFIC_2850 & RFIC_2750 support 802.11a
1736         //
1737         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1738         {
1739                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1740                         (pAd->CommonCfg.PhyMode == PHY_11A))
1741                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1742                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1743                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1744                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1745                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1746                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1747         }
1748
1749         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1750         // 0. 11b/g
1751         {
1752                 /* these are tempature reference value (0x00 ~ 0xFE)
1753                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1754                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1755                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1756                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1757                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1758                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1759                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1760                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1761                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1762                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1763                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1764                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1765                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1766                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1767                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1768                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1769                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1770                 pAd->TxAgcStepG = Power.field.Byte1;
1771                 pAd->TxAgcCompensateG = 0;
1772                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1773                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1774
1775                 // Disable TxAgc if the based value is not right
1776                 if (pAd->TssiRefG == 0xff)
1777                         pAd->bAutoTxAgcG = FALSE;
1778
1779                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1780                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1781                         pAd->TssiRefG,
1782                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1783                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1784         }
1785         // 1. 11a
1786         {
1787                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1788                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1789                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1790                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1791                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1792                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1793                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1794                 pAd->TssiRefA   = Power.field.Byte0;
1795                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1796                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1797                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1798                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1799                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1800                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1801                 pAd->TxAgcStepA = Power.field.Byte1;
1802                 pAd->TxAgcCompensateA = 0;
1803                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1804                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1805
1806                 // Disable TxAgc if the based value is not right
1807                 if (pAd->TssiRefA == 0xff)
1808                         pAd->bAutoTxAgcA = FALSE;
1809
1810                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1811                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1812                         pAd->TssiRefA,
1813                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1814                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1815         }
1816         pAd->BbpRssiToDbmDelta = 0x0;
1817
1818         // Read frequency offset setting for RF
1819         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1820         if ((value & 0x00FF) != 0x00FF)
1821                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1822         else
1823                 pAd->RfFreqOffset = 0;
1824         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1825
1826         //CountryRegion byte offset (38h)
1827         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1828         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1829
1830         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1831         {
1832                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1833                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1834                 TmpPhy = pAd->CommonCfg.PhyMode;
1835                 pAd->CommonCfg.PhyMode = 0xff;
1836                 RTMPSetPhyMode(pAd, TmpPhy);
1837                 SetCommonHT(pAd);
1838         }
1839
1840         //
1841         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1842         // The valid value are (-10 ~ 10)
1843         //
1844         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1845         pAd->BGRssiOffset0 = value & 0x00ff;
1846         pAd->BGRssiOffset1 = (value >> 8);
1847         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1848         pAd->BGRssiOffset2 = value & 0x00ff;
1849         pAd->ALNAGain1 = (value >> 8);
1850         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1851         pAd->BLNAGain = value & 0x00ff;
1852         pAd->ALNAGain0 = (value >> 8);
1853
1854         // Validate 11b/g RSSI_0 offset.
1855         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1856                 pAd->BGRssiOffset0 = 0;
1857
1858         // Validate 11b/g RSSI_1 offset.
1859         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1860                 pAd->BGRssiOffset1 = 0;
1861
1862         // Validate 11b/g RSSI_2 offset.
1863         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1864                 pAd->BGRssiOffset2 = 0;
1865
1866         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1867         pAd->ARssiOffset0 = value & 0x00ff;
1868         pAd->ARssiOffset1 = (value >> 8);
1869         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1870         pAd->ARssiOffset2 = value & 0x00ff;
1871         pAd->ALNAGain2 = (value >> 8);
1872
1873         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1874                 pAd->ALNAGain1 = pAd->ALNAGain0;
1875         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1876                 pAd->ALNAGain2 = pAd->ALNAGain0;
1877
1878         // Validate 11a RSSI_0 offset.
1879         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1880                 pAd->ARssiOffset0 = 0;
1881
1882         // Validate 11a RSSI_1 offset.
1883         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1884                 pAd->ARssiOffset1 = 0;
1885
1886         //Validate 11a RSSI_2 offset.
1887         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1888                 pAd->ARssiOffset2 = 0;
1889
1890         //
1891         // Get LED Setting.
1892         //
1893         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1894         pAd->LedCntl.word = (value&0xff00) >> 8;
1895         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1896         pAd->Led1 = value;
1897         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1898         pAd->Led2 = value;
1899         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1900         pAd->Led3 = value;
1901
1902         RTMPReadTxPwrPerRate(pAd);
1903
1904 #ifdef RT30xx
1905         if (IS_RT30xx(pAd))
1906         {
1907                 eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
1908                 pAd->EFuseTag = (value & 0xff);
1909         }
1910 #endif // RT30xx //
1911
1912         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1913 }
1914
1915 /*
1916         ========================================================================
1917
1918         Routine Description:
1919                 Set default value from EEPROM
1920
1921         Arguments:
1922                 Adapter                                         Pointer to our adapter
1923
1924         Return Value:
1925                 None
1926
1927         IRQL = PASSIVE_LEVEL
1928
1929         Note:
1930
1931         ========================================================================
1932 */
1933 VOID    NICInitAsicFromEEPROM(
1934         IN      PRTMP_ADAPTER   pAd)
1935 {
1936         UINT32                                  data = 0;
1937         UCHAR   BBPR1 = 0;
1938         USHORT                                  i;
1939         EEPROM_ANTENNA_STRUC    Antenna;
1940         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1941         UCHAR   BBPR3 = 0;
1942
1943         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1944         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1945         {
1946                 UCHAR BbpRegIdx, BbpValue;
1947
1948                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1949                 {
1950                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1951                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1952                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1953                 }
1954         }
1955
1956 #ifndef RT30xx
1957         Antenna.word = pAd->Antenna.word;
1958 #endif
1959 #ifdef RT30xx
1960         Antenna.word = pAd->EEPROMDefaultValue[0];
1961         if (Antenna.word == 0xFFFF)
1962         {
1963                 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1964                 BUG_ON(Antenna.word == 0xFFFF);
1965         }
1966 #endif
1967         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1968         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1969
1970 #ifdef RT30xx
1971         DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1972
1973         // Save the antenna for future use
1974         pAd->Antenna.word = Antenna.word;
1975 #endif
1976         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1977
1978 #ifdef RT30xx
1979         {
1980                 if ((NicConfig2.word & 0x00ff) == 0xff)
1981                 {
1982                         NicConfig2.word &= 0xff00;
1983                 }
1984
1985                 if ((NicConfig2.word >> 8) == 0xff)
1986                 {
1987                         NicConfig2.word &= 0x00ff;
1988                 }
1989         }
1990 #endif
1991         // Save the antenna for future use
1992         pAd->NicConfig2.word = NicConfig2.word;
1993
1994 #ifdef RT30xx
1995         // set default antenna as main
1996         if (pAd->RfIcType == RFIC_3020)
1997                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1998 #endif
1999         //
2000         // Send LED Setting to MCU.
2001         //
2002         if (pAd->LedCntl.word == 0xFF)
2003         {
2004                 pAd->LedCntl.word = 0x01;
2005                 pAd->Led1 = 0x5555;
2006                 pAd->Led2 = 0x2221;
2007
2008 #ifdef RT2870
2009                 pAd->Led3 = 0x5627;
2010 #endif // RT2870 //
2011         }
2012
2013         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
2014         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
2015         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
2016     pAd->LedIndicatorStregth = 0xFF;
2017     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
2018
2019         {
2020                 // Read Hardware controlled Radio state enable bit
2021                 if (NicConfig2.field.HardwareRadioControl == 1)
2022                 {
2023                         pAd->StaCfg.bHardwareRadio = TRUE;
2024
2025                         // Read GPIO pin2 as Hardware controlled radio state
2026                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
2027                         if ((data & 0x04) == 0)
2028                         {
2029                                 pAd->StaCfg.bHwRadio = FALSE;
2030                                 pAd->StaCfg.bRadio = FALSE;
2031                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2032                         }
2033                 }
2034                 else
2035                         pAd->StaCfg.bHardwareRadio = FALSE;
2036
2037                 if (pAd->StaCfg.bRadio == FALSE)
2038                 {
2039                         RTMPSetLED(pAd, LED_RADIO_OFF);
2040                 }
2041                 else
2042                 {
2043                         RTMPSetLED(pAd, LED_RADIO_ON);
2044                 }
2045         }
2046
2047         // Turn off patching for cardbus controller
2048         if (NicConfig2.field.CardbusAcceleration == 1)
2049         {
2050         }
2051
2052         if (NicConfig2.field.DynamicTxAgcControl == 1)
2053                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
2054         else
2055                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
2056         //
2057         // Since BBP has been progamed, to make sure BBP setting will be
2058         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
2059         //
2060         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2061
2062         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
2063         BBPR3 &= (~0x18);
2064         if(pAd->Antenna.field.RxPath == 3)
2065         {
2066                 BBPR3 |= (0x10);
2067         }
2068         else if(pAd->Antenna.field.RxPath == 2)
2069         {
2070                 BBPR3 |= (0x8);
2071         }
2072         else if(pAd->Antenna.field.RxPath == 1)
2073         {
2074                 BBPR3 |= (0x0);
2075         }
2076         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
2077
2078         {
2079                 // Handle the difference when 1T
2080                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
2081                 if(pAd->Antenna.field.TxPath == 1)
2082                 {
2083                 BBPR1 &= (~0x18);
2084                 }
2085                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
2086
2087                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
2088         }
2089
2090         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
2091         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
2092 }
2093
2094 /*
2095         ========================================================================
2096
2097         Routine Description:
2098                 Initialize NIC hardware
2099
2100         Arguments:
2101                 Adapter                                         Pointer to our adapter
2102
2103         Return Value:
2104                 None
2105
2106         IRQL = PASSIVE_LEVEL
2107
2108         Note:
2109
2110         ========================================================================
2111 */
2112 NDIS_STATUS     NICInitializeAdapter(
2113         IN      PRTMP_ADAPTER   pAd,
2114         IN   BOOLEAN    bHardReset)
2115 {
2116         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
2117         WPDMA_GLO_CFG_STRUC     GloCfg;
2118         ULONG   i =0, j=0;
2119         AC_TXOP_CSR0_STRUC      csr0;
2120
2121         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
2122
2123         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2124 retry:
2125         i = 0;
2126         do
2127         {
2128                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2129                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
2130                         break;
2131
2132                 RTMPusecDelay(1000);
2133                 i++;
2134         }while ( i<100);
2135         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
2136         GloCfg.word &= 0xff0;
2137         GloCfg.field.EnTXWriteBackDDONE =1;
2138         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2139
2140         // Record HW Beacon offset
2141         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
2142         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
2143         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
2144         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
2145         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
2146         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
2147         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
2148         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
2149
2150         //
2151         // write all shared Ring's base address into ASIC
2152         //
2153
2154         // asic simulation sequence put this ahead before loading firmware.
2155         // pbf hardware reset
2156
2157         // Initialze ASIC for TX & Rx operation
2158         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
2159         {
2160                 if (j++ == 0)
2161                 {
2162                         NICLoadFirmware(pAd);
2163                         goto retry;
2164                 }
2165                 return NDIS_STATUS_FAILURE;
2166         }
2167
2168
2169
2170
2171         // WMM parameter
2172         csr0.word = 0;
2173         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2174         if (pAd->CommonCfg.PhyMode == PHY_11B)
2175         {
2176                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
2177                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
2178         }
2179         else
2180         {
2181                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
2182                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
2183         }
2184         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2185
2186
2187
2188
2189         // reset action
2190         // Load firmware
2191         //  Status = NICLoadFirmware(pAd);
2192
2193         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2194         return Status;
2195 }
2196
2197 /*
2198         ========================================================================
2199
2200         Routine Description:
2201                 Initialize ASIC
2202
2203         Arguments:
2204                 Adapter                                         Pointer to our adapter
2205
2206         Return Value:
2207                 None
2208
2209         IRQL = PASSIVE_LEVEL
2210
2211         Note:
2212
2213         ========================================================================
2214 */
2215 NDIS_STATUS     NICInitializeAsic(
2216         IN      PRTMP_ADAPTER   pAd,
2217         IN  BOOLEAN             bHardReset)
2218 {
2219         ULONG                   Index = 0;
2220         UCHAR                   R0 = 0xff;
2221         UINT32                  MacCsr12 = 0, Counter = 0;
2222 #ifdef RT2870
2223         UINT32                  MacCsr0 = 0;
2224         NTSTATUS                Status;
2225         UCHAR                   Value = 0xff;
2226 #endif // RT2870 //
2227 #ifdef RT30xx
2228         UINT32                  eFuseCtrl;
2229 #endif // RT30xx //
2230         USHORT                  KeyIdx;
2231         INT                             i,apidx;
2232
2233         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2234
2235
2236 #ifdef RT2870
2237         //
2238         // Make sure MAC gets ready after NICLoadFirmware().
2239         //
2240         Index = 0;
2241
2242         //To avoid hang-on issue when interface up in kernel 2.4,
2243         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2244         do
2245         {
2246                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2247
2248                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2249                         break;
2250
2251                 RTMPusecDelay(10);
2252         } while (Index++ < 100);
2253
2254         pAd->MACVersion = MacCsr0;
2255         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2256         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2257         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2258         MacCsr12 &= (~0x2000);
2259         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2260
2261         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2262         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2263         Status = RTUSBVenderReset(pAd);
2264
2265         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2266
2267         // Initialize MAC register to default value
2268         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2269         {
2270 #ifdef RT3070
2271                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2272                 {
2273                         MACRegTable[Index].Value = 0x00000400;
2274                 }
2275 #endif // RT3070 //
2276                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2277         }
2278
2279 #ifndef RT30xx
2280         if(IS_RT3070(pAd))
2281         {
2282                 // According to Frank Hsu (from Gary Tsao)
2283                 RTMP_IO_WRITE32(pAd, (USHORT)TX_SW_CFG0, 0x00000400);
2284
2285                 // Initialize RT3070 serial MAC registers which is different from RT2870 serial
2286                 RTUSBWriteMACRegister(pAd, TX_SW_CFG1, 0);
2287                 RTUSBWriteMACRegister(pAd, TX_SW_CFG2, 0);
2288         }
2289 #endif
2290
2291         {
2292                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2293                 {
2294                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2295                 }
2296         }
2297 #endif // RT2870 //
2298
2299 #ifdef RT30xx
2300         // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2301         if (IS_RT3090(pAd))
2302         {
2303                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2304
2305                 // RT3071 version E has fixed this issue
2306                 if ((pAd->MACVersion & 0xffff) < 0x0211)
2307                 {
2308                         if (pAd->NicConfig2.field.DACTestBit == 1)
2309                         {
2310                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2311                         }
2312                         else
2313                         {
2314                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2315                         }
2316                 }
2317                 else
2318                 {
2319                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2320                 }
2321         }
2322         else if (IS_RT3070(pAd))
2323         {
2324                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2325                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2326         }
2327 #endif // RT30xx //
2328
2329         //
2330         // Before program BBP, we need to wait BBP/RF get wake up.
2331         //
2332         Index = 0;
2333         do
2334         {
2335                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2336
2337                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
2338                         break;
2339
2340                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
2341                 RTMPusecDelay(1000);
2342         } while (Index++ < 100);
2343
2344     // The commands to firmware should be after these commands, these commands will init firmware
2345         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2346         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2347         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2348         RTMPusecDelay(1000);
2349
2350         // Read BBP register, make sure BBP is up and running before write new data
2351         Index = 0;
2352         do
2353         {
2354                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2355                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2356         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2357         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2358
2359         if ((R0 == 0xff) || (R0 == 0x00))
2360                 return NDIS_STATUS_FAILURE;
2361
2362         // Initialize BBP register to default value
2363         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2364         {
2365                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2366         }
2367
2368 #ifndef RT30xx
2369         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2370         if ((pAd->MACVersion&0xffff) != 0x0101)
2371                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2372
2373 #ifdef RT2870
2374         //write RT3070 BBP wchich different with 2870 after write RT2870 BBP
2375         if (IS_RT3070(pAd))
2376         {
2377                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
2378                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x99);
2379                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, 0x05);
2380         }
2381 #endif // RT2870 //
2382 #endif
2383 #ifdef RT30xx
2384         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2385         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2386         if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2387                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2388
2389 // add by johnli, RF power sequence setup
2390         if (IS_RT30xx(pAd))
2391         {       //update for RT3070/71/72/90/91/92.
2392                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2393                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2394                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2395         }
2396
2397         if (IS_RT3090(pAd))
2398         {
2399                 UCHAR           bbpreg=0;
2400
2401                 // enable DC filter
2402                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2403                 {
2404                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2405                 }
2406
2407                 // improve power consumption
2408                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2409                 if (pAd->Antenna.field.TxPath == 1)
2410                 {
2411                         // turn off tx DAC_1
2412                         bbpreg = (bbpreg | 0x20);
2413                 }
2414
2415                 if (pAd->Antenna.field.RxPath == 1)
2416                 {
2417                         // turn off tx ADC_1
2418                         bbpreg &= (~0x2);
2419                 }
2420                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2421
2422                 // improve power consumption in RT3071 Ver.E
2423                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2424                 {
2425                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2426                         bbpreg &= (~0x3);
2427                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2428                 }
2429         }
2430 #endif
2431         if (pAd->MACVersion == 0x28600100)
2432         {
2433                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2434                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2435     }
2436
2437         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2438         {
2439                 // enlarge MAX_LEN_CFG
2440                 UINT32 csr;
2441                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2442                 csr &= 0xFFF;
2443                 csr |= 0x2000;
2444                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2445         }
2446
2447 #ifdef RT2870
2448 {
2449         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2450
2451         //Initialize WCID table
2452         Value = 0xff;
2453         for(Index =0 ;Index < 254;Index++)
2454         {
2455                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2456         }
2457 }
2458 #endif // RT2870 //
2459
2460         // Add radio off control
2461         {
2462                 if (pAd->StaCfg.bRadio == FALSE)
2463                 {
2464 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2465                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2466                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2467                 }
2468         }
2469
2470         // Clear raw counters
2471         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2472         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2473         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2474         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2475         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2476         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2477
2478         // ASIC will keep garbage value after boot
2479         // Clear all seared key table when initial
2480         // This routine can be ignored in radio-ON/OFF operation.
2481         if (bHardReset)
2482         {
2483                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2484                 {
2485                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2486                 }
2487
2488                 // Clear all pairwise key table when initial
2489                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2490                 {
2491                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2492                 }
2493         }
2494
2495         // It isn't necessary to clear this space when not hard reset.
2496         if (bHardReset == TRUE)
2497         {
2498                 // clear all on-chip BEACON frame space
2499                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2500                 {
2501                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2502                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2503                 }
2504         }
2505 #ifdef RT2870
2506         AsicDisableSync(pAd);
2507         // Clear raw counters
2508         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2509         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2510         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2511         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2512         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2513         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2514         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2515         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2516         Counter&=0xffffff00;
2517         Counter|=0x000001e;
2518         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2519 #endif // RT2870 //
2520 #ifdef RT30xx
2521         pAd->bUseEfuse=FALSE;
2522         RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2523         pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2524         if(pAd->bUseEfuse)
2525         {
2526                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2527         }
2528         else
2529         {
2530                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2531
2532         }
2533 #endif // RT30xx //
2534
2535         {
2536                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2537                 if ((pAd->MACVersion&0xffff) != 0x0101)
2538                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2539         }
2540
2541         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2542         return NDIS_STATUS_SUCCESS;
2543 }
2544
2545 /*
2546         ========================================================================
2547
2548         Routine Description:
2549                 Reset NIC Asics
2550
2551         Arguments:
2552                 Adapter                                         Pointer to our adapter
2553
2554         Return Value:
2555                 None
2556
2557         IRQL = PASSIVE_LEVEL
2558
2559         Note:
2560                 Reset NIC to initial state AS IS system boot up time.
2561
2562         ========================================================================
2563 */
2564 VOID    NICIssueReset(
2565         IN      PRTMP_ADAPTER   pAd)
2566 {
2567         UINT32  Value = 0;
2568         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2569
2570         // Disable Rx, register value supposed will remain after reset
2571         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2572         Value &= (0xfffffff3);
2573         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2574
2575         // Issue reset and clear from reset state
2576         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2577         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2578
2579         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2580 }
2581
2582 /*
2583         ========================================================================
2584
2585         Routine Description:
2586                 Check ASIC registers and find any reason the system might hang
2587
2588         Arguments:
2589                 Adapter                                         Pointer to our adapter
2590
2591         Return Value:
2592                 None
2593
2594         IRQL = DISPATCH_LEVEL
2595
2596         ========================================================================
2597 */
2598 BOOLEAN NICCheckForHang(
2599         IN      PRTMP_ADAPTER   pAd)
2600 {
2601         return (FALSE);
2602 }
2603
2604 VOID NICUpdateFifoStaCounters(
2605         IN PRTMP_ADAPTER pAd)
2606 {
2607         TX_STA_FIFO_STRUC       StaFifo;
2608         MAC_TABLE_ENTRY         *pEntry;
2609         UCHAR                           i = 0;
2610         UCHAR                   pid = 0, wcid = 0;
2611         CHAR                            reTry;
2612         UCHAR                           succMCS;
2613
2614                 do
2615                 {
2616                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2617
2618                         if (StaFifo.field.bValid == 0)
2619                                 break;
2620
2621                         wcid = (UCHAR)StaFifo.field.wcid;
2622
2623
2624                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2625                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2626                         {
2627                                 i++;
2628                                 continue;
2629                         }
2630
2631                         /* PID store Tx MCS Rate */
2632                         pid = (UCHAR)StaFifo.field.PidType;
2633
2634                         pEntry = &pAd->MacTab.Content[wcid];
2635
2636                         pEntry->DebugFIFOCount++;
2637
2638                         if (StaFifo.field.TxBF) // 3*3
2639                                 pEntry->TxBFCount++;
2640
2641 #ifdef UAPSD_AP_SUPPORT
2642                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2643 #endif // UAPSD_AP_SUPPORT //
2644
2645                         if (!StaFifo.field.TxSuccess)
2646                         {
2647                                 pEntry->FIFOCount++;
2648                                 pEntry->OneSecTxFailCount++;
2649
2650                                 if (pEntry->FIFOCount >= 1)
2651                                 {
2652                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2653                                         pEntry->NoBADataCountDown = 64;
2654
2655                                         if(pEntry->PsMode == PWR_ACTIVE)
2656                                         {
2657                                                 int tid;
2658                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2659                                                 {
2660                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2661                                                 }
2662
2663                                                 // Update the continuous transmission counter except PS mode
2664                                                 pEntry->ContinueTxFailCnt++;
2665                                         }
2666                                         else
2667                                         {
2668                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2669                                                 //     this tx error happened due to sta just go to sleep.
2670                                                 pEntry->FIFOCount = 0;
2671                                                 pEntry->ContinueTxFailCnt = 0;
2672                                         }
2673                                 }
2674                         }
2675                         else
2676                         {
2677                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2678                                 {
2679                                         pEntry->NoBADataCountDown--;
2680                                         if (pEntry->NoBADataCountDown==0)
2681                                         {
2682                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2683                                         }
2684                                 }
2685
2686                                 pEntry->FIFOCount = 0;
2687                                 pEntry->OneSecTxNoRetryOkCount++;
2688                                 // update NoDataIdleCount when sucessful send packet to STA.
2689                                 pEntry->NoDataIdleCount = 0;
2690                                 pEntry->ContinueTxFailCnt = 0;
2691                         }
2692
2693                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2694
2695                         reTry = pid - succMCS;
2696
2697                         if (StaFifo.field.TxSuccess)
2698                         {
2699                                 pEntry->TXMCSExpected[pid]++;
2700                                 if (pid == succMCS)
2701                                 {
2702                                         pEntry->TXMCSSuccessful[pid]++;
2703                                 }
2704                                 else
2705                                 {
2706                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2707                                 }
2708                         }
2709                         else
2710                         {
2711                                 pEntry->TXMCSFailed[pid]++;
2712                         }
2713
2714                         if (reTry > 0)
2715                         {
2716                                 if ((pid >= 12) && succMCS <=7)
2717                                 {
2718                                         reTry -= 4;
2719                                 }
2720                                 pEntry->OneSecTxRetryOkCount += reTry;
2721                         }
2722
2723                         i++;
2724                         // ASIC store 16 stack
2725                 } while ( i < (2*TX_RING_SIZE) );
2726
2727 }
2728
2729 /*
2730         ========================================================================
2731
2732         Routine Description:
2733                 Read statistical counters from hardware registers and record them
2734                 in software variables for later on query
2735
2736         Arguments:
2737                 pAd                                     Pointer to our adapter
2738
2739         Return Value:
2740                 None
2741
2742         IRQL = DISPATCH_LEVEL
2743
2744         ========================================================================
2745 */
2746 VOID NICUpdateRawCounters(
2747         IN PRTMP_ADAPTER pAd)
2748 {
2749         UINT32  OldValue;
2750         RX_STA_CNT0_STRUC        RxStaCnt0;
2751         RX_STA_CNT1_STRUC   RxStaCnt1;
2752         RX_STA_CNT2_STRUC   RxStaCnt2;
2753         TX_STA_CNT0_STRUC        TxStaCnt0;
2754         TX_STA_CNT1_STRUC        StaTx1;
2755         TX_STA_CNT2_STRUC        StaTx2;
2756         TX_AGG_CNT_STRUC        TxAggCnt;
2757         TX_AGG_CNT0_STRUC       TxAggCnt0;
2758         TX_AGG_CNT1_STRUC       TxAggCnt1;
2759         TX_AGG_CNT2_STRUC       TxAggCnt2;
2760         TX_AGG_CNT3_STRUC       TxAggCnt3;
2761         TX_AGG_CNT4_STRUC       TxAggCnt4;
2762         TX_AGG_CNT5_STRUC       TxAggCnt5;
2763         TX_AGG_CNT6_STRUC       TxAggCnt6;
2764         TX_AGG_CNT7_STRUC       TxAggCnt7;
2765
2766
2767         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2768         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2769
2770         {
2771                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2772             // Update RX PLCP error counter
2773             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2774                 // Update False CCA counter
2775                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2776         }
2777
2778         // Update FCS counters
2779         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2780         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2781         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2782                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2783
2784         // Add FCS error count to private counters
2785         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2786         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2787         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2788         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2789                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2790
2791         // Update Duplicate Rcv check
2792         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2793         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2794         // Update RX Overflow counter
2795         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2796
2797 #ifdef RT2870
2798         if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2799         {
2800                 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2801                 pAd->watchDogRxOverFlowCnt = 0;
2802         }
2803         else
2804         {
2805                 if (RxStaCnt2.field.RxFifoOverflowCount)
2806                         pAd->watchDogRxOverFlowCnt++;
2807                 else
2808                         pAd->watchDogRxOverFlowCnt = 0;
2809         }
2810 #endif // RT2870 //
2811
2812
2813         if (!pAd->bUpdateBcnCntDone)
2814         {
2815         // Update BEACON sent count
2816         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2817         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2818         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2819         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2820         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2821         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2822         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2823         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2824         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2825         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2826         }
2827
2828         {
2829                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2830                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2831                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2832                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2833                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2834                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2835                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2836                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2837                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2838                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2839                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2840                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2841                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2842
2843                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2844                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2845                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2846                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2847
2848                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2849                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2850                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2851                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2852
2853                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2854                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2855                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2856                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2857
2858                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2859                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2860
2861                 // Calculate the transmitted A-MPDU count
2862                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2863                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2864
2865                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2866                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2867
2868                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2869                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2870
2871                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2872                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2873
2874                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2875                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2876
2877                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2878                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2879
2880                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2881                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2882
2883                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2884                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2885         }
2886
2887 #ifdef DBG_DIAGNOSE
2888         {
2889                 RtmpDiagStruct  *pDiag;
2890                 COUNTER_RALINK  *pRalinkCounters;
2891                 UCHAR                   ArrayCurIdx, i;
2892
2893                 pDiag = &pAd->DiagStruct;
2894                 pRalinkCounters = &pAd->RalinkCounters;
2895                 ArrayCurIdx = pDiag->ArrayCurIdx;
2896
2897                 if (pDiag->inited == 0)
2898                 {
2899                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2900                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2901                         pDiag->inited = 1;
2902                 }
2903                 else
2904                 {
2905                         // Tx
2906                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2907                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2908                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2909                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2910                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2911                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2912                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2913                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2914                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2915                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2916                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2917                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2918                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2919                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2920                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2921                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2922                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2923                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2924                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2925
2926                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2927
2928                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2929                         ArrayCurIdx = pDiag->ArrayCurIdx;
2930                         for (i =0; i < 9; i++)
2931                         {
2932                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2933                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2934                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2935                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2936                         }
2937                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2938                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2939                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2940                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2941
2942                         for (i = 9; i < 24; i++) // 3*3
2943                         {
2944                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2945                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2946                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2947 }
2948
2949                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2950                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2951                 }
2952
2953         }
2954 #endif // DBG_DIAGNOSE //
2955
2956
2957 }
2958
2959
2960 /*
2961         ========================================================================
2962
2963         Routine Description:
2964                 Reset NIC from error
2965
2966         Arguments:
2967                 Adapter                                         Pointer to our adapter
2968
2969         Return Value:
2970                 None
2971
2972         IRQL = PASSIVE_LEVEL
2973
2974         Note:
2975                 Reset NIC from error state
2976
2977         ========================================================================
2978 */
2979 VOID    NICResetFromError(
2980         IN      PRTMP_ADAPTER   pAd)
2981 {
2982         // Reset BBP (according to alex, reset ASIC will force reset BBP
2983         // Therefore, skip the reset BBP
2984         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2985
2986         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2987         // Remove ASIC from reset state
2988         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2989
2990         NICInitializeAdapter(pAd, FALSE);
2991         NICInitAsicFromEEPROM(pAd);
2992
2993         // Switch to current channel, since during reset process, the connection should remains on.
2994         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2995         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2996 }
2997
2998 /*
2999         ========================================================================
3000
3001         Routine Description:
3002                 erase 8051 firmware image in MAC ASIC
3003
3004         Arguments:
3005                 Adapter                                         Pointer to our adapter
3006
3007         IRQL = PASSIVE_LEVEL
3008
3009         ========================================================================
3010 */
3011 VOID NICEraseFirmware(
3012         IN PRTMP_ADAPTER pAd)
3013 {
3014         ULONG i;
3015
3016         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
3017                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
3018
3019 }/* End of NICEraseFirmware */
3020
3021 /*
3022         ========================================================================
3023
3024         Routine Description:
3025                 Load 8051 firmware RT2561.BIN file into MAC ASIC
3026
3027         Arguments:
3028                 Adapter                                         Pointer to our adapter
3029
3030         Return Value:
3031                 NDIS_STATUS_SUCCESS         firmware image load ok
3032                 NDIS_STATUS_FAILURE         image not found
3033
3034         IRQL = PASSIVE_LEVEL
3035
3036         ========================================================================
3037 */
3038 NDIS_STATUS NICLoadFirmware(
3039         IN PRTMP_ADAPTER pAd)
3040 {
3041         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
3042         PUCHAR                  pFirmwareImage;
3043         ULONG                   FileLength, Index;
3044         //ULONG                 firm;
3045         UINT32                  MacReg = 0;
3046         UINT32                  Version = (pAd->MACVersion >> 16);
3047
3048         pFirmwareImage = FirmwareImage;
3049         FileLength = sizeof(FirmwareImage);
3050
3051         // New 8k byte firmware size for RT3071/RT3072
3052         //printk("Usb Chip\n");
3053         if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
3054         //The firmware image consists of two parts. One is the origianl and the other is the new.
3055         //Use Second Part
3056         {
3057 #ifdef RT2870
3058                 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
3059                 {       // Use Firmware V2.
3060                         //printk("KH:Use New Version,part2\n");
3061                         pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
3062                         FileLength = FIRMWAREIMAGEV2_LENGTH;
3063                 }
3064                 else
3065                 {
3066                         //printk("KH:Use New Version,part1\n");
3067                         pFirmwareImage = FirmwareImage;
3068                         FileLength = FIRMWAREIMAGEV1_LENGTH;
3069                 }
3070 #endif // RT2870 //
3071         }
3072         else
3073         {
3074                 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
3075                 Status = NDIS_STATUS_FAILURE;
3076         }
3077
3078         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
3079
3080         /* check if MCU is ready */
3081         Index = 0;
3082         do
3083         {
3084                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
3085
3086                 if (MacReg & 0x80)
3087                         break;
3088
3089                 RTMPusecDelay(1000);
3090         } while (Index++ < 1000);
3091
3092     if (Index >= 1000)
3093         {
3094                 Status = NDIS_STATUS_FAILURE;
3095                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
3096         } /* End of if */
3097
3098     DBGPRINT(RT_DEBUG_TRACE,
3099                          ("<=== %s (status=%d)\n", __func__, Status));
3100
3101     return Status;
3102 } /* End of NICLoadFirmware */
3103
3104
3105 /*
3106         ========================================================================
3107
3108         Routine Description:
3109                 Load Tx rate switching parameters
3110
3111         Arguments:
3112                 Adapter                                         Pointer to our adapter
3113
3114         Return Value:
3115                 NDIS_STATUS_SUCCESS         firmware image load ok
3116                 NDIS_STATUS_FAILURE         image not found
3117
3118         IRQL = PASSIVE_LEVEL
3119
3120         Rate Table Format:
3121                 1. (B0: Valid Item number) (B1:Initial item from zero)
3122                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
3123
3124         ========================================================================
3125 */
3126 NDIS_STATUS NICLoadRateSwitchingParams(
3127         IN PRTMP_ADAPTER pAd)
3128 {
3129         return NDIS_STATUS_SUCCESS;
3130 }
3131
3132 /*
3133         ========================================================================
3134
3135         Routine Description:
3136                 if  pSrc1 all zero with length Length, return 0.
3137                 If not all zero, return 1
3138
3139         Arguments:
3140                 pSrc1
3141
3142         Return Value:
3143                 1:                      not all zero
3144                 0:                      all zero
3145
3146         IRQL = DISPATCH_LEVEL
3147
3148         Note:
3149
3150         ========================================================================
3151 */
3152 ULONG   RTMPNotAllZero(
3153         IN      PVOID   pSrc1,
3154         IN      ULONG   Length)
3155 {
3156         PUCHAR  pMem1;
3157         ULONG   Index = 0;
3158
3159         pMem1 = (PUCHAR) pSrc1;
3160
3161         for (Index = 0; Index < Length; Index++)
3162         {
3163                 if (pMem1[Index] != 0x0)
3164                 {
3165                         break;
3166                 }
3167         }
3168
3169         if (Index == Length)
3170         {
3171                 return (0);
3172         }
3173         else
3174         {
3175                 return (1);
3176         }
3177 }
3178
3179 /*
3180         ========================================================================
3181
3182         Routine Description:
3183                 Compare two memory block
3184
3185         Arguments:
3186                 pSrc1           Pointer to first memory address
3187                 pSrc2           Pointer to second memory address
3188
3189         Return Value:
3190                 0:                      memory is equal
3191                 1:                      pSrc1 memory is larger
3192                 2:                      pSrc2 memory is larger
3193
3194         IRQL = DISPATCH_LEVEL
3195
3196         Note:
3197
3198         ========================================================================
3199 */
3200 ULONG   RTMPCompareMemory(
3201         IN      PVOID   pSrc1,
3202         IN      PVOID   pSrc2,
3203         IN      ULONG   Length)
3204 {
3205         PUCHAR  pMem1;
3206         PUCHAR  pMem2;
3207         ULONG   Index = 0;
3208
3209         pMem1 = (PUCHAR) pSrc1;
3210         pMem2 = (PUCHAR) pSrc2;
3211
3212         for (Index = 0; Index < Length; Index++)
3213         {
3214                 if (pMem1[Index] > pMem2[Index])
3215                         return (1);
3216                 else if (pMem1[Index] < pMem2[Index])
3217                         return (2);
3218         }
3219
3220         // Equal
3221         return (0);
3222 }
3223
3224 /*
3225         ========================================================================
3226
3227         Routine Description:
3228                 Zero out memory block
3229
3230         Arguments:
3231                 pSrc1           Pointer to memory address
3232                 Length          Size
3233
3234         Return Value:
3235                 None
3236
3237         IRQL = PASSIVE_LEVEL
3238         IRQL = DISPATCH_LEVEL
3239
3240         Note:
3241
3242         ========================================================================
3243 */
3244 VOID    RTMPZeroMemory(
3245         IN      PVOID   pSrc,
3246         IN      ULONG   Length)
3247 {
3248         PUCHAR  pMem;
3249         ULONG   Index = 0;
3250
3251         pMem = (PUCHAR) pSrc;
3252
3253         for (Index = 0; Index < Length; Index++)
3254         {
3255                 pMem[Index] = 0x00;
3256         }
3257 }
3258
3259 VOID    RTMPFillMemory(
3260         IN      PVOID   pSrc,
3261         IN      ULONG   Length,
3262         IN      UCHAR   Fill)
3263 {
3264         PUCHAR  pMem;
3265         ULONG   Index = 0;
3266
3267         pMem = (PUCHAR) pSrc;
3268
3269         for (Index = 0; Index < Length; Index++)
3270         {
3271                 pMem[Index] = Fill;
3272         }
3273 }
3274
3275 /*
3276         ========================================================================
3277
3278         Routine Description:
3279                 Copy data from memory block 1 to memory block 2
3280
3281         Arguments:
3282                 pDest           Pointer to destination memory address
3283                 pSrc            Pointer to source memory address
3284                 Length          Copy size
3285
3286         Return Value:
3287                 None
3288
3289         IRQL = PASSIVE_LEVEL
3290         IRQL = DISPATCH_LEVEL
3291
3292         Note:
3293
3294         ========================================================================
3295 */
3296 VOID    RTMPMoveMemory(
3297         OUT     PVOID   pDest,
3298         IN      PVOID   pSrc,
3299         IN      ULONG   Length)
3300 {
3301         PUCHAR  pMem1;
3302         PUCHAR  pMem2;
3303         UINT    Index;
3304
3305         ASSERT((Length==0) || (pDest && pSrc));
3306
3307         pMem1 = (PUCHAR) pDest;
3308         pMem2 = (PUCHAR) pSrc;
3309
3310         for (Index = 0; Index < Length; Index++)
3311         {
3312                 pMem1[Index] = pMem2[Index];
3313         }
3314 }
3315
3316 /*
3317         ========================================================================
3318
3319         Routine Description:
3320                 Initialize port configuration structure
3321
3322         Arguments:
3323                 Adapter                                         Pointer to our adapter
3324
3325         Return Value:
3326                 None
3327
3328         IRQL = PASSIVE_LEVEL
3329
3330         Note:
3331
3332         ========================================================================
3333 */
3334 VOID    UserCfgInit(
3335         IN      PRTMP_ADAPTER pAd)
3336 {
3337     UINT key_index, bss_index;
3338
3339         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3340
3341         //
3342         //  part I. intialize common configuration
3343         //
3344 #ifdef RT2870
3345         pAd->BulkOutReq = 0;
3346
3347         pAd->BulkOutComplete = 0;
3348         pAd->BulkOutCompleteOther = 0;
3349         pAd->BulkOutCompleteCancel = 0;
3350         pAd->BulkInReq = 0;
3351         pAd->BulkInComplete = 0;
3352         pAd->BulkInCompleteFail = 0;
3353
3354         //pAd->QuickTimerP = 100;
3355         //pAd->TurnAggrBulkInCount = 0;
3356         pAd->bUsbTxBulkAggre = 0;
3357
3358         // init as unsed value to ensure driver will set to MCU once.
3359         pAd->LedIndicatorStregth = 0xFF;
3360
3361         pAd->CommonCfg.MaxPktOneTxBulk = 2;
3362         pAd->CommonCfg.TxBulkFactor = 1;
3363         pAd->CommonCfg.RxBulkFactor =1;
3364
3365         pAd->CommonCfg.TxPower = 100; //mW
3366
3367         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3368 #endif // RT2870 //
3369
3370         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3371         {
3372                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3373                 {
3374                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3375                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3376                 }
3377         }
3378 #ifdef RT30xx
3379         pAd->EepromAccess = FALSE;
3380 #endif
3381         pAd->Antenna.word = 0;
3382         pAd->CommonCfg.BBPCurrentBW = BW_20;
3383
3384         pAd->LedCntl.word = 0;
3385
3386         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3387         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3388         pAd->RfIcType = RFIC_2820;
3389
3390         // Init timer for reset complete event
3391         pAd->CommonCfg.CentralChannel = 1;
3392         pAd->bForcePrintTX = FALSE;
3393         pAd->bForcePrintRX = FALSE;
3394         pAd->bStaFifoTest = FALSE;
3395         pAd->bProtectionTest = FALSE;
3396         pAd->bHCCATest = FALSE;
3397         pAd->bGenOneHCCA = FALSE;
3398         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3399         pAd->CommonCfg.TxPower = 100; //mW
3400         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3401         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3402         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3403         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3404         pAd->CommonCfg.RtsThreshold = 2347;
3405         pAd->CommonCfg.FragmentThreshold = 2346;
3406         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3407         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3408         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3409         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3410         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3411         pAd->CommonCfg.RadarDetect.CSCount = 0;
3412         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3413         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3414         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3415         pAd->CommonCfg.bAPSDCapable = FALSE;
3416         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3417         pAd->CommonCfg.TriggerTimerCount = 0;
3418         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3419         pAd->CommonCfg.bCountryFlag = FALSE;
3420         pAd->CommonCfg.TxStream = 0;
3421         pAd->CommonCfg.RxStream = 0;
3422
3423         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3424
3425         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3426         pAd->HTCEnable = FALSE;
3427         pAd->bBroadComHT = FALSE;
3428         pAd->CommonCfg.bRdg = FALSE;
3429
3430         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3431         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3432         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3433         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3434         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3435         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3436         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3437
3438         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3439         BATableInit(pAd, &pAd->BATable);
3440
3441         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3442         pAd->CommonCfg.bHTProtect = 1;
3443         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3444         pAd->CommonCfg.bBADecline = FALSE;
3445         pAd->CommonCfg.bDisableReordering = FALSE;
3446
3447         pAd->CommonCfg.TxBASize = 7;
3448
3449         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3450
3451         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3452         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3453         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3454         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3455         pAd->CommonCfg.TxRate = RATE_6;
3456
3457         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3458         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3459         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3460
3461         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3462
3463         //
3464         // part II. intialize STA specific configuration
3465         //
3466         {
3467                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3468                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3469                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3470                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3471
3472                 pAd->StaCfg.Psm = PWR_ACTIVE;
3473
3474                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3475                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3476                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3477                 pAd->StaCfg.bMixCipher = FALSE;
3478                 pAd->StaCfg.DefaultKeyId = 0;
3479
3480                 // 802.1x port control
3481                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3482                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3483                 pAd->StaCfg.LastMicErrorTime = 0;
3484                 pAd->StaCfg.MicErrCnt        = 0;
3485                 pAd->StaCfg.bBlockAssoc      = FALSE;
3486                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3487
3488                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3489
3490                 pAd->StaCfg.RssiTrigger = 0;
3491                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3492                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3493                 pAd->StaCfg.AtimWin = 0;
3494                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3495                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3496                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3497                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3498                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3499
3500                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3501                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3502         }
3503
3504         // global variables mXXXX used in MAC protocol state machines
3505         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3506         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3507         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3508
3509         // PHY specification
3510         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3511         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3512
3513         {
3514                 // user desired power mode
3515                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3516                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3517                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3518
3519                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3520                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3521
3522                 // Patch for Ndtest
3523                 pAd->StaCfg.ScanCnt = 0;
3524
3525                 // CCX 2.0 control flag init
3526                 pAd->StaCfg.CCXEnable = FALSE;
3527                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3528                 pAd->StaCfg.CCXQosECWMin        = 4;
3529                 pAd->StaCfg.CCXQosECWMax        = 10;
3530
3531                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3532                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3533                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3534                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3535                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3536
3537                 // Nitro mode control
3538                 pAd->StaCfg.bAutoReconnect = TRUE;
3539
3540                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3541                 // This patch is for driver wake up from standby mode, system will do scan right away.
3542                 pAd->StaCfg.LastScanTime = 0;
3543                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3544                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3545                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3546                 pAd->StaCfg.IEEE8021X = FALSE;
3547                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3548                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3549                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3550         }
3551
3552         // Default for extra information is not valid
3553         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3554
3555         // Default Config change flag
3556         pAd->bConfigChanged = FALSE;
3557
3558         //
3559         // part III. AP configurations
3560         //
3561
3562
3563         //
3564         // part IV. others
3565         //
3566         // dynamic BBP R66:sensibity tuning to overcome background noise
3567         pAd->BbpTuning.bEnable                = TRUE;
3568         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3569         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3570         pAd->BbpTuning.R66Delta               = 4;
3571         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3572
3573         //
3574         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3575         // if not initial this value, the default value will be 0.
3576         //
3577         pAd->BbpTuning.R66CurrentValue = 0x38;
3578
3579         pAd->Bbp94 = BBPR94_DEFAULT;
3580         pAd->BbpForCCK = FALSE;
3581
3582         // initialize MAC table and allocate spin lock
3583         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3584         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3585         NdisAllocateSpinLock(&pAd->MacTabLock);
3586
3587         pAd->CommonCfg.bWiFiTest = FALSE;
3588
3589
3590         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3591 }
3592
3593 // IRQL = PASSIVE_LEVEL
3594 UCHAR BtoH(char ch)
3595 {
3596         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3597         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3598         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3599         return(255);
3600 }
3601
3602 //
3603 //  FUNCTION: AtoH(char *, UCHAR *, int)
3604 //
3605 //  PURPOSE:  Converts ascii string to network order hex
3606 //
3607 //  PARAMETERS:
3608 //    src    - pointer to input ascii string
3609 //    dest   - pointer to output hex
3610 //    destlen - size of dest
3611 //
3612 //  COMMENTS:
3613 //
3614 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3615 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3616 //
3617 // IRQL = PASSIVE_LEVEL
3618
3619 void AtoH(char * src, UCHAR * dest, int destlen)
3620 {
3621         char * srcptr;
3622         PUCHAR destTemp;
3623
3624         srcptr = src;
3625         destTemp = (PUCHAR) dest;
3626
3627         while(destlen--)
3628         {
3629                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3630                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3631                 destTemp++;
3632         }
3633 }
3634
3635 VOID    RTMPPatchMacBbpBug(
3636         IN      PRTMP_ADAPTER   pAd)
3637 {
3638         ULONG   Index;
3639
3640         // Initialize BBP register to default value
3641         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3642         {
3643                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3644         }
3645
3646         // Initialize RF register to default value
3647         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3648         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3649
3650         // Re-init BBP register from EEPROM value
3651         NICInitAsicFromEEPROM(pAd);
3652 }
3653
3654 /*
3655         ========================================================================
3656
3657         Routine Description:
3658                 Init timer objects
3659
3660         Arguments:
3661                 pAd                     Pointer to our adapter
3662                 pTimer                          Timer structure
3663                 pTimerFunc                      Function to execute when timer expired
3664                 Repeat                          Ture for period timer
3665
3666         Return Value:
3667                 None
3668
3669         Note:
3670
3671         ========================================================================
3672 */
3673 VOID    RTMPInitTimer(
3674         IN      PRTMP_ADAPTER                   pAd,
3675         IN      PRALINK_TIMER_STRUCT    pTimer,
3676         IN      PVOID                                   pTimerFunc,
3677         IN      PVOID                                   pData,
3678         IN      BOOLEAN                                 Repeat)
3679 {
3680         //
3681         // Set Valid to TRUE for later used.
3682         // It will crash if we cancel a timer or set a timer
3683         // that we haven't initialize before.
3684         //
3685         pTimer->Valid      = TRUE;
3686
3687         pTimer->PeriodicType = Repeat;
3688         pTimer->State      = FALSE;
3689         pTimer->cookie = (ULONG) pData;
3690
3691 #ifdef RT2870
3692         pTimer->pAd = pAd;
3693 #endif // RT2870 //
3694
3695         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3696 }
3697
3698 /*
3699         ========================================================================
3700
3701         Routine Description:
3702                 Init timer objects
3703
3704         Arguments:
3705                 pTimer                          Timer structure
3706                 Value                           Timer value in milliseconds
3707
3708         Return Value:
3709                 None
3710
3711         Note:
3712                 To use this routine, must call RTMPInitTimer before.
3713
3714         ========================================================================
3715 */
3716 VOID    RTMPSetTimer(
3717         IN      PRALINK_TIMER_STRUCT    pTimer,
3718         IN      ULONG                                   Value)
3719 {
3720         if (pTimer->Valid)
3721         {
3722                 pTimer->TimerValue = Value;
3723                 pTimer->State      = FALSE;
3724                 if (pTimer->PeriodicType == TRUE)
3725                 {
3726                         pTimer->Repeat = TRUE;
3727                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3728                 }
3729                 else
3730                 {
3731                         pTimer->Repeat = FALSE;
3732                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3733                 }
3734         }
3735         else
3736         {
3737                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3738         }
3739 }
3740
3741
3742 /*
3743         ========================================================================
3744
3745         Routine Description:
3746                 Init timer objects
3747
3748         Arguments:
3749                 pTimer                          Timer structure
3750                 Value                           Timer value in milliseconds
3751
3752         Return Value:
3753                 None
3754
3755         Note:
3756                 To use this routine, must call RTMPInitTimer before.
3757
3758         ========================================================================
3759 */
3760 VOID    RTMPModTimer(
3761         IN      PRALINK_TIMER_STRUCT    pTimer,
3762         IN      ULONG                                   Value)
3763 {
3764         BOOLEAN Cancel;
3765
3766         if (pTimer->Valid)
3767         {
3768                 pTimer->TimerValue = Value;
3769                 pTimer->State      = FALSE;
3770                 if (pTimer->PeriodicType == TRUE)
3771                 {
3772                         RTMPCancelTimer(pTimer, &Cancel);
3773                         RTMPSetTimer(pTimer, Value);
3774                 }
3775                 else
3776                 {
3777                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3778                 }
3779         }
3780         else
3781         {
3782                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3783         }
3784 }
3785
3786 /*
3787         ========================================================================
3788
3789         Routine Description:
3790                 Cancel timer objects
3791
3792         Arguments:
3793                 Adapter                                         Pointer to our adapter
3794
3795         Return Value:
3796                 None
3797
3798         IRQL = PASSIVE_LEVEL
3799         IRQL = DISPATCH_LEVEL
3800
3801         Note:
3802                 1.) To use this routine, must call RTMPInitTimer before.
3803                 2.) Reset NIC to initial state AS IS system boot up time.
3804
3805         ========================================================================
3806 */
3807 VOID    RTMPCancelTimer(
3808         IN      PRALINK_TIMER_STRUCT    pTimer,
3809         OUT     BOOLEAN                                 *pCancelled)
3810 {
3811         if (pTimer->Valid)
3812         {
3813                 if (pTimer->State == FALSE)
3814                         pTimer->Repeat = FALSE;
3815                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3816
3817                 if (*pCancelled == TRUE)
3818                         pTimer->State = TRUE;
3819
3820 #ifdef RT2870
3821                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3822                 //              it's still waiting for execution.
3823
3824                 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3825 #endif // RT2870 //
3826         }
3827         else
3828         {
3829                 //
3830                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3831                 // And don't set the "Valid" to False. So that we can use this timer again.
3832                 //
3833                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3834         }
3835 }
3836
3837 /*
3838         ========================================================================
3839
3840         Routine Description:
3841                 Set LED Status
3842
3843         Arguments:
3844                 pAd                                             Pointer to our adapter
3845                 Status                                  LED Status
3846
3847         Return Value:
3848                 None
3849
3850         IRQL = PASSIVE_LEVEL
3851         IRQL = DISPATCH_LEVEL
3852
3853         Note:
3854
3855         ========================================================================
3856 */
3857 VOID RTMPSetLED(
3858         IN PRTMP_ADAPTER        pAd,
3859         IN UCHAR                        Status)
3860 {
3861         //ULONG                 data;
3862         UCHAR                   HighByte = 0;
3863         UCHAR                   LowByte;
3864
3865         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3866         switch (Status)
3867         {
3868                 case LED_LINK_DOWN:
3869                         HighByte = 0x20;
3870                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3871                         pAd->LedIndicatorStregth = 0;
3872                         break;
3873                 case LED_LINK_UP:
3874                         if (pAd->CommonCfg.Channel > 14)
3875                                 HighByte = 0xa0;
3876                         else
3877                                 HighByte = 0x60;
3878                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3879                         break;
3880                 case LED_RADIO_ON:
3881                         HighByte = 0x20;
3882                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3883                         break;
3884                 case LED_HALT:
3885                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3886                 case LED_RADIO_OFF:
3887                         HighByte = 0;
3888                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3889                         break;
3890         case LED_WPS:
3891                         HighByte = 0x10;
3892                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3893                         break;
3894                 case LED_ON_SITE_SURVEY:
3895                         HighByte = 0x08;
3896                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3897                         break;
3898                 case LED_POWER_UP:
3899                         HighByte = 0x04;
3900                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3901                         break;
3902                 default:
3903                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3904                         break;
3905         }
3906
3907     //
3908         // Keep LED status for LED SiteSurvey mode.
3909         // After SiteSurvey, we will set the LED mode to previous status.
3910         //
3911         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3912                 pAd->LedStatus = Status;
3913
3914         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3915 }
3916
3917 /*
3918         ========================================================================
3919
3920         Routine Description:
3921                 Set LED Signal Stregth
3922
3923         Arguments:
3924                 pAd                                             Pointer to our adapter
3925                 Dbm                                             Signal Stregth
3926
3927         Return Value:
3928                 None
3929
3930         IRQL = PASSIVE_LEVEL
3931
3932         Note:
3933                 Can be run on any IRQL level.
3934
3935                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3936                 <= -90  No Signal
3937                 <= -81  Very Low
3938                 <= -71  Low
3939                 <= -67  Good
3940                 <= -57  Very Good
3941                  > -57  Excellent
3942         ========================================================================
3943 */
3944 VOID RTMPSetSignalLED(
3945         IN PRTMP_ADAPTER        pAd,
3946         IN NDIS_802_11_RSSI Dbm)
3947 {
3948         UCHAR           nLed = 0;
3949
3950         //
3951         // if not Signal Stregth, then do nothing.
3952         //
3953         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3954         {
3955                 return;
3956         }
3957
3958         if (Dbm <= -90)
3959                 nLed = 0;
3960         else if (Dbm <= -81)
3961                 nLed = 1;
3962         else if (Dbm <= -71)
3963                 nLed = 3;
3964         else if (Dbm <= -67)
3965                 nLed = 7;
3966         else if (Dbm <= -57)
3967                 nLed = 15;
3968         else
3969                 nLed = 31;
3970
3971         //
3972         // Update Signal Stregth to firmware if changed.
3973         //
3974         if (pAd->LedIndicatorStregth != nLed)
3975         {
3976                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3977                 pAd->LedIndicatorStregth = nLed;
3978         }
3979 }
3980
3981 /*
3982         ========================================================================
3983
3984         Routine Description:
3985                 Enable RX
3986
3987         Arguments:
3988                 pAd                                             Pointer to our adapter
3989
3990         Return Value:
3991                 None
3992
3993         IRQL <= DISPATCH_LEVEL
3994
3995         Note:
3996                 Before Enable RX, make sure you have enabled Interrupt.
3997         ========================================================================
3998 */
3999 VOID RTMPEnableRxTx(
4000         IN PRTMP_ADAPTER        pAd)
4001 {
4002         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
4003
4004         // Enable Rx DMA.
4005         RT28XXDMAEnable(pAd);
4006
4007         // enable RX of MAC block
4008         if (pAd->OpMode == OPMODE_AP)
4009         {
4010                 UINT32 rx_filter_flag = APNORMAL;
4011
4012
4013                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
4014         }
4015         else
4016         {
4017                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
4018         }
4019
4020         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
4021         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
4022 }
4023
4024