2 Conexant 22702 DVB OFDM demodulator driver
5 Alps TDMB7 DVB OFDM demodulator driver
7 Copyright (C) 2001-2002 Convergence Integrated Media GmbH
8 Holger Waechtler <holger@convergence.de>
10 Copyright (C) 2004 Steven Toth <stoth@hauppauge.com>
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/string.h>
32 #include <linux/slab.h>
33 #include <linux/delay.h>
34 #include "dvb_frontend.h"
39 struct cx22702_state {
41 struct i2c_adapter* i2c;
43 /* configuration settings */
44 const struct cx22702_config* config;
46 struct dvb_frontend frontend;
48 /* previous uncorrected block counter */
53 #define dprintk if (debug) printk
55 /* Register values to initialise the demod */
56 static u8 init_tab [] = {
57 0x00, 0x00, /* Stop aquisition */
84 static int cx22702_writereg (struct cx22702_state* state, u8 reg, u8 data)
87 u8 buf [] = { reg, data };
88 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
90 ret = i2c_transfer(state->i2c, &msg, 1);
93 printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
94 __FUNCTION__, reg, data, ret);
96 return (ret != 1) ? -1 : 0;
99 static u8 cx22702_readreg (struct cx22702_state* state, u8 reg)
105 struct i2c_msg msg [] = {
106 { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
107 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
109 ret = i2c_transfer(state->i2c, msg, 2);
112 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
117 static int cx22702_set_inversion (struct cx22702_state *state, int inversion)
127 val = cx22702_readreg (state, 0x0C);
128 return cx22702_writereg (state, 0x0C, val | 0x01);
131 val = cx22702_readreg (state, 0x0C);
132 return cx22702_writereg (state, 0x0C, val & 0xfe);
141 /* Retrieve the demod settings */
142 static int cx22702_get_tps (struct cx22702_state *state, struct dvb_ofdm_parameters *p)
146 /* Make sure the TPS regs are valid */
147 if (!(cx22702_readreg(state, 0x0A) & 0x20))
150 val = cx22702_readreg (state, 0x01);
151 switch( (val&0x18)>>3) {
152 case 0: p->constellation = QPSK; break;
153 case 1: p->constellation = QAM_16; break;
154 case 2: p->constellation = QAM_64; break;
157 case 0: p->hierarchy_information = HIERARCHY_NONE; break;
158 case 1: p->hierarchy_information = HIERARCHY_1; break;
159 case 2: p->hierarchy_information = HIERARCHY_2; break;
160 case 3: p->hierarchy_information = HIERARCHY_4; break;
164 val = cx22702_readreg (state, 0x02);
165 switch( (val&0x38)>>3 ) {
166 case 0: p->code_rate_HP = FEC_1_2; break;
167 case 1: p->code_rate_HP = FEC_2_3; break;
168 case 2: p->code_rate_HP = FEC_3_4; break;
169 case 3: p->code_rate_HP = FEC_5_6; break;
170 case 4: p->code_rate_HP = FEC_7_8; break;
173 case 0: p->code_rate_LP = FEC_1_2; break;
174 case 1: p->code_rate_LP = FEC_2_3; break;
175 case 2: p->code_rate_LP = FEC_3_4; break;
176 case 3: p->code_rate_LP = FEC_5_6; break;
177 case 4: p->code_rate_LP = FEC_7_8; break;
181 val = cx22702_readreg (state, 0x03);
182 switch( (val&0x0c)>>2 ) {
183 case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
184 case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
185 case 2: p->guard_interval = GUARD_INTERVAL_1_8; break;
186 case 3: p->guard_interval = GUARD_INTERVAL_1_4; break;
189 case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
190 case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
196 static int cx22702_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
198 struct cx22702_state* state = fe->demodulator_priv;
199 dprintk ("%s(%d)\n", __FUNCTION__, enable);
201 return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) & 0xfe);
203 return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) | 1);
206 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
207 static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
210 struct cx22702_state* state = fe->demodulator_priv;
212 if (fe->ops.tuner_ops.set_params) {
213 fe->ops.tuner_ops.set_params(fe, p);
214 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
218 cx22702_set_inversion (state, p->inversion);
221 switch(p->u.ofdm.bandwidth) {
222 case BANDWIDTH_6_MHZ:
223 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20 );
225 case BANDWIDTH_7_MHZ:
226 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10 );
228 case BANDWIDTH_8_MHZ:
229 cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );
232 dprintk ("%s: invalid bandwidth\n",__FUNCTION__);
237 p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working
239 /* use auto configuration? */
240 if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) ||
241 (p->u.ofdm.constellation==QAM_AUTO) ||
242 (p->u.ofdm.code_rate_HP==FEC_AUTO) ||
243 (p->u.ofdm.code_rate_LP==FEC_AUTO) ||
244 (p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) ||
245 (p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {
247 /* TPS Source - use hardware driven values */
248 cx22702_writereg(state, 0x06, 0x10);
249 cx22702_writereg(state, 0x07, 0x9);
250 cx22702_writereg(state, 0x08, 0xC1);
251 cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );
252 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
253 cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
254 dprintk("%s: Autodetecting\n",__FUNCTION__);
258 /* manually programmed values */
260 switch(p->u.ofdm.constellation) {
261 case QPSK: val = (val&0xe7); break;
262 case QAM_16: val = (val&0xe7)|0x08; break;
263 case QAM_64: val = (val&0xe7)|0x10; break;
265 dprintk ("%s: invalid constellation\n",__FUNCTION__);
268 switch(p->u.ofdm.hierarchy_information) {
269 case HIERARCHY_NONE: val = (val&0xf8); break;
270 case HIERARCHY_1: val = (val&0xf8)|1; break;
271 case HIERARCHY_2: val = (val&0xf8)|2; break;
272 case HIERARCHY_4: val = (val&0xf8)|3; break;
274 dprintk ("%s: invalid hierarchy\n",__FUNCTION__);
277 cx22702_writereg (state, 0x06, val);
280 switch(p->u.ofdm.code_rate_HP) {
282 case FEC_1_2: val = (val&0xc7); break;
283 case FEC_2_3: val = (val&0xc7)|0x08; break;
284 case FEC_3_4: val = (val&0xc7)|0x10; break;
285 case FEC_5_6: val = (val&0xc7)|0x18; break;
286 case FEC_7_8: val = (val&0xc7)|0x20; break;
288 dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);
291 switch(p->u.ofdm.code_rate_LP) {
293 case FEC_1_2: val = (val&0xf8); break;
294 case FEC_2_3: val = (val&0xf8)|1; break;
295 case FEC_3_4: val = (val&0xf8)|2; break;
296 case FEC_5_6: val = (val&0xf8)|3; break;
297 case FEC_7_8: val = (val&0xf8)|4; break;
299 dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);
302 cx22702_writereg (state, 0x07, val);
305 switch(p->u.ofdm.guard_interval) {
306 case GUARD_INTERVAL_1_32: val = (val&0xf3); break;
307 case GUARD_INTERVAL_1_16: val = (val&0xf3)|0x04; break;
308 case GUARD_INTERVAL_1_8: val = (val&0xf3)|0x08; break;
309 case GUARD_INTERVAL_1_4: val = (val&0xf3)|0x0c; break;
311 dprintk ("%s: invalid guard_interval\n",__FUNCTION__);
314 switch(p->u.ofdm.transmission_mode) {
315 case TRANSMISSION_MODE_2K: val = (val&0xfc); break;
316 case TRANSMISSION_MODE_8K: val = (val&0xfc)|1; break;
318 dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);
321 cx22702_writereg(state, 0x08, val);
322 cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02 );
323 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
325 /* Begin channel aquisition */
326 cx22702_writereg(state, 0x00, 0x01);
331 /* Reset the demod hardware and reset all of the configuration registers
332 to a default state. */
333 static int cx22702_init (struct dvb_frontend* fe)
336 struct cx22702_state* state = fe->demodulator_priv;
338 cx22702_writereg (state, 0x00, 0x02);
342 for (i=0; i<sizeof(init_tab); i+=2)
343 cx22702_writereg (state, init_tab[i], init_tab[i+1]);
345 cx22702_writereg (state, 0xf8, (state->config->output_mode << 1) & 0x02);
347 cx22702_i2c_gate_ctrl(fe, 0);
352 static int cx22702_read_status(struct dvb_frontend* fe, fe_status_t* status)
354 struct cx22702_state* state = fe->demodulator_priv;
360 reg0A = cx22702_readreg (state, 0x0A);
361 reg23 = cx22702_readreg (state, 0x23);
363 dprintk ("%s: status demod=0x%02x agc=0x%02x\n"
364 ,__FUNCTION__,reg0A,reg23);
367 *status |= FE_HAS_LOCK;
368 *status |= FE_HAS_VITERBI;
369 *status |= FE_HAS_SYNC;
373 *status |= FE_HAS_CARRIER;
376 *status |= FE_HAS_SIGNAL;
381 static int cx22702_read_ber(struct dvb_frontend* fe, u32* ber)
383 struct cx22702_state* state = fe->demodulator_priv;
385 if(cx22702_readreg (state, 0xE4) & 0x02) {
386 /* Realtime statistics */
387 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
388 | (cx22702_readreg (state, 0xDF)&0x7F);
390 /* Averagtine statistics */
391 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
392 | cx22702_readreg (state, 0xDF);
398 static int cx22702_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
400 struct cx22702_state* state = fe->demodulator_priv;
402 *signal_strength = cx22702_readreg (state, 0x23);
407 static int cx22702_read_snr(struct dvb_frontend* fe, u16* snr)
409 struct cx22702_state* state = fe->demodulator_priv;
412 if(cx22702_readreg (state, 0xE4) & 0x02) {
413 /* Realtime statistics */
414 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
415 | (cx22702_readreg (state, 0xDF)& 0x7F);
417 /* Averagine statistics */
418 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 8
419 | cx22702_readreg (state, 0xDF);
426 static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
428 struct cx22702_state* state = fe->demodulator_priv;
432 /* RS Uncorrectable Packet Count then reset */
433 _ucblocks = cx22702_readreg (state, 0xE3);
434 if (state->prevUCBlocks < _ucblocks)
435 *ucblocks = (_ucblocks - state->prevUCBlocks);
437 *ucblocks = state->prevUCBlocks - _ucblocks;
438 state->prevUCBlocks = _ucblocks;
443 static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
445 struct cx22702_state* state = fe->demodulator_priv;
447 u8 reg0C = cx22702_readreg (state, 0x0C);
449 p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
450 return cx22702_get_tps (state, &p->u.ofdm);
453 static int cx22702_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
455 tune->min_delay_ms = 1000;
459 static void cx22702_release(struct dvb_frontend* fe)
461 struct cx22702_state* state = fe->demodulator_priv;
465 static struct dvb_frontend_ops cx22702_ops;
467 struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
468 struct i2c_adapter* i2c)
470 struct cx22702_state* state = NULL;
472 /* allocate memory for the internal state */
473 state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
477 /* setup the state */
478 state->config = config;
480 state->prevUCBlocks = 0;
482 /* check if the demod is there */
483 if (cx22702_readreg(state, 0x1f) != 0x3)
486 /* create dvb_frontend */
487 memcpy(&state->frontend.ops, &cx22702_ops, sizeof(struct dvb_frontend_ops));
488 state->frontend.demodulator_priv = state;
489 return &state->frontend;
496 static struct dvb_frontend_ops cx22702_ops = {
499 .name = "Conexant CX22702 DVB-T",
501 .frequency_min = 177000000,
502 .frequency_max = 858000000,
503 .frequency_stepsize = 166666,
504 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
505 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
506 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
507 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
508 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
511 .release = cx22702_release,
513 .init = cx22702_init,
514 .i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
516 .set_frontend = cx22702_set_tps,
517 .get_frontend = cx22702_get_frontend,
518 .get_tune_settings = cx22702_get_tune_settings,
520 .read_status = cx22702_read_status,
521 .read_ber = cx22702_read_ber,
522 .read_signal_strength = cx22702_read_signal_strength,
523 .read_snr = cx22702_read_snr,
524 .read_ucblocks = cx22702_read_ucblocks,
527 module_param(debug, int, 0644);
528 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
530 MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
531 MODULE_AUTHOR("Steven Toth");
532 MODULE_LICENSE("GPL");
534 EXPORT_SYMBOL(cx22702_attach);