Improve some nv_bios messages, remove others
[nouveau] / src / nv40_exa.c
1 /*
2  * Copyright 2007 Ben Skeggs
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20  * SOFTWARE.
21  */
22
23 #include "nv_include.h"
24 #include "nv30_shaders.h"
25
26 typedef struct nv_pict_surface_format {
27         int      pict_fmt;
28         uint32_t card_fmt;
29 } nv_pict_surface_format_t;
30
31 typedef struct nv_pict_texture_format {
32         int      pict_fmt;
33         uint32_t card_fmt;
34         uint32_t card_swz;
35 } nv_pict_texture_format_t;
36
37 typedef struct nv_pict_op {
38         Bool     src_alpha;
39         Bool     dst_alpha;
40         uint32_t src_card_op;
41         uint32_t dst_card_op;
42 } nv_pict_op_t;
43
44 typedef struct nv40_exa_state {
45         Bool have_mask;
46
47         struct {
48                 PictTransformPtr transform;
49                 float width;
50                 float height;
51         } unit[2];
52 } nv40_exa_state_t;
53 static nv40_exa_state_t exa_state;
54 #define NV40EXA_STATE nv40_exa_state_t *state = &exa_state
55
56 static nv_pict_surface_format_t
57 NV40SurfaceFormat[] = {
58         { PICT_a8r8g8b8 , NV40TCL_RT_FORMAT_COLOR_A8R8G8B8 },
59         { PICT_x8r8g8b8 , NV40TCL_RT_FORMAT_COLOR_X8R8G8B8 },
60         { PICT_r5g6b5   , NV40TCL_RT_FORMAT_COLOR_R5G6B5   },
61         { PICT_a8       , NV40TCL_RT_FORMAT_COLOR_B8       },
62         { -1, ~0 }
63 };
64
65 static nv_pict_surface_format_t *
66 NV40_GetPictSurfaceFormat(int format)
67 {
68         int i = 0;
69
70         while (NV40SurfaceFormat[i].pict_fmt != -1) {
71                 if (NV40SurfaceFormat[i].pict_fmt == format)
72                         return &NV40SurfaceFormat[i];
73                 i++;
74         }
75
76         return NULL;
77 }
78
79 enum {
80         NV40EXA_FPID_PASS_COL0 = 0,
81         NV40EXA_FPID_PASS_TEX0 = 1,
82         NV40EXA_FPID_COMPOSITE_MASK = 2,
83         NV40EXA_FPID_COMPOSITE_MASK_SA_CA = 3,
84         NV40EXA_FPID_COMPOSITE_MASK_CA = 4,
85         NV40EXA_FPID_MAX = 5
86 } NV40EXA_FPID;
87
88 static nv_shader_t *nv40_fp_map[NV40EXA_FPID_MAX] = {
89         &nv30_fp_pass_col0,
90         &nv30_fp_pass_tex0,
91         &nv30_fp_composite_mask,
92         &nv30_fp_composite_mask_sa_ca,
93         &nv30_fp_composite_mask_ca
94 };
95
96 static nv_shader_t *nv40_fp_map_a8[NV40EXA_FPID_MAX];
97
98 static void
99 NV40EXAHackupA8Shaders(ScrnInfoPtr pScrn)
100 {
101         int s;
102
103         for (s = 0; s < NV40EXA_FPID_MAX; s++) {
104                 nv_shader_t *def, *a8;
105
106                 def = nv40_fp_map[s];
107                 a8 = xcalloc(1, sizeof(nv_shader_t));
108                 a8->card_priv.NV30FP.num_regs = def->card_priv.NV30FP.num_regs;
109                 a8->size = def->size + 4;
110                 memcpy(a8->data, def->data, def->size * sizeof(uint32_t));
111                 nv40_fp_map_a8[s] = a8;
112
113                 a8->data[a8->size - 8 + 0] &= ~0x00000081;
114                 a8->data[a8->size - 4 + 0]  = 0x01401e81;
115                 a8->data[a8->size - 4 + 1]  = 0x1c9dfe00;
116                 a8->data[a8->size - 4 + 2]  = 0x0001c800;
117                 a8->data[a8->size - 4 + 3]  = 0x0001c800;
118         }
119 }
120
121 #define _(r,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w)                        \
122   {                                                                            \
123   PICT_##r, NV40TCL_TEX_FORMAT_FORMAT_##tf,                                    \
124   NV40TCL_TEX_SWIZZLE_S0_X_##ts0x | NV40TCL_TEX_SWIZZLE_S0_Y_##ts0y |          \
125   NV40TCL_TEX_SWIZZLE_S0_Z_##ts0z | NV40TCL_TEX_SWIZZLE_S0_W_##ts0w |          \
126   NV40TCL_TEX_SWIZZLE_S1_X_##ts1x | NV40TCL_TEX_SWIZZLE_S1_Y_##ts1y |          \
127   NV40TCL_TEX_SWIZZLE_S1_Z_##ts1z | NV40TCL_TEX_SWIZZLE_S1_W_##ts1w,           \
128   }
129 static nv_pict_texture_format_t
130 NV40TextureFormat[] = {
131         _(a8r8g8b8, A8R8G8B8,   S1,   S1,   S1,   S1, X, Y, Z, W),
132         _(x8r8g8b8, A8R8G8B8,   S1,   S1,   S1,  ONE, X, Y, Z, W),
133         _(x8b8g8r8, A8R8G8B8,   S1,   S1,   S1,  ONE, Z, Y, X, W),
134         _(a1r5g5b5, A1R5G5B5,   S1,   S1,   S1,   S1, X, Y, Z, W),
135         _(x1r5g5b5, A1R5G5B5,   S1,   S1,   S1,  ONE, X, Y, Z, W),
136         _(  r5g6b5,   R5G6B5,   S1,   S1,   S1,   S1, X, Y, Z, W),
137         _(      a8,       L8, ZERO, ZERO, ZERO,   S1, X, X, X, X),
138         { -1, ~0, ~0 }
139 };
140 #undef _
141
142 static nv_pict_texture_format_t *
143 NV40_GetPictTextureFormat(int format)
144 {
145         int i = 0;
146
147         while (NV40TextureFormat[i].pict_fmt != -1) {
148                 if (NV40TextureFormat[i].pict_fmt == format)
149                         return &NV40TextureFormat[i];
150                 i++;
151         }
152
153         return NULL;
154 }
155
156 #define SF(bf) (NV40TCL_BLEND_FUNC_SRC_RGB_##bf |                              \
157                 NV40TCL_BLEND_FUNC_SRC_ALPHA_##bf)
158 #define DF(bf) (NV40TCL_BLEND_FUNC_DST_RGB_##bf |                              \
159                 NV40TCL_BLEND_FUNC_DST_ALPHA_##bf)
160 static nv_pict_op_t 
161 NV40PictOp[] = {
162 /* Clear       */ { 0, 0, SF(               ZERO), DF(               ZERO) },
163 /* Src         */ { 0, 0, SF(                ONE), DF(               ZERO) },
164 /* Dst         */ { 0, 0, SF(               ZERO), DF(                ONE) },
165 /* Over        */ { 1, 0, SF(                ONE), DF(ONE_MINUS_SRC_ALPHA) },
166 /* OverReverse */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF(                ONE) },
167 /* In          */ { 0, 1, SF(          DST_ALPHA), DF(               ZERO) },
168 /* InReverse   */ { 1, 0, SF(               ZERO), DF(          SRC_ALPHA) },
169 /* Out         */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF(               ZERO) },
170 /* OutReverse  */ { 1, 0, SF(               ZERO), DF(ONE_MINUS_SRC_ALPHA) },
171 /* Atop        */ { 1, 1, SF(          DST_ALPHA), DF(ONE_MINUS_SRC_ALPHA) },
172 /* AtopReverse */ { 1, 1, SF(ONE_MINUS_DST_ALPHA), DF(          SRC_ALPHA) },
173 /* Xor         */ { 1, 1, SF(ONE_MINUS_DST_ALPHA), DF(ONE_MINUS_SRC_ALPHA) },
174 /* Add         */ { 0, 0, SF(                ONE), DF(                ONE) }
175 };
176
177 static nv_pict_op_t *
178 NV40_GetPictOpRec(int op)
179 {
180         if (op >= PictOpSaturate)
181                 return NULL;
182         return &NV40PictOp[op];
183 }
184
185 static void
186 NV40_SetupBlend(ScrnInfoPtr pScrn, nv_pict_op_t *blend,
187                 PictFormatShort dest_format, Bool component_alpha)
188 {
189         NVPtr pNv = NVPTR(pScrn);
190         struct nouveau_channel *chan = pNv->chan;
191         struct nouveau_grobj *curie = pNv->Nv3D;
192         uint32_t sblend, dblend;
193
194         sblend = blend->src_card_op;
195         dblend = blend->dst_card_op;
196
197         if (blend->dst_alpha) {
198                 if (!PICT_FORMAT_A(dest_format)) {
199                         if (sblend == SF(DST_ALPHA)) {
200                                 sblend = SF(ONE);
201                         } else if (sblend == SF(ONE_MINUS_DST_ALPHA)) {
202                                 sblend = SF(ZERO);
203                         }
204                 } else if (dest_format == PICT_a8) {
205                         if (sblend == SF(DST_ALPHA)) {
206                                 sblend = SF(DST_COLOR);
207                         } else if (sblend == SF(ONE_MINUS_DST_ALPHA)) {
208                                 sblend = SF(ONE_MINUS_DST_COLOR);
209                         }
210                 }
211         }
212
213         if (blend->src_alpha && (component_alpha || dest_format == PICT_a8)) {
214                 if (dblend == DF(SRC_ALPHA)) {
215                         dblend = DF(SRC_COLOR);
216                 } else if (dblend == DF(ONE_MINUS_SRC_ALPHA)) {
217                         dblend = DF(ONE_MINUS_SRC_COLOR);
218                 }
219         }
220
221         if (sblend == SF(ONE) && dblend == DF(ZERO)) {
222                 BEGIN_RING(chan, curie, NV40TCL_BLEND_ENABLE, 1);
223                 OUT_RING  (chan, 0);
224         } else {
225                 BEGIN_RING(chan, curie, NV40TCL_BLEND_ENABLE, 5);
226                 OUT_RING  (chan, 1);
227                 OUT_RING  (chan, sblend);
228                 OUT_RING  (chan, dblend);
229                 OUT_RING  (chan, 0x00000000);
230                 OUT_RING  (chan, NV40TCL_BLEND_EQUATION_ALPHA_FUNC_ADD |
231                            NV40TCL_BLEND_EQUATION_RGB_FUNC_ADD);
232         }
233 }
234
235 static Bool
236 NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
237 {
238         NVPtr pNv = NVPTR(pScrn);
239         struct nouveau_channel *chan = pNv->chan;
240         struct nouveau_grobj *curie = pNv->Nv3D;
241         nv_pict_texture_format_t *fmt;
242         NV40EXA_STATE;
243
244         fmt = NV40_GetPictTextureFormat(pPict->format);
245         if (!fmt)
246                 return FALSE;
247
248         BEGIN_RING(chan, curie, NV40TCL_TEX_OFFSET(unit), 8);
249         OUT_PIXMAPl(chan, pPix, 0,
250                           NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
251         OUT_PIXMAPd(chan, pPix, fmt->card_fmt | NV40TCL_TEX_FORMAT_LINEAR |
252                           NV40TCL_TEX_FORMAT_DIMS_2D | 0x8000 |
253                           NV40TCL_TEX_FORMAT_NO_BORDER |
254                           (1 << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT),
255                           NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD,
256                           NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
257         if (pPict->repeat) {
258                 switch(pPict->repeatType) {
259                 case RepeatPad:
260                         OUT_RING  (chan, NV40TCL_TEX_WRAP_S_CLAMP | 
261                                          NV40TCL_TEX_WRAP_T_CLAMP |
262                                          NV40TCL_TEX_WRAP_R_CLAMP);
263                         break;
264                 case RepeatReflect:
265                         OUT_RING  (chan, NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT |
266                                          NV40TCL_TEX_WRAP_T_MIRRORED_REPEAT |
267                                          NV40TCL_TEX_WRAP_R_MIRRORED_REPEAT);
268                         break;
269                 case RepeatNormal:
270                 default:
271                         OUT_RING  (chan, NV40TCL_TEX_WRAP_S_REPEAT |
272                                          NV40TCL_TEX_WRAP_T_REPEAT |
273                                          NV40TCL_TEX_WRAP_R_REPEAT);
274                         break;
275                 }
276         } else {
277                 OUT_RING  (chan, NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER |
278                                  NV40TCL_TEX_WRAP_T_CLAMP_TO_BORDER |
279                                  NV40TCL_TEX_WRAP_R_CLAMP_TO_BORDER);
280         }
281         OUT_RING  (chan, NV40TCL_TEX_ENABLE_ENABLE);
282         OUT_RING  (chan, fmt->card_swz);
283         if (pPict->filter == PictFilterBilinear) {
284                 OUT_RING  (chan, NV40TCL_TEX_FILTER_MIN_LINEAR |
285                                  NV40TCL_TEX_FILTER_MAG_LINEAR | 0x3fd6);
286         } else {
287                 OUT_RING  (chan, NV40TCL_TEX_FILTER_MIN_NEAREST |
288                                  NV40TCL_TEX_FILTER_MAG_NEAREST | 0x3fd6);
289         }
290         OUT_RING  (chan, (pPix->drawable.width << 16) | pPix->drawable.height);
291         OUT_RING  (chan, 0); /* border ARGB */
292         BEGIN_RING(chan, curie, NV40TCL_TEX_SIZE1(unit), 1);
293         OUT_RING  (chan, (1 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) |
294                          (uint32_t)exaGetPixmapPitch(pPix));
295
296         state->unit[unit].width         = (float)pPix->drawable.width;
297         state->unit[unit].height        = (float)pPix->drawable.height;
298         state->unit[unit].transform     = pPict->transform;
299         return TRUE;
300 }
301
302 static Bool
303 NV40_SetupSurface(ScrnInfoPtr pScrn, PixmapPtr pPix, PictFormatShort format)
304 {
305         NVPtr pNv = NVPTR(pScrn);
306         struct nouveau_channel *chan = pNv->chan;
307         struct nouveau_grobj *curie = pNv->Nv3D;
308         nv_pict_surface_format_t *fmt;
309
310         fmt = NV40_GetPictSurfaceFormat(format);
311         if (!fmt) {
312                 ErrorF("AIII no format\n");
313                 return FALSE;
314         }
315
316         BEGIN_RING(chan, curie, NV40TCL_RT_FORMAT, 3);
317         OUT_RING  (chan, NV40TCL_RT_FORMAT_TYPE_LINEAR |
318                    NV40TCL_RT_FORMAT_ZETA_Z24S8 |
319                    fmt->card_fmt);
320         OUT_RING  (chan, exaGetPixmapPitch(pPix));
321         OUT_PIXMAPl(chan, pPix, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
322
323         return TRUE;
324 }
325
326 static Bool
327 NV40EXACheckCompositeTexture(PicturePtr pPict)
328 {
329         nv_pict_texture_format_t *fmt;
330         int w = pPict->pDrawable->width;
331         int h = pPict->pDrawable->height;
332
333         if ((w > 4096) || (h > 4096))
334                 NOUVEAU_FALLBACK("picture too large, %dx%d\n", w, h);
335
336         fmt = NV40_GetPictTextureFormat(pPict->format);
337         if (!fmt)
338                 NOUVEAU_FALLBACK("picture format 0x%08x not supported\n",
339                                 pPict->format);
340
341         if (pPict->filter != PictFilterNearest &&
342             pPict->filter != PictFilterBilinear)
343                 NOUVEAU_FALLBACK("filter 0x%x not supported\n", pPict->filter);
344
345         return TRUE;
346 }
347
348 Bool
349 NV40EXACheckComposite(int op, PicturePtr psPict,
350                               PicturePtr pmPict,
351                               PicturePtr pdPict)
352 {
353         nv_pict_surface_format_t *fmt;
354         nv_pict_op_t *opr;
355
356         opr = NV40_GetPictOpRec(op);
357         if (!opr)
358                 NOUVEAU_FALLBACK("unsupported blend op 0x%x\n", op);
359
360         fmt = NV40_GetPictSurfaceFormat(pdPict->format);
361         if (!fmt)
362                 NOUVEAU_FALLBACK("dst picture format 0x%08x not supported\n",
363                                 pdPict->format);
364
365         if (!NV40EXACheckCompositeTexture(psPict))
366                 NOUVEAU_FALLBACK("src picture\n");
367         if (pmPict) {
368                 if (pmPict->componentAlpha && 
369                     PICT_FORMAT_RGB(pmPict->format) &&
370                     opr->src_alpha && opr->src_card_op != SF(ZERO))
371                         NOUVEAU_FALLBACK("mask CA + SA\n");
372                 if (!NV40EXACheckCompositeTexture(pmPict))
373                         NOUVEAU_FALLBACK("mask picture\n");
374         }
375
376         return TRUE;
377 }
378
379 Bool
380 NV40EXAPrepareComposite(int op, PicturePtr psPict,
381                                 PicturePtr pmPict,
382                                 PicturePtr pdPict,
383                                 PixmapPtr  psPix,
384                                 PixmapPtr  pmPix,
385                                 PixmapPtr  pdPix)
386 {
387         ScrnInfoPtr pScrn = xf86Screens[psPix->drawable.pScreen->myNum];
388         NVPtr pNv = NVPTR(pScrn);
389         struct nouveau_channel *chan = pNv->chan;
390         struct nouveau_grobj *curie = pNv->Nv3D;
391         nv_pict_op_t *blend;
392         int fpid = NV40EXA_FPID_PASS_COL0;
393         NV40EXA_STATE;
394
395         blend = NV40_GetPictOpRec(op);
396
397         NV40_SetupBlend(pScrn, blend, pdPict->format,
398                         (pmPict && pmPict->componentAlpha &&
399                          PICT_FORMAT_RGB(pmPict->format)));
400
401         NV40_SetupSurface(pScrn, pdPix, pdPict->format);
402         NV40EXATexture(pScrn, psPix, psPict, 0);
403
404         NV40_LoadVtxProg(pScrn, &nv40_vp_exa_render);
405         if (pmPict) {
406                 NV40EXATexture(pScrn, pmPix, pmPict, 1);
407
408                 if (pmPict->componentAlpha && PICT_FORMAT_RGB(pmPict->format)) {
409                         if (blend->src_alpha)
410                                 fpid = NV40EXA_FPID_COMPOSITE_MASK_SA_CA;
411                         else
412                                 fpid = NV40EXA_FPID_COMPOSITE_MASK_CA;
413                 } else {
414                         fpid = NV40EXA_FPID_COMPOSITE_MASK;
415                 }
416
417                 state->have_mask = TRUE;
418         } else {
419                 fpid = NV40EXA_FPID_PASS_TEX0;
420
421                 state->have_mask = FALSE;
422         }
423
424         if (pdPict->format == PICT_a8)
425                 NV40_LoadFragProg(pScrn, nv40_fp_map_a8[fpid]);
426         else
427                 NV40_LoadFragProg(pScrn, nv40_fp_map[fpid]);
428
429         /* Appears to be some kind of cache flush, needed here at least
430          * sometimes.. funky text rendering otherwise :)
431          */
432         BEGIN_RING(chan, curie, NV40TCL_TEX_CACHE_CTL, 1);
433         OUT_RING  (chan, 2);
434         BEGIN_RING(chan, curie, NV40TCL_TEX_CACHE_CTL, 1);
435         OUT_RING  (chan, 1);
436
437         BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1);
438         OUT_RING  (chan, NV40TCL_BEGIN_END_TRIANGLES);
439
440         return TRUE;
441 }
442
443 #define xFixedToFloat(v) \
444         ((float)xFixedToInt((v)) + ((float)xFixedFrac(v) / 65536.0))
445
446 static inline void
447 NV40EXATransformCoord(PictTransformPtr t, int x, int y, float sx, float sy,
448                                           float *x_ret, float *y_ret)
449 {
450         if (t) {
451                 PictVector v;
452                 v.vector[0] = IntToxFixed(x);
453                 v.vector[1] = IntToxFixed(y);
454                 v.vector[2] = xFixed1;
455                 PictureTransformPoint(t, &v);
456                 *x_ret = xFixedToFloat(v.vector[0]) / sx;
457                 *y_ret = xFixedToFloat(v.vector[1]) / sy;
458         } else {
459                 *x_ret = (float)x / sx;
460                 *y_ret = (float)y / sy;
461         }
462 }
463
464 #define CV_OUTm(sx,sy,mx,my,dx,dy) do {                                        \
465         BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_2F_X(8), 4);                  \
466         OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy));                        \
467         OUT_RINGf (chan, (mx)); OUT_RINGf (chan, (my));                        \
468         BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_2I(0), 1);                    \
469         OUT_RING  (chan, ((dy)<<16)|(dx));                                     \
470 } while(0)
471 #define CV_OUT(sx,sy,dx,dy) do {                                               \
472         BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_2F_X(8), 2);                  \
473         OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy));                        \
474         BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_2I(0), 1);                    \
475         OUT_RING  (chan, ((dy)<<16)|(dx));                                     \
476 } while(0)
477
478 void
479 NV40EXAComposite(PixmapPtr pdPix, int srcX , int srcY,
480                                   int maskX, int maskY,
481                                   int dstX , int dstY,
482                                   int width, int height)
483 {
484         ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum];
485         NVPtr pNv = NVPTR(pScrn);
486         struct nouveau_channel *chan = pNv->chan;
487         struct nouveau_grobj *curie = pNv->Nv3D;
488         float sX0, sX1, sX2, sY0, sY1, sY2;
489         float mX0, mX1, mX2, mY0, mY1, mY2;
490         NV40EXA_STATE;
491
492         /* We're drawing a triangle, we need to scissor it to a quad. */
493         /* The scissors are here for a good reason, we don't get the full
494          * image, but just a part.
495          */
496         /* Handling the cliprects is done for us already. */
497         BEGIN_RING(chan, curie, NV40TCL_SCISSOR_HORIZ, 2);
498         OUT_RING  (chan, (width << 16) | dstX);
499         OUT_RING  (chan, (height << 16) | dstY);
500
501         NV40EXATransformCoord(state->unit[0].transform, srcX, srcY - height,
502                               state->unit[0].width, state->unit[0].height,
503                               &sX0, &sY0);
504         NV40EXATransformCoord(state->unit[0].transform, srcX, srcY + height,
505                               state->unit[0].width, state->unit[0].height,
506                               &sX1, &sY1);
507         NV40EXATransformCoord(state->unit[0].transform,
508                               srcX + 2*width, srcY + height,
509                               state->unit[0].width,
510                               state->unit[0].height, &sX2, &sY2);
511
512         if (state->have_mask) {
513                 NV40EXATransformCoord(state->unit[1].transform,
514                                       maskX, maskY - height,
515                                       state->unit[1].width,
516                                       state->unit[1].height, &mX0, &mY0);
517                 NV40EXATransformCoord(state->unit[1].transform,
518                                       maskX, maskY + height,
519                                       state->unit[1].width,
520                                       state->unit[1].height, &mX1, &mY1);
521                 NV40EXATransformCoord(state->unit[1].transform,
522                                       maskX + 2*width, maskY + height,
523                                       state->unit[1].width,
524                                       state->unit[1].height, &mX2, &mY2);
525
526                 CV_OUTm(sX0, sY0, mX0, mY0, dstX, dstY - height);
527                 CV_OUTm(sX1, sY1, mX1, mY1, dstX, dstY + height);
528                 CV_OUTm(sX2, sY2, mX2, mY2, dstX + 2*width, dstY + height);
529         } else {
530                 CV_OUT(sX0, sY0, dstX, dstY - height);
531                 CV_OUT(sX1, sY1, dstX, dstY + height);
532                 CV_OUT(sX2, sY2, dstX + 2*width, dstY + height);
533         }
534 }
535
536 void
537 NV40EXADoneComposite(PixmapPtr pdPix)
538 {
539         ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum];
540         NVPtr pNv = NVPTR(pScrn);
541         struct nouveau_channel *chan = pNv->chan;
542         struct nouveau_grobj *curie = pNv->Nv3D;
543
544         BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1);
545         OUT_RING  (chan, NV40TCL_BEGIN_END_STOP);
546
547         FIRE_RING (chan);
548 }
549
550 #define NV40TCL_CHIPSET_4X_MASK 0x00000baf
551 #define NV44TCL_CHIPSET_4X_MASK 0x00005450
552 Bool
553 NVAccelInitNV40TCL(ScrnInfoPtr pScrn)
554 {
555         NVPtr pNv = NVPTR(pScrn);
556         struct nouveau_channel *chan = pNv->chan;
557         struct nouveau_grobj *curie;
558         uint32_t class = 0, chipset;
559         int i;
560
561         NV40EXAHackupA8Shaders(pScrn);
562
563         chipset = (nvReadMC(pNv, NV_PMC_BOOT_0) >> 20) & 0xff;
564
565         if ( (chipset & 0xf0) == NV_ARCH_40) {
566                 chipset &= 0xf;
567                 if (NV40TCL_CHIPSET_4X_MASK & (1<<chipset))
568                         class = NV40TCL;
569                 else if (NV44TCL_CHIPSET_4X_MASK & (1<<chipset))
570                         class = NV44TCL;
571                 else {
572                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
573                                         "NV40EXA: Unknown chipset NV4%1x\n", chipset);
574                         return FALSE;
575                 }
576         } else if ( (chipset & 0xf0) == 0x60) {
577                 class = NV44TCL;
578         } else
579                 return TRUE;
580
581         if (!pNv->Nv3D) {
582                 if (nouveau_grobj_alloc(pNv->chan, Nv3D, class, &pNv->Nv3D))
583                         return FALSE;
584         }
585         curie = pNv->Nv3D;
586
587         BEGIN_RING(chan, curie, NV40TCL_DMA_NOTIFY, 1);
588         OUT_RING  (chan, pNv->notify0->handle);
589         BEGIN_RING(chan, curie, NV40TCL_DMA_TEXTURE0, 2);
590         OUT_RING  (chan, pNv->chan->vram->handle);
591         OUT_RING  (chan, pNv->chan->gart->handle);
592         BEGIN_RING(chan, curie, NV40TCL_DMA_COLOR0, 2);
593         OUT_RING  (chan, pNv->chan->vram->handle);
594         OUT_RING  (chan, pNv->chan->vram->handle);
595
596         /* voodoo */
597         BEGIN_RING(chan, curie, 0x1ea4, 3);
598         OUT_RING  (chan, 0x00000010);
599         OUT_RING  (chan, 0x01000100);
600         OUT_RING  (chan, 0xff800006);
601         BEGIN_RING(chan, curie, 0x1fc4, 1);
602         OUT_RING  (chan, 0x06144321);
603         BEGIN_RING(chan, curie, 0x1fc8, 2);
604         OUT_RING  (chan, 0xedcba987);
605         OUT_RING  (chan, 0x00000021);
606         BEGIN_RING(chan, curie, 0x1fd0, 1);
607         OUT_RING  (chan, 0x00171615);
608         BEGIN_RING(chan, curie, 0x1fd4, 1);
609         OUT_RING  (chan, 0x001b1a19);
610         BEGIN_RING(chan, curie, 0x1ef8, 1);
611         OUT_RING  (chan, 0x0020ffff);
612         BEGIN_RING(chan, curie, 0x1d64, 1);
613         OUT_RING  (chan, 0x00d30000);
614         BEGIN_RING(chan, curie, 0x1e94, 1);
615         OUT_RING  (chan, 0x00000001);
616
617         /* This removes the the stair shaped tearing that i get. */
618         /* Verified on one G70 card that it doesn't cause regressions for people without the problem. */
619         /* The blob sets this up by default for NV43. */
620         BEGIN_RING(chan, curie, 0x1450, 1);
621         OUT_RING  (chan, 0x0000000F);
622
623         BEGIN_RING(chan, curie, NV40TCL_VIEWPORT_TRANSLATE_X, 8);
624         OUT_RINGf (chan, 0.0);
625         OUT_RINGf (chan, 0.0);
626         OUT_RINGf (chan, 0.0);
627         OUT_RINGf (chan, 0.0);
628         OUT_RINGf (chan, 1.0);
629         OUT_RINGf (chan, 1.0);
630         OUT_RINGf (chan, 1.0);
631         OUT_RINGf (chan, 0.0);
632
633         /* default 3D state */
634         /*XXX: replace with the same state that the DRI emits on startup */
635         BEGIN_RING(chan, curie, NV40TCL_STENCIL_FRONT_ENABLE, 1);
636         OUT_RING  (chan, 0);
637         BEGIN_RING(chan, curie, NV40TCL_STENCIL_BACK_ENABLE, 1);
638         OUT_RING  (chan, 0);
639         BEGIN_RING(chan, curie, NV40TCL_ALPHA_TEST_ENABLE, 1);
640         OUT_RING  (chan, 0);
641         BEGIN_RING(chan, curie, NV40TCL_DEPTH_WRITE_ENABLE, 2);
642         OUT_RING  (chan, 0);
643         OUT_RING  (chan, 0); 
644         BEGIN_RING(chan, curie, NV40TCL_COLOR_MASK, 1);
645         OUT_RING  (chan, 0x01010101); /* TR,TR,TR,TR */
646         BEGIN_RING(chan, curie, NV40TCL_CULL_FACE_ENABLE, 1);
647         OUT_RING  (chan, 0);
648         BEGIN_RING(chan, curie, NV40TCL_BLEND_ENABLE, 1);
649         OUT_RING  (chan, 0);
650         BEGIN_RING(chan, curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 2);
651         OUT_RING  (chan, 0);
652         OUT_RING  (chan, NV40TCL_COLOR_LOGIC_OP_COPY);
653         BEGIN_RING(chan, curie, NV40TCL_DITHER_ENABLE, 1);
654         OUT_RING  (chan, 0);
655         BEGIN_RING(chan, curie, NV40TCL_SHADE_MODEL, 1);
656         OUT_RING  (chan, NV40TCL_SHADE_MODEL_SMOOTH);
657         BEGIN_RING(chan, curie, NV40TCL_POLYGON_OFFSET_FACTOR,2);
658         OUT_RINGf (chan, 0.0);
659         OUT_RINGf (chan, 0.0);
660         BEGIN_RING(chan, curie, NV40TCL_POLYGON_MODE_FRONT, 2);
661         OUT_RING  (chan, NV40TCL_POLYGON_MODE_FRONT_FILL);
662         OUT_RING  (chan, NV40TCL_POLYGON_MODE_BACK_FILL);
663         BEGIN_RING(chan, curie, NV40TCL_POLYGON_STIPPLE_PATTERN(0), 0x20);
664         for (i=0;i<0x20;i++)
665                 OUT_RING  (chan, 0xFFFFFFFF);
666         for (i=0;i<16;i++) {
667                 BEGIN_RING(chan, curie, NV40TCL_TEX_ENABLE(i), 1);
668                 OUT_RING  (chan, 0);
669         }
670
671         BEGIN_RING(chan, curie, 0x1d78, 1);
672         OUT_RING  (chan, 0x110);
673
674         BEGIN_RING(chan, curie, NV40TCL_RT_ENABLE, 1);
675         OUT_RING  (chan, NV40TCL_RT_ENABLE_COLOR0);
676
677         BEGIN_RING(chan, curie, NV40TCL_RT_HORIZ, 2);
678         OUT_RING  (chan, (4096 << 16));
679         OUT_RING  (chan, (4096 << 16));
680         BEGIN_RING(chan, curie, NV40TCL_SCISSOR_HORIZ, 2);
681         OUT_RING  (chan, (4096 << 16));
682         OUT_RING  (chan, (4096 << 16));
683         BEGIN_RING(chan, curie, NV40TCL_VIEWPORT_HORIZ, 2);
684         OUT_RING  (chan, (4096 << 16));
685         OUT_RING  (chan, (4096 << 16));
686         BEGIN_RING(chan, curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
687         OUT_RING  (chan, (4095 << 16));
688         OUT_RING  (chan, (4095 << 16));
689
690         return TRUE;
691 }
692