git.oblomov.eu Git - nouveau/blob - src/nv_shaders.h

   1 #ifndef __NV_SHADERS_H__
   2 #define __NV_SHADERS_H__
   3
   4 #define NV_SHADER_MAX_PROGRAM_LENGTH 256
   5
   6 typedef struct nv_shader {
   7         uint32_t hw_id;
   8         uint32_t size;
   9         union {
  10                 struct {
  11                         uint32_t vp_in_reg;
  12                         uint32_t vp_out_reg;
  13                 } NV30VP;
  14                 struct  {
  15                         uint32_t num_regs;
  16                 } NV30FP;
  17         } card_priv;
  18         uint32_t data[NV_SHADER_MAX_PROGRAM_LENGTH];
  19 } nv_shader_t;
  20
  21 static void
  22 NV40_LoadVtxProg(ScrnInfoPtr pScrn, nv_shader_t *shader)
  23 {
  24         NVPtr pNv = NVPTR(pScrn);
  25         static int next_hw_id = 0;
  26         int i;
  27
  28         if (!shader->hw_id) {
  29                 shader->hw_id = next_hw_id;
  30
  31                 BEGIN_RING(Nv3D, NV40TCL_VP_UPLOAD_FROM_ID, 1);
  32                 OUT_RING  ((shader->hw_id));
  33                 for (i=0; i<shader->size; i+=4) {
  34                         BEGIN_RING(Nv3D, NV40TCL_VP_UPLOAD_INST(0), 4);
  35                         OUT_RING  (shader->data[i + 0]);
  36                         OUT_RING  (shader->data[i + 1]);
  37                         OUT_RING  (shader->data[i + 2]);
  38                         OUT_RING  (shader->data[i + 3]);
  39                         next_hw_id++;
  40                 }
  41         }
  42
  43         BEGIN_RING(Nv3D, NV40TCL_VP_START_FROM_ID, 1);
  44         OUT_RING  ((shader->hw_id));
  45
  46         BEGIN_RING(Nv3D, NV40TCL_VP_ATTRIB_EN, 2);
  47         OUT_RING  (shader->card_priv.NV30VP.vp_in_reg);
  48         OUT_RING  (shader->card_priv.NV30VP.vp_out_reg);
  49 }
  50
  51 static void
  52 NV40_LoadFragProg(ScrnInfoPtr pScrn, nv_shader_t *shader)
  53 {
  54         NVPtr pNv = NVPTR(pScrn);
  55         static struct nouveau_bo *fp_mem = NULL;
  56         static int next_hw_id_offset = 0;
  57
  58         if (!fp_mem) {
  59                 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART,
  60                                 0, 0x1000, &fp_mem)) {
  61                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
  62                                 "Couldn't alloc fragprog buffer!\n");
  63                         return;
  64                 }
  65
  66                 if (nouveau_bo_map(fp_mem, NOUVEAU_BO_RDWR)) {
  67                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
  68                                    "Couldn't map fragprog buffer!\n");
  69                 }
  70         }
  71
  72         if (!shader->hw_id) {
  73                 uint32_t *map = fp_mem->map + next_hw_id_offset;
  74                 int i;
  75
  76                 for (i = 0; i < shader->size; i++) {
  77                         uint32_t data = shader->data[i];
  78 #if (X_BYTE_ORDER != X_LITTLE_ENDIAN)
  79                         data = ((data >> 16) | ((data & 0xffff) << 16));
  80 #endif
  81                         map[i] = data;
  82                 }
  83
  84                 shader->hw_id = next_hw_id_offset;
  85                 next_hw_id_offset += (shader->size * sizeof(uint32_t));
  86                 next_hw_id_offset = (next_hw_id_offset + 63) & ~63;
  87         }
  88
  89         BEGIN_RING(Nv3D, NV40TCL_FP_ADDRESS, 1);
  90         OUT_RELOC (fp_mem, shader->hw_id, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
  91                    NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
  92                    NV40TCL_FP_ADDRESS_DMA0, NV40TCL_FP_ADDRESS_DMA1);
  93         BEGIN_RING(Nv3D, NV40TCL_FP_CONTROL, 1);
  94         OUT_RING  (shader->card_priv.NV30FP.num_regs <<
  95                    NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT);
  96 }
  97
  98 /*******************************************************************************
  99  * NV40/G70 vertex shaders
 100  */
 101
 102 static nv_shader_t nv40_vp_exa_render = {
 103   .card_priv.NV30VP.vp_in_reg  = 0x00000309,
 104   .card_priv.NV30VP.vp_out_reg = 0x0000c001,
 105   .size = (3*4),
 106   .data = {
 107     /* MOV result.position, vertex.position */
 108     0x40041c6c, 0x0040000d, 0x8106c083, 0x6041ff80,
 109     /* MOV result.texcoord[0], vertex.texcoord[0] */
 110     0x401f9c6c, 0x0040080d, 0x8106c083, 0x6041ff9c,
 111     /* MOV result.texcoord[1], vertex.texcoord[1] */
 112     0x401f9c6c, 0x0040090d, 0x8106c083, 0x6041ffa1,
 113   }
 114 };
 115
 116 /*******************************************************************************
 117  * NV30/NV40/G70 fragment shaders
 118  */
 119
 120 static nv_shader_t nv30_fp_pass_col0 = {
 121   .card_priv.NV30FP.num_regs = 2,
 122   .size = (1*4),
 123   .data = {
 124     /* MOV R0, fragment.color */
 125     0x01403e81, 0x1c9dc801, 0x0001c800, 0x3fe1c800,
 126   }
 127 };
 128
 129 static nv_shader_t nv30_fp_pass_tex0 = {
 130   .card_priv.NV30FP.num_regs = 2,
 131   .size = (2*4),
 132   .data = {
 133     /* TEX R0, fragment.texcoord[0], texture[0], 2D */
 134     0x17009e00, 0x1c9dc801, 0x0001c800, 0x3fe1c800,
 135     /* MOV R0, R0 */
 136     0x01401e81, 0x1c9dc800, 0x0001c800, 0x0001c800,
 137   }
 138 };
 139
 140 static nv_shader_t nv30_fp_composite_mask = {
 141   .card_priv.NV30FP.num_regs = 2,
 142   .size = (3*4),
 143   .data = {
 144     /* TEXC0 R1.w         , fragment.texcoord[1], texture[1], 2D */
 145     0x1702b102, 0x1c9dc801, 0x0001c800, 0x3fe1c800,
 146     /* TEX   R0 (NE0.wwww), fragment.texcoord[0], texture[0], 2D */
 147     0x17009e00, 0x1ff5c801, 0x0001c800, 0x3fe1c800,
 148     /* MUL   R0           , R0, R1.w */
 149     0x02001e81, 0x1c9dc800, 0x0001fe04, 0x0001c800,
 150   }
 151 };
 152
 153 static nv_shader_t nv30_fp_composite_mask_sa_ca = {
 154   .card_priv.NV30FP.num_regs = 2,
 155   .size = (3*4),
 156   .data = {
 157     /* TEXC0 R1.w         , fragment.texcoord[0], texture[0], 2D */
 158     0x17009102, 0x1c9dc801, 0x0001c800, 0x3fe1c800,
 159     /* TEX   R0 (NE0.wwww), fragment.texcoord[1], texture[1], 2D */
 160     0x1702be00, 0x1ff5c801, 0x0001c800, 0x3fe1c800,
 161     /* MUL   R0           , R1,wwww, R0 */
 162     0x02001e81, 0x1c9dfe04, 0x0001c800, 0x0001c800,
 163   }
 164 };
 165
 166 static nv_shader_t nv30_fp_composite_mask_ca = {
 167   .card_priv.NV30FP.num_regs = 2,
 168   .size = (3*4),
 169   .data = {
 170     /* TEXC0 R0           , fragment.texcoord[0], texture[0], 2D */
 171     0x17009f00, 0x1c9dc801, 0x0001c800, 0x3fe1c800,
 172     /* TEX   R1 (NE0.xyzw), fragment.texcoord[1], texture[1], 2D */
 173     0x1702be02, 0x1c95c801, 0x0001c800, 0x3fe1c800,
 174     /* MUL   R0           , R0, R1 */
 175     0x02001e81, 0x1c9dc800, 0x0001c804, 0x0001c800,
 176   }
 177 };
 178
 179 #endif