git.oblomov.eu Git - nouveau/blob - src/nv_driver.c

   1 /* $XdotOrg: driver/xf86-video-nv/src/nv_driver.c,v 1.21 2006/01/24 16:45:29 aplattner Exp $ */
   2 /* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
   3 /*
   4  * Copyright 1996-1997  David J. McKay
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  20  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  21  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  */
  24
  25 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
  26    <jpaana@s2.org> */
  27
  28 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.144 2006/06/16 00:19:32 mvojkovi Exp $ */
  29
  30 #include <stdio.h>
  31
  32 #include "nv_include.h"
  33
  34 #include "xf86int10.h"
  35
  36 #include "xf86drm.h"
  37
  38 extern DisplayModePtr xf86ModesAdd(DisplayModePtr Modes, DisplayModePtr Additions);
  39
  40 /*
  41  * Forward definitions for the functions that make up the driver.
  42  */
  43 /* Mandatory functions */
  44 static const OptionInfoRec * NVAvailableOptions(int chipid, int busid);
  45 static void    NVIdentify(int flags);
  46 #ifndef XSERVER_LIBPCIACCESS
  47 static Bool    NVProbe(DriverPtr drv, int flags);
  48 #endif /* XSERVER_LIBPCIACCESS */
  49 static Bool    NVPreInit(ScrnInfoPtr pScrn, int flags);
  50 static Bool    NVScreenInit(int Index, ScreenPtr pScreen, int argc,
  51                             char **argv);
  52 static Bool    NVEnterVT(int scrnIndex, int flags);
  53 static void    NVLeaveVT(int scrnIndex, int flags);
  54 static Bool    NVCloseScreen(int scrnIndex, ScreenPtr pScreen);
  55 static Bool    NVSaveScreen(ScreenPtr pScreen, int mode);
  56
  57 /* Optional functions */
  58 static void    NVFreeScreen(int scrnIndex, int flags);
  59 static ModeStatus NVValidMode(int scrnIndex, DisplayModePtr mode,
  60                               Bool verbose, int flags);
  61 static Bool    NVDriverFunc(ScrnInfoPtr pScrnInfo, xorgDriverFuncOp op,
  62                               pointer data);
  63
  64 /* Internally used functions */
  65
  66 static Bool     NVMapMem(ScrnInfoPtr pScrn);
  67 static Bool     NVUnmapMem(ScrnInfoPtr pScrn);
  68 static void     NVSave(ScrnInfoPtr pScrn);
  69 static void     NVRestore(ScrnInfoPtr pScrn);
  70 static Bool     NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
  71
  72 #ifdef XSERVER_LIBPCIACCESS
  73
  74 #define NOUVEAU_PCI_DEVICE(_vendor_id, _device_id) \
  75         { (_vendor_id), (_device_id), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x00030000, 0x00ffffff, 0 }
  76
  77 static const struct pci_id_match nouveau_device_match[] = {
  78         NOUVEAU_PCI_DEVICE(PCI_VENDOR_NVIDIA, PCI_MATCH_ANY),
  79         NOUVEAU_PCI_DEVICE(PCI_VENDOR_NVIDIA_SGS, PCI_MATCH_ANY),
  80         { 0, 0, 0 },
  81 };
  82
  83 static Bool NVPciProbe (        DriverPtr               drv,
  84                                 int                     entity_num,
  85                                 struct pci_device       *dev,
  86                                 intptr_t                match_data      );
  87
  88 #endif /* XSERVER_LIBPCIACCESS */
  89
  90 /*
  91  * This contains the functions needed by the server after loading the
  92  * driver module.  It must be supplied, and gets added the driver list by
  93  * the Module Setup funtion in the dynamic case.  In the static case a
  94  * reference to this is compiled in, and this requires that the name of
  95  * this DriverRec be an upper-case version of the driver name.
  96  */
  97
  98 _X_EXPORT DriverRec NV = {
  99         NV_VERSION,
 100         NV_DRIVER_NAME,
 101         NVIdentify,
 102 #ifdef XSERVER_LIBPCIACCESS
 103         NULL,
 104 #else
 105         NVProbe,
 106 #endif /* XSERVER_LIBPCIACCESS */
 107         NVAvailableOptions,
 108         NULL,
 109         0,
 110         NULL,
 111 #ifdef XSERVER_LIBPCIACCESS
 112         nouveau_device_match,
 113         NVPciProbe
 114 #endif /* XSERVER_LIBPCIACCESS */
 115 };
 116
 117 struct NvFamily
 118 {
 119   char *name;
 120   char *chipset;
 121 };
 122
 123 static struct NvFamily NVKnownFamilies[] =
 124 {
 125   { "RIVA TNT",    "NV04" },
 126   { "RIVA TNT2",   "NV05" },
 127   { "GeForce 256", "NV10" },
 128   { "GeForce 2",   "NV11, NV15" },
 129   { "GeForce 4MX", "NV17, NV18" },
 130   { "GeForce 3",   "NV20" },
 131   { "GeForce 4Ti", "NV25, NV28" },
 132   { "GeForce FX",  "NV3x" },
 133   { "GeForce 6",   "NV4x" },
 134   { "GeForce 7",   "G7x" },
 135   { "GeForce 8",   "G8x" },
 136   { NULL, NULL}
 137 };
 138
 139 /*
 140  * List of symbols from other modules that this module references.  This
 141  * list is used to tell the loader that it is OK for symbols here to be
 142  * unresolved providing that it hasn't been told that they haven't been
 143  * told that they are essential via a call to xf86LoaderReqSymbols() or
 144  * xf86LoaderReqSymLists().  The purpose is this is to avoid warnings about
 145  * unresolved symbols that are not required.
 146  */
 147
 148 static const char *vgahwSymbols[] = {
 149     "vgaHWUnmapMem",
 150     "vgaHWDPMSSet",
 151     "vgaHWFreeHWRec",
 152     "vgaHWGetHWRec",
 153     "vgaHWGetIndex",
 154     "vgaHWInit",
 155     "vgaHWMapMem",
 156     "vgaHWProtect",
 157     "vgaHWRestore",
 158     "vgaHWSave",
 159     "vgaHWSaveScreen",
 160     NULL
 161 };
 162
 163 static const char *fbSymbols[] = {
 164     "fbPictureInit",
 165     "fbScreenInit",
 166     NULL
 167 };
 168
 169 static const char *exaSymbols[] = {
 170     "exaDriverInit",
 171     "exaOffscreenInit",
 172     NULL
 173 };
 174
 175 static const char *ramdacSymbols[] = {
 176     "xf86CreateCursorInfoRec",
 177     "xf86DestroyCursorInfoRec",
 178     "xf86InitCursor",
 179     NULL
 180 };
 181
 182 static const char *ddcSymbols[] = {
 183     "xf86PrintEDID",
 184     "xf86DoEDID_DDC2",
 185     "xf86SetDDCproperties",
 186     NULL
 187 };
 188
 189 static const char *vbeSymbols[] = {
 190     "VBEInit",
 191     "vbeFree",
 192     "vbeDoEDID",
 193     NULL
 194 };
 195
 196 static const char *i2cSymbols[] = {
 197     "xf86CreateI2CBusRec",
 198     "xf86I2CBusInit",
 199     NULL
 200 };
 201
 202 static const char *shadowSymbols[] = {
 203     "ShadowFBInit",
 204     NULL
 205 };
 206
 207 static const char *int10Symbols[] = {
 208     "xf86FreeInt10",
 209     "xf86InitInt10",
 210     NULL
 211 };
 212
 213 const char *drmSymbols[] = {
 214     "drmOpen",
 215     "drmAddBufs",
 216     "drmAddMap",
 217     "drmAgpAcquire",
 218     "drmAgpVersionMajor",
 219     "drmAgpVersionMinor",
 220     "drmAgpAlloc",
 221     "drmAgpBind",
 222     "drmAgpEnable",
 223     "drmAgpFree",
 224     "drmAgpRelease",
 225     "drmAgpUnbind",
 226     "drmAuthMagic",
 227     "drmCommandNone",
 228     "drmCommandWrite",
 229     "drmCommandWriteRead",
 230     "drmCreateContext",
 231     "drmCtlInstHandler",
 232     "drmCtlUninstHandler",
 233     "drmDestroyContext",
 234     "drmFreeVersion",
 235     "drmGetInterruptFromBusID",
 236     "drmGetLibVersion",
 237     "drmGetVersion",
 238     NULL
 239 };
 240
 241 const char *driSymbols[] = {
 242     "DRICloseScreen",
 243     "DRICreateInfoRec",
 244     "DRIDestroyInfoRec",
 245     "DRIFinishScreenInit",
 246     "DRIGetSAREAPrivate",
 247     "DRILock",
 248     "DRIQueryVersion",
 249     "DRIScreenInit",
 250     "DRIUnlock",
 251     "GlxSetVisualConfigs",
 252     "DRICreatePCIBusID",
 253     NULL
 254 };
 255
 256
 257 static MODULESETUPPROTO(nouveauSetup);
 258
 259 static XF86ModuleVersionInfo nouveauVersRec =
 260 {
 261     "nouveau",
 262     MODULEVENDORSTRING,
 263     MODINFOSTRING1,
 264     MODINFOSTRING2,
 265     XORG_VERSION_CURRENT,
 266     NV_MAJOR_VERSION, NV_MINOR_VERSION, NV_PATCHLEVEL,
 267     ABI_CLASS_VIDEODRV,                     /* This is a video driver */
 268     ABI_VIDEODRV_VERSION,
 269     MOD_CLASS_VIDEODRV,
 270     {0,0,0,0}
 271 };
 272
 273 _X_EXPORT XF86ModuleData nouveauModuleData = { &nouveauVersRec, nouveauSetup, NULL };
 274
 275
 276 /*
 277  * This is intentionally screen-independent.  It indicates the binding
 278  * choice made in the first PreInit.
 279  */
 280 static int pix24bpp = 0;
 281
 282 static Bool
 283 NVGetRec(ScrnInfoPtr pScrn)
 284 {
 285     /*
 286      * Allocate an NVRec, and hook it into pScrn->driverPrivate.
 287      * pScrn->driverPrivate is initialised to NULL, so we can check if
 288      * the allocation has already been done.
 289      */
 290     if (pScrn->driverPrivate != NULL)
 291         return TRUE;
 292
 293     pScrn->driverPrivate = xnfcalloc(sizeof(NVRec), 1);
 294     /* Initialise it */
 295
 296     return TRUE;
 297 }
 298
 299 static void
 300 NVFreeRec(ScrnInfoPtr pScrn)
 301 {
 302     if (pScrn->driverPrivate == NULL)
 303         return;
 304     xfree(pScrn->driverPrivate);
 305     pScrn->driverPrivate = NULL;
 306 }
 307
 308
 309 static pointer
 310 nouveauSetup(pointer module, pointer opts, int *errmaj, int *errmin)
 311 {
 312         static Bool setupDone = FALSE;
 313
 314         /* This module should be loaded only once, but check to be sure. */
 315
 316         if (!setupDone) {
 317                 setupDone = TRUE;
 318                 /* The 1 here is needed to turn off a backwards compatibility mode */
 319                 /* Otherwise NVPciProbe() is not called */
 320                 xf86AddDriver(&NV, module, 1);
 321
 322                 /*
 323                  * Modules that this driver always requires may be loaded here
 324                  * by calling LoadSubModule().
 325                  */
 326                 /*
 327                  * Tell the loader about symbols from other modules that this module
 328                  * might refer to.
 329                  */
 330                 LoaderRefSymLists(vgahwSymbols, exaSymbols, fbSymbols,
 331 #ifdef XF86DRI
 332                                 drmSymbols,
 333 #endif
 334                                 ramdacSymbols, shadowSymbols,
 335                                 i2cSymbols, ddcSymbols, vbeSymbols,
 336                                 int10Symbols, NULL);
 337
 338                 /*
 339                  * The return value must be non-NULL on success even though there
 340                  * is no TearDownProc.
 341                  */
 342                 return (pointer)1;
 343         } else {
 344                 if (errmaj) *errmaj = LDR_ONCEONLY;
 345                 return NULL;
 346         }
 347 }
 348
 349 static const OptionInfoRec *
 350 NVAvailableOptions(int chipid, int busid)
 351 {
 352     return NVOptions;
 353 }
 354
 355 /* Mandatory */
 356 static void
 357 NVIdentify(int flags)
 358 {
 359     struct NvFamily *family;
 360     size_t maxLen=0;
 361
 362     xf86DrvMsg(0, X_INFO, NV_NAME " driver " NV_DRIVER_DATE "\n");
 363     xf86DrvMsg(0, X_INFO, NV_NAME " driver for NVIDIA chipset families :\n");
 364
 365     /* maximum length for alignment */
 366     family = NVKnownFamilies;
 367     while(family->name && family->chipset)
 368     {
 369         maxLen = max(maxLen, strlen(family->name));
 370         family++;
 371     }
 372
 373     /* display */
 374     family = NVKnownFamilies;
 375     while(family->name && family->chipset)
 376     {
 377         size_t len = strlen(family->name);
 378         xf86ErrorF("\t%s", family->name);
 379         while(len<maxLen+1)
 380         {
 381             xf86ErrorF(" ");
 382             len++;
 383         }
 384         xf86ErrorF("(%s)\n", family->chipset);
 385         family++;
 386     }
 387 }
 388
 389
 390 #ifndef XSERVER_LIBPCIACCESS
 391 static Bool
 392 NVGetScrnInfoRec(PciChipsets *chips, int chip)
 393 {
 394     ScrnInfoPtr pScrn;
 395
 396     pScrn = xf86ConfigPciEntity(NULL, 0, chip,
 397                                 chips, NULL, NULL, NULL,
 398                                 NULL, NULL);
 399
 400     if(!pScrn) return FALSE;
 401
 402     pScrn->driverVersion    = NV_VERSION;
 403     pScrn->driverName       = NV_DRIVER_NAME;
 404     pScrn->name             = NV_NAME;
 405
 406     pScrn->Probe = NVProbe;
 407     pScrn->PreInit          = NVPreInit;
 408     pScrn->ScreenInit       = NVScreenInit;
 409     pScrn->SwitchMode       = NVSwitchMode;
 410     pScrn->AdjustFrame      = NVAdjustFrame;
 411     pScrn->EnterVT          = NVEnterVT;
 412     pScrn->LeaveVT          = NVLeaveVT;
 413     pScrn->FreeScreen       = NVFreeScreen;
 414     pScrn->ValidMode        = NVValidMode;
 415
 416     return TRUE;
 417 }
 418 #endif
 419
 420 /* This returns architecture in hexdecimal, so NV40 is 0x40 */
 421 static int NVGetArchitecture (volatile CARD32 *regs)
 422 {
 423         int architecture = 0;
 424
 425         /* We're dealing with >=NV10 */
 426         if ((regs[0] & 0x0f000000) > 0 ) {
 427                 /* Bit 27-20 contain the architecture in hex */
 428                 architecture = (regs[0] & 0xff00000) >> 20;
 429         /* NV04 or NV05 */
 430         } else if ((regs[0] & 0xff00fff0) == 0x20004000) {
 431                 architecture = 0x04;
 432         }
 433
 434         return architecture;
 435 }
 436
 437 /* Reading the pci_id from the card registers is the most reliable way */
 438 static CARD32 NVGetPCIID (volatile CARD32 *regs)
 439 {
 440         CARD32 pci_id;
 441
 442         int architecture = NVGetArchitecture(regs);
 443
 444         /* Dealing with an unknown or unsupported card */
 445         if (architecture == 0) {
 446                 return 0;
 447         }
 448
 449         if (architecture >= 0x40)
 450                 pci_id = regs[0x88000/4];
 451         else
 452                 pci_id = regs[0x1800/4];
 453
 454         /* A pci-id can be inverted, we must correct this */
 455         if ((pci_id & 0xffff) == PCI_VENDOR_NVIDIA) {
 456                 pci_id = (PCI_VENDOR_NVIDIA << 16) | (pci_id >> 16);
 457         } else if ((pci_id & 0xffff) == PCI_VENDOR_NVIDIA_SGS) {
 458                 pci_id = (PCI_VENDOR_NVIDIA_SGS << 16) | (pci_id >> 16);
 459         /* Checking endian issues */
 460         } else {
 461                 /* PCI_VENDOR_NVIDIA = 0x10DE */
 462                 if ((pci_id & (0xffff << 16)) == (0xDE10 << 16)) { /* wrong endian */
 463                         pci_id = (PCI_VENDOR_NVIDIA << 16) | ((pci_id << 8) & 0x0000ff00) |
 464                                 ((pci_id >> 8) & 0x000000ff);
 465                 /* PCI_VENDOR_NVIDIA_SGS = 0x12D2 */
 466                 } else if ((pci_id & (0xffff << 16)) == (0xD212 << 16)) { /* wrong endian */
 467                         pci_id = (PCI_VENDOR_NVIDIA_SGS << 16) | ((pci_id << 8) & 0x0000ff00) |
 468                                 ((pci_id >> 8) & 0x000000ff);
 469                 }
 470         }
 471
 472         return pci_id;
 473 }
 474
 475 #ifdef XSERVER_LIBPCIACCESS
 476
 477 static Bool NVPciProbe (        DriverPtr               drv,
 478                                 int                     entity_num,
 479                                 struct pci_device       *dev,
 480                                 intptr_t                match_data      )
 481 {
 482         ScrnInfoPtr pScrn = NULL;
 483
 484         volatile uint32_t *regs = NULL;
 485
 486         /* Temporary mapping to discover the architecture */
 487         pci_device_map_range(dev, PCI_DEV_MEM_BASE(dev, 0), 0x90000, 0,
 488                              (void *) &regs);
 489
 490         uint8_t architecture = NVGetArchitecture(regs);
 491
 492         CARD32 pci_id = NVGetPCIID(regs);
 493
 494         pci_device_unmap_range(dev, (void *) regs, 0x90000);
 495
 496         /* Currently NV04 up to NV83 is supported */
 497         /* For safety the fictional NV8F is used */
 498         if (architecture >= 0x04 && architecture <= 0x8F) {
 499
 500                 /* At this stage the pci_id should be ok, so we generate this
 501                  * to avoid list duplication */
 502                 /* AGP bridge chips need their bridge chip id to be detected */
 503                 PciChipsets NVChipsets[] = {
 504                         { pci_id, PCI_DEV_PCI_ID(dev), RES_SHARED_VGA },
 505                         { -1, -1, RES_UNDEFINED }
 506                 };
 507
 508                 pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, NVChipsets,
 509                                                 NULL, NULL, NULL, NULL, NULL);
 510
 511                 if (pScrn != NULL) {
 512                         pScrn->driverVersion    = NV_VERSION;
 513                         pScrn->driverName       = NV_DRIVER_NAME;
 514                         pScrn->name             = NV_NAME;
 515
 516                         pScrn->Probe            = NULL;
 517                         pScrn->PreInit          = NVPreInit;
 518                         pScrn->ScreenInit       = NVScreenInit;
 519                         pScrn->SwitchMode       = NVSwitchMode;
 520                         pScrn->AdjustFrame      = NVAdjustFrame;
 521                         pScrn->EnterVT          = NVEnterVT;
 522                         pScrn->LeaveVT          = NVLeaveVT;
 523                         pScrn->FreeScreen       = NVFreeScreen;
 524                         pScrn->ValidMode        = NVValidMode;
 525
 526                         return TRUE;
 527                 }
 528         }
 529
 530         return FALSE;
 531 }
 532
 533 #endif /* XSERVER_LIBPCIACCESS */
 534
 535 #define MAX_CHIPS MAXSCREENS
 536
 537 #ifndef XSERVER_LIBPCIACCESS
 538 /* Mandatory */
 539 static Bool
 540 NVProbe(DriverPtr drv, int flags)
 541 {
 542         int i;
 543         GDevPtr *devSections;
 544         int *usedChips;
 545         SymTabRec NVChipsets[MAX_CHIPS + 1];
 546         PciChipsets NVPciChipsets[MAX_CHIPS + 1];
 547         pciVideoPtr *ppPci;
 548         int numDevSections;
 549         int numUsed;
 550         Bool foundScreen = FALSE;
 551
 552         if ((numDevSections = xf86MatchDevice(NV_DRIVER_NAME, &devSections)) <= 0)
 553                 return FALSE;  /* no matching device section */
 554
 555         if (!(ppPci = xf86GetPciVideoInfo()))
 556                 return FALSE;  /* no PCI cards found */
 557
 558         numUsed = 0;
 559
 560         /* Create the NVChipsets and NVPciChipsets from found devices */
 561         while (*ppPci && (numUsed < MAX_CHIPS)) {
 562                 if (((*ppPci)->vendor == PCI_VENDOR_NVIDIA_SGS) ||
 563                         ((*ppPci)->vendor == PCI_VENDOR_NVIDIA))
 564                 {
 565                         volatile CARD32 *regs;
 566                         CARD32 pcicmd;
 567
 568                         PCI_DEV_READ_LONG(*ppPci, PCI_CMD_STAT_REG, &pcicmd);
 569                         /* Enable reading memory? */
 570                         PCI_DEV_WRITE_LONG(*ppPci, PCI_CMD_STAT_REG, pcicmd | PCI_CMD_MEM_ENABLE);
 571
 572                         regs = xf86MapPciMem(-1, VIDMEM_MMIO, PCI_DEV_TAG(*ppPci), PCI_DEV_MEM_BASE(*ppPci, 0), 0x90000);
 573                         int pciid = NVGetPCIID(regs);
 574
 575                         int architecture = NVGetArchitecture(regs);
 576                         char name[25];
 577                         sprintf(name, "NVIDIA NV%02X", architecture);
 578                         /* NV04 upto NV83 is supported, NV8F is fictive limit */
 579                         if (architecture >= 0x04 && architecture <= 0x8F) {
 580                                 NVChipsets[numUsed].token = pciid;
 581                                 NVChipsets[numUsed].name = name;
 582                                 NVPciChipsets[numUsed].numChipset = pciid;
 583                                 /* AGP bridge chips need their bridge chip id to be detected */
 584                                 NVPciChipsets[numUsed].PCIid = PCI_DEV_PCI_ID(*ppPci);
 585                                 NVPciChipsets[numUsed].resList = RES_SHARED_VGA;
 586                                 numUsed++;
 587                         }
 588                         xf86UnMapVidMem(-1, (pointer)regs, 0x90000);
 589
 590                         /* Reset previous state */
 591                         PCI_DEV_WRITE_LONG(*ppPci, PCI_CMD_STAT_REG, pcicmd);
 592                 }
 593                 ppPci++;
 594         }
 595
 596         /* terminate the list */
 597         NVChipsets[numUsed].token = -1;
 598         NVChipsets[numUsed].name = NULL;
 599         NVPciChipsets[numUsed].numChipset = -1;
 600         NVPciChipsets[numUsed].PCIid = -1;
 601         NVPciChipsets[numUsed].resList = RES_UNDEFINED;
 602
 603         numUsed = xf86MatchPciInstances(NV_NAME, 0, NVChipsets, NVPciChipsets,
 604                                         devSections, numDevSections, drv,
 605                                         &usedChips);
 606
 607         if (numUsed <= 0) {
 608                 return FALSE;
 609         }
 610
 611         if (flags & PROBE_DETECT) {
 612                 foundScreen = TRUE;
 613         } else {
 614                 for (i = 0; i < numUsed; i++) {
 615                         pciVideoPtr pPci;
 616
 617                         pPci = xf86GetPciInfoForEntity(usedChips[i]);
 618                         if (NVGetScrnInfoRec(NVPciChipsets, usedChips[i])) {
 619                                 foundScreen = TRUE;
 620                         }
 621                 }
 622         }
 623
 624         xfree(devSections);
 625         xfree(usedChips);
 626
 627         return foundScreen;
 628 }
 629 #endif /* XSERVER_LIBPCIACCESS */
 630
 631 Bool
 632 NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 633 {
 634         ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
 635         NVPtr pNv = NVPTR(pScrn);
 636
 637         if (pNv->randr12_enable) {
 638                 /* No rotation support for the moment */
 639                 return xf86SetSingleMode(pScrn, mode, RR_Rotate_0);
 640         }
 641
 642         return NVModeInit(xf86Screens[scrnIndex], mode);
 643 }
 644
 645 /*
 646  * This function is used to initialize the Start Address - the first
 647  * displayed location in the video memory.
 648  */
 649 /* Usually mandatory */
 650 void
 651 NVAdjustFrame(int scrnIndex, int x, int y, int flags)
 652 {
 653         ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
 654         NVPtr pNv = NVPTR(pScrn);
 655
 656         if (pNv->randr12_enable) {
 657                 xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
 658                 xf86CrtcPtr crtc = config->output[config->compat_output]->crtc;
 659
 660                 if (crtc && crtc->enabled) {
 661                         NVCrtcSetBase(crtc, x, y, FALSE);
 662                 }
 663         } else {
 664                 int startAddr;
 665                 NVFBLayout *pLayout = &pNv->CurrentLayout;
 666                 startAddr = (((y*pLayout->displayWidth)+x)*(pLayout->bitsPerPixel/8));
 667                 startAddr += pNv->FB->offset;
 668                 NVSetStartAddress(pNv, startAddr);
 669         }
 670 }
 671
 672 static Bool
 673 NV50AcquireDisplay(ScrnInfoPtr pScrn)
 674 {
 675         if (!NV50DispInit(pScrn))
 676                 return FALSE;
 677         if (!NV50CursorAcquire(pScrn))
 678                 return FALSE;
 679         xf86SetDesiredModes(pScrn);
 680
 681         return TRUE;
 682 }
 683
 684 static Bool
 685 NV50ReleaseDisplay(ScrnInfoPtr pScrn)
 686 {
 687         NV50CursorRelease(pScrn);
 688         NV50DispShutdown(pScrn);
 689         return TRUE;
 690 }
 691
 692 /*
 693  * This is called when VT switching back to the X server.  Its job is
 694  * to reinitialise the video mode.
 695  *
 696  * We may wish to unmap video/MMIO memory too.
 697  */
 698
 699 /* Mandatory */
 700 static Bool
 701 NVEnterVT(int scrnIndex, int flags)
 702 {
 703         ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
 704         NVPtr pNv = NVPTR(pScrn);
 705
 706         if (pNv->randr12_enable) {
 707                 ErrorF("NVEnterVT is called\n");
 708                 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
 709                 int i;
 710                 pScrn->vtSema = TRUE;
 711
 712                 /* bit28: transmit text mode on both heads? */
 713                 if (pNv->twoHeads) {
 714                         uint32_t debug1 = nvReadMC(pNv, NV_PBUS_DEBUG_1);
 715                         nvWriteMC(pNv, NV_PBUS_DEBUG_1, debug1 & ~(1 << 28));
 716                 }
 717
 718                 if (pNv->Architecture == NV_ARCH_50) {
 719                         if (!NV50AcquireDisplay(pScrn))
 720                                 return FALSE;
 721                         return TRUE;
 722                 }
 723
 724                 /* Save the current state */
 725                 if (pNv->SaveGeneration != serverGeneration) {
 726                         pNv->SaveGeneration = serverGeneration;
 727                         NVSave(pScrn);
 728                 }
 729
 730                 for (i = 0; i < xf86_config->num_crtc; i++) {
 731                         NVCrtcLockUnlock(xf86_config->crtc[i], 0);
 732                 }
 733
 734                 /* Reassign outputs so disabled outputs don't get stuck on the wrong crtc */
 735                 for (i = 0; i < xf86_config->num_output; i++) {
 736                         xf86OutputPtr output = xf86_config->output[i];
 737                         NVOutputPrivatePtr nv_output = output->driver_private;
 738                         if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS) {
 739                                 uint8_t tmds_reg4;
 740
 741                                 /* Disable any crosswired tmds, to avoid picking up a signal on a disabled output */
 742                                 /* Example: TMDS1 crosswired to CRTC0 (by bios) reassigned to CRTC1 in xorg, disabled. */
 743                                 /* But the bios reinits it to CRTC0 when going back to VT. */
 744                                 /* Because it's disabled, it doesn't get a mode set, still it picks up the signal from CRTC0 (which is another output) */
 745                                 /* A legitimately crosswired output will get set properly during mode set */
 746                                 if ((tmds_reg4 = NVReadTMDS(pNv, nv_output->preferred_output, 0x4)) & (1 << 3)) {
 747                                         NVWriteTMDS(pNv, nv_output->preferred_output, 0x4, tmds_reg4 & ~(1 << 3));
 748                                 }
 749                         }
 750                 }
 751
 752                 if (!xf86SetDesiredModes(pScrn))
 753                         return FALSE;
 754         } else {
 755                 if (!NVModeInit(pScrn, pScrn->currentMode))
 756                         return FALSE;
 757
 758                 NVAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
 759         }
 760
 761         if (pNv->overlayAdaptor && pNv->Architecture != NV_ARCH_04)
 762                 NV10WriteOverlayParameters(pScrn);
 763         return TRUE;
 764 }
 765
 766 /*
 767  * This is called when VT switching away from the X server.  Its job is
 768  * to restore the previous (text) mode.
 769  *
 770  * We may wish to remap video/MMIO memory too.
 771  */
 772
 773 /* Mandatory */
 774 static void
 775 NVLeaveVT(int scrnIndex, int flags)
 776 {
 777         ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
 778         NVPtr pNv = NVPTR(pScrn);
 779         if (pNv->randr12_enable)
 780                 ErrorF("NVLeaveVT is called\n");
 781
 782         if (pNv->Architecture == NV_ARCH_50) {
 783                 NV50ReleaseDisplay(pScrn);
 784                 return;
 785         }
 786         NVSync(pScrn);
 787         NVRestore(pScrn);
 788         if (!pNv->randr12_enable)
 789                 NVLockUnlock(pScrn, 1);
 790 }
 791
 792
 793
 794 static void
 795 NVBlockHandler (
 796         int i,
 797         pointer blockData,
 798         pointer pTimeout,
 799         pointer pReadmask
 800 )
 801 {
 802         ScreenPtr pScreen = screenInfo.screens[i];
 803         ScrnInfoPtr pScrnInfo = xf86Screens[i];
 804         NVPtr pNv = NVPTR(pScrnInfo);
 805
 806         if (!pNv->NoAccel)
 807                 FIRE_RING();
 808
 809         pScreen->BlockHandler = pNv->BlockHandler;
 810         (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
 811         pScreen->BlockHandler = NVBlockHandler;
 812
 813         if (pNv->VideoTimerCallback)
 814                 (*pNv->VideoTimerCallback)(pScrnInfo, currentTime.milliseconds);
 815
 816 }
 817
 818
 819 /*
 820  * This is called at the end of each server generation.  It restores the
 821  * original (text) mode.  It should also unmap the video memory, and free
 822  * any per-generation data allocated by the driver.  It should finish
 823  * by unwrapping and calling the saved CloseScreen function.
 824  */
 825
 826 /* Mandatory */
 827 static Bool
 828 NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
 829 {
 830         ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
 831         NVPtr pNv = NVPTR(pScrn);
 832
 833         if (pScrn->vtSema) {
 834                 pScrn->vtSema = FALSE;
 835                 if (pNv->Architecture == NV_ARCH_50) {
 836                         NV50ReleaseDisplay(pScrn);
 837                 } else {
 838                         if (pNv->randr12_enable)
 839                                 ErrorF("NVCloseScreen is called\n");
 840                         NVSync(pScrn);
 841                         NVRestore(pScrn);
 842                         if (!pNv->randr12_enable)
 843                                 NVLockUnlock(pScrn, 1);
 844                 }
 845         }
 846
 847         NVUnmapMem(pScrn);
 848         vgaHWUnmapMem(pScrn);
 849         if (pNv->CursorInfoRec)
 850                 xf86DestroyCursorInfoRec(pNv->CursorInfoRec);
 851         if (pNv->ShadowPtr)
 852                 xfree(pNv->ShadowPtr);
 853         if (pNv->overlayAdaptor)
 854                 xfree(pNv->overlayAdaptor);
 855         if (pNv->blitAdaptor)
 856                 xfree(pNv->blitAdaptor);
 857
 858         pScrn->vtSema = FALSE;
 859         pScreen->CloseScreen = pNv->CloseScreen;
 860         pScreen->BlockHandler = pNv->BlockHandler;
 861         return (*pScreen->CloseScreen)(scrnIndex, pScreen);
 862 }
 863
 864 /* Free up any persistent data structures */
 865
 866 /* Optional */
 867 static void
 868 NVFreeScreen(int scrnIndex, int flags)
 869 {
 870     /*
 871      * This only gets called when a screen is being deleted.  It does not
 872      * get called routinely at the end of a server generation.
 873      */
 874     if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
 875         vgaHWFreeHWRec(xf86Screens[scrnIndex]);
 876     NVFreeRec(xf86Screens[scrnIndex]);
 877 }
 878
 879
 880 /* Checks if a mode is suitable for the selected chipset. */
 881
 882 /* Optional */
 883 static ModeStatus
 884 NVValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 885 {
 886     NVPtr pNv = NVPTR(xf86Screens[scrnIndex]);
 887
 888     if(pNv->fpWidth && pNv->fpHeight)
 889       if((pNv->fpWidth < mode->HDisplay) || (pNv->fpHeight < mode->VDisplay))
 890         return (MODE_PANEL);
 891
 892     return (MODE_OK);
 893 }
 894
 895 static void
 896 nvProbeDDC(ScrnInfoPtr pScrn, int index)
 897 {
 898     vbeInfoPtr pVbe;
 899
 900     if (xf86LoadSubModule(pScrn, "vbe")) {
 901         pVbe = VBEInit(NULL,index);
 902         ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
 903         vbeFree(pVbe);
 904     }
 905 }
 906
 907 Bool NVI2CInit(ScrnInfoPtr pScrn)
 908 {
 909         NVPtr pNv = NVPTR(pScrn);
 910         char *mod = "i2c";
 911
 912         if (xf86LoadSubModule(pScrn, mod)) {
 913                 xf86LoaderReqSymLists(i2cSymbols,NULL);
 914
 915                 mod = "ddc";
 916                 if(xf86LoadSubModule(pScrn, mod)) {
 917                         xf86LoaderReqSymLists(ddcSymbols, NULL);
 918                         /* randr-1.2 clients have their DDC's initialized elsewhere */
 919                         if (pNv->randr12_enable) {
 920                                 return TRUE;
 921                         } else {
 922                                 return NVDACi2cInit(pScrn);
 923                         }
 924                 }
 925         }
 926
 927         xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 928                 "Couldn't load %s module.  DDC probing can't be done\n", mod);
 929
 930         return FALSE;
 931 }
 932
 933 static Bool NVPreInitDRI(ScrnInfoPtr pScrn)
 934 {
 935         NVPtr pNv = NVPTR(pScrn);
 936
 937         if (!NVDRIGetVersion(pScrn))
 938                 return FALSE;
 939
 940         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 941                 "[dri] Found DRI library version %d.%d.%d and kernel"
 942                 " module version %d.%d.%d\n",
 943                 pNv->pLibDRMVersion->version_major,
 944                 pNv->pLibDRMVersion->version_minor,
 945                 pNv->pLibDRMVersion->version_patchlevel,
 946                 pNv->pKernelDRMVersion->version_major,
 947                 pNv->pKernelDRMVersion->version_minor,
 948                 pNv->pKernelDRMVersion->version_patchlevel);
 949
 950         return TRUE;
 951 }
 952
 953 static Bool
 954 nv_xf86crtc_resize(ScrnInfoPtr pScrn, int width, int height)
 955 {
 956         ErrorF("nv_xf86crtc_resize is called with %dx%d resolution\n", width, height);
 957         pScrn->virtualX = width;
 958         pScrn->virtualY = height;
 959         return TRUE;
 960 }
 961
 962 static const xf86CrtcConfigFuncsRec nv_xf86crtc_config_funcs = {
 963         nv_xf86crtc_resize
 964 };
 965
 966 /* This is taken from the haiku driver */
 967 /* We must accept crtc pitch constrains */
 968 /* A hardware bug on some hardware requires twice the pitch */
 969 static CARD8 NVGetCRTCMask(ScrnInfoPtr pScrn, CARD8 bpp)
 970 {
 971         CARD8 mask = 0;
 972         switch(bpp) {
 973                 case 8:
 974                         mask = 0xf; /* 0x7 */
 975                         break;
 976                 case 15:
 977                         mask = 0x7; /* 0x3 */
 978                         break;
 979                 case 16:
 980                         mask = 0x7; /* 0x3 */
 981                         break;
 982                 case 24:
 983                         mask = 0xf; /* 0x7 */
 984                         break;
 985                 case 32:
 986                         mask = 0x3; /* 0x1 */
 987                         break;
 988                 default:
 989                         ErrorF("Unkown color format\n");
 990                         break;
 991         }
 992
 993         return mask;
 994 }
 995
 996 /* This is taken from the haiku driver */
 997 static CARD8 NVGetAccelerationMask(ScrnInfoPtr pScrn, CARD8 bpp)
 998 {
 999         NVPtr pNv = NVPTR(pScrn);
1000         CARD8 mask = 0;
1001         /* Identical for NV04 */
1002         if (pNv->Architecture == NV_ARCH_04) {
1003                 return NVGetCRTCMask(pScrn, bpp);
1004         } else {
1005                 switch(bpp) {
1006                         case 8:
1007                                 mask = 0x3f;
1008                                 break;
1009                         case 15:
1010                                 mask = 0x1f;
1011                                 break;
1012                         case 16:
1013                                 mask = 0x1f;
1014                                 break;
1015                         case 24:
1016                                 mask = 0x3f;
1017                                 break;
1018                         case 32:
1019                                 mask = 0x0f;
1020                                 break;
1021                         default:
1022                                 ErrorF("Unkown color format\n");
1023                                 break;
1024                 }
1025         }
1026
1027         return mask;
1028 }
1029
1030 static CARD32 NVGetVideoPitch(ScrnInfoPtr pScrn, CARD8 bpp)
1031 {
1032         NVPtr pNv = NVPTR(pScrn);
1033         CARD8 crtc_mask, accel_mask = 0;
1034         crtc_mask = NVGetCRTCMask(pScrn, bpp);
1035         if (!pNv->NoAccel) {
1036                 accel_mask = NVGetAccelerationMask(pScrn, bpp);
1037         }
1038
1039         /* adhere to the largest granularity imposed */
1040         if (accel_mask > crtc_mask) {
1041                 return (pScrn->virtualX + accel_mask) & ~accel_mask;
1042         } else {
1043                 return (pScrn->virtualX + crtc_mask) & ~crtc_mask;
1044         }
1045 }
1046
1047 #define NVPreInitFail(fmt, args...) do {                                    \
1048         xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "%d: "fmt, __LINE__, ##args); \
1049         if (pNv->pInt10)                                                    \
1050                 xf86FreeInt10(pNv->pInt10);                                 \
1051         NVFreeRec(pScrn);                                                   \
1052         return FALSE;                                                       \
1053 } while(0)
1054
1055 /* Mandatory */
1056 Bool
1057 NVPreInit(ScrnInfoPtr pScrn, int flags)
1058 {
1059         xf86CrtcConfigPtr xf86_config;
1060         NVPtr pNv;
1061         MessageType from;
1062         int i, max_width, max_height;
1063         ClockRangePtr clockRanges;
1064         const char *s;
1065         int config_mon_rates = FALSE;
1066         int num_crtc;
1067
1068         if (flags & PROBE_DETECT) {
1069                 EntityInfoPtr pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
1070
1071                 if (!pEnt)
1072                         return FALSE;
1073
1074                 i = pEnt->index;
1075                 xfree(pEnt);
1076
1077                 nvProbeDDC(pScrn, i);
1078                 return TRUE;
1079         }
1080
1081         /*
1082          * Note: This function is only called once at server startup, and
1083          * not at the start of each server generation.  This means that
1084          * only things that are persistent across server generations can
1085          * be initialised here.  xf86Screens[] is (pScrn is a pointer to one
1086          * of these).  Privates allocated using xf86AllocateScrnInfoPrivateIndex()
1087          * are too, and should be used for data that must persist across
1088          * server generations.
1089          *
1090          * Per-generation data should be allocated with
1091          * AllocateScreenPrivateIndex() from the ScreenInit() function.
1092          */
1093
1094         /* Check the number of entities, and fail if it isn't one. */
1095         if (pScrn->numEntities != 1)
1096                 return FALSE;
1097
1098         /* Allocate the NVRec driverPrivate */
1099         if (!NVGetRec(pScrn)) {
1100                 return FALSE;
1101         }
1102         pNv = NVPTR(pScrn);
1103
1104         /* Get the entity, and make sure it is PCI. */
1105         pNv->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
1106         if (pNv->pEnt->location.type != BUS_PCI)
1107                 return FALSE;
1108
1109         /* Find the PCI info for this screen */
1110         pNv->PciInfo = xf86GetPciInfoForEntity(pNv->pEnt->index);
1111 #ifndef XSERVER_LIBPCIACCESS
1112         pNv->PciTag = pciTag(pNv->PciInfo->bus, pNv->PciInfo->device,
1113                                 pNv->PciInfo->func);
1114 #endif /* XSERVER_LIBPCIACCESS */
1115
1116         pNv->Primary = xf86IsPrimaryPci(pNv->PciInfo);
1117
1118         /* Initialize the card through int10 interface if needed */
1119         if (xf86LoadSubModule(pScrn, "int10")) {
1120                 xf86LoaderReqSymLists(int10Symbols, NULL);
1121 #if !defined(__alpha__) && !defined(__powerpc__)
1122                 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing int10\n");
1123                 pNv->pInt10 = xf86InitInt10(pNv->pEnt->index);
1124 #endif
1125         }
1126
1127         xf86SetOperatingState(resVgaIo, pNv->pEnt->index, ResUnusedOpr);
1128         xf86SetOperatingState(resVgaMem, pNv->pEnt->index, ResDisableOpr);
1129
1130         /* Set pScrn->monitor */
1131         pScrn->monitor = pScrn->confScreen->monitor;
1132
1133         volatile uint32_t *regs = NULL;
1134 #ifdef XSERVER_LIBPCIACCESS
1135         pci_device_map_range(pNv->PciInfo, PCI_DEV_MEM_BASE(pNv->PciInfo, 0),
1136                              0x90000, 0, (void *)&regs);
1137         pNv->Chipset = NVGetPCIID(regs) & 0xffff;
1138         pNv->NVArch = NVGetArchitecture(regs);
1139         pci_device_unmap_range(pNv->PciInfo, (void *) regs, 0x90000);
1140 #else
1141         CARD32 pcicmd;
1142         PCI_DEV_READ_LONG(pNv->PciInfo, PCI_CMD_STAT_REG, &pcicmd);
1143         /* Enable reading memory? */
1144         PCI_DEV_WRITE_LONG(pNv->PciInfo, PCI_CMD_STAT_REG, pcicmd | PCI_CMD_MEM_ENABLE);
1145         regs = xf86MapPciMem(-1, VIDMEM_MMIO, pNv->PciTag, PCI_DEV_MEM_BASE(pNv->PciInfo, 0), 0x90000);
1146         pNv->Chipset = NVGetPCIID(regs) & 0xffff;
1147         pNv->NVArch = NVGetArchitecture(regs);
1148         xf86UnMapVidMem(-1, (pointer)regs, 0x90000);
1149         /* Reset previous state */
1150         PCI_DEV_WRITE_LONG(pNv->PciInfo, PCI_CMD_STAT_REG, pcicmd);
1151 #endif /* XSERVER_LIBPCIACCESS */
1152
1153         pScrn->chipset = malloc(sizeof(char) * 25);
1154         sprintf(pScrn->chipset, "NVIDIA NV%02X", pNv->NVArch);
1155
1156         if(!pScrn->chipset) {
1157                 pScrn->chipset = "Unknown NVIDIA";
1158         }
1159
1160         /*
1161         * This shouldn't happen because such problems should be caught in
1162         * NVProbe(), but check it just in case.
1163         */
1164         if (pScrn->chipset == NULL)
1165                 NVPreInitFail("ChipID 0x%04X is not recognised\n", pNv->Chipset);
1166
1167         if (pNv->NVArch < 0x04)
1168                 NVPreInitFail("Chipset \"%s\" is not recognised\n", pScrn->chipset);
1169
1170         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Chipset: \"%s\"\n", pScrn->chipset);
1171
1172         /* The highest architecture currently supported is NV5x */
1173         if (pNv->NVArch >= 0x80) {
1174                 pNv->Architecture =  NV_ARCH_50;
1175         } else if (pNv->NVArch >= 0x60) {
1176                 pNv->Architecture =  NV_ARCH_40;
1177         } else if (pNv->NVArch >= 0x50) {
1178                 pNv->Architecture =  NV_ARCH_50;
1179         } else if (pNv->NVArch >= 0x40) {
1180                 pNv->Architecture =  NV_ARCH_40;
1181         } else if (pNv->NVArch >= 0x30) {
1182                 pNv->Architecture = NV_ARCH_30;
1183         } else if (pNv->NVArch >= 0x20) {
1184                 pNv->Architecture = NV_ARCH_20;
1185         } else if (pNv->NVArch >= 0x10) {
1186                 pNv->Architecture = NV_ARCH_10;
1187         } else if (pNv->NVArch >= 0x04) {
1188                 pNv->Architecture = NV_ARCH_04;
1189         /*  The lowest architecture currently supported is NV04 */
1190         } else {
1191                 return FALSE;
1192         }
1193
1194         /*
1195          * The first thing we should figure out is the depth, bpp, etc.
1196          */
1197
1198         if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) {
1199                 NVPreInitFail("\n");
1200         } else {
1201                 /* Check that the returned depth is one we support */
1202                 switch (pScrn->depth) {
1203                         case 8:
1204                         case 15:
1205                         case 16:
1206                         case 24:
1207                                 /* OK */
1208                                 break;
1209                         default:
1210                                 NVPreInitFail("Given depth (%d) is not supported by this driver\n",
1211                                         pScrn->depth);
1212                 }
1213         }
1214         xf86PrintDepthBpp(pScrn);
1215
1216         /* Get the depth24 pixmap format */
1217         if (pScrn->depth == 24 && pix24bpp == 0)
1218                 pix24bpp = xf86GetBppFromDepth(pScrn, 24);
1219
1220         /*
1221          * This must happen after pScrn->display has been set because
1222          * xf86SetWeight references it.
1223          */
1224         if (pScrn->depth > 8) {
1225                 /* The defaults are OK for us */
1226                 rgb zeros = {0, 0, 0};
1227
1228                 if (!xf86SetWeight(pScrn, zeros, zeros)) {
1229                         NVPreInitFail("\n");
1230                 }
1231         }
1232
1233         if (!xf86SetDefaultVisual(pScrn, -1)) {
1234                 NVPreInitFail("\n");
1235         } else {
1236                 /* We don't currently support DirectColor at > 8bpp */
1237                 if (pScrn->depth > 8 && (pScrn->defaultVisual != TrueColor)) {
1238                         NVPreInitFail("Given default visual"
1239                                 " (%s) is not supported at depth %d\n",
1240                                 xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
1241                 }
1242         }
1243
1244         /* The vgahw module should be loaded here when needed */
1245         if (!xf86LoadSubModule(pScrn, "vgahw")) {
1246                 NVPreInitFail("\n");
1247         }
1248
1249         xf86LoaderReqSymLists(vgahwSymbols, NULL);
1250
1251         /*
1252          * Allocate a vgaHWRec
1253          */
1254         if (!vgaHWGetHWRec(pScrn)) {
1255                 NVPreInitFail("\n");
1256         }
1257
1258         /* We use a programmable clock */
1259         pScrn->progClock = TRUE;
1260
1261         /* Collect all of the relevant option flags (fill in pScrn->options) */
1262         xf86CollectOptions(pScrn, NULL);
1263
1264         /* Process the options */
1265         if (!(pNv->Options = xalloc(sizeof(NVOptions))))
1266                 return FALSE;
1267         memcpy(pNv->Options, NVOptions, sizeof(NVOptions));
1268         xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pNv->Options);
1269
1270         /* Set the bits per RGB for 8bpp mode */
1271         if (pScrn->depth == 8)
1272                 pScrn->rgbBits = 8;
1273
1274         from = X_DEFAULT;
1275
1276         pNv->new_restore = FALSE;
1277
1278         if (pNv->Architecture == NV_ARCH_50) {
1279                 pNv->randr12_enable = TRUE;
1280         } else {
1281                 pNv->randr12_enable = FALSE;
1282                 if (xf86ReturnOptValBool(pNv->Options, OPTION_RANDR12, FALSE)) {
1283                         pNv->randr12_enable = TRUE;
1284                 }
1285         }
1286         xf86DrvMsg(pScrn->scrnIndex, from, "Randr1.2 support %sabled\n", pNv->randr12_enable ? "en" : "dis");
1287
1288         if (pNv->randr12_enable) {
1289                 if (xf86ReturnOptValBool(pNv->Options, OPTION_NEW_RESTORE, FALSE)) {
1290                         pNv->new_restore = TRUE;
1291                 }
1292                 xf86DrvMsg(pScrn->scrnIndex, from, "New (experimental) restore support %sabled\n", pNv->new_restore ? "en" : "dis");
1293         }
1294
1295         pNv->HWCursor = TRUE;
1296         /*
1297          * The preferred method is to use the "hw cursor" option as a tri-state
1298          * option, with the default set above.
1299          */
1300         if (xf86GetOptValBool(pNv->Options, OPTION_HW_CURSOR, &pNv->HWCursor)) {
1301                 from = X_CONFIG;
1302         }
1303         /* For compatibility, accept this too (as an override) */
1304         if (xf86ReturnOptValBool(pNv->Options, OPTION_SW_CURSOR, FALSE)) {
1305                 from = X_CONFIG;
1306                 pNv->HWCursor = FALSE;
1307         }
1308         xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
1309                 pNv->HWCursor ? "HW" : "SW");
1310
1311         pNv->FpScale = TRUE;
1312
1313         if (xf86GetOptValBool(pNv->Options, OPTION_FP_SCALE, &pNv->FpScale)) {
1314                 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Flat panel scaling %s\n",
1315                         pNv->FpScale ? "on" : "off");
1316         }
1317         if (xf86ReturnOptValBool(pNv->Options, OPTION_NOACCEL, FALSE)) {
1318                 pNv->NoAccel = TRUE;
1319                 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
1320         }
1321         if (xf86ReturnOptValBool(pNv->Options, OPTION_SHADOW_FB, FALSE)) {
1322                 pNv->ShadowFB = TRUE;
1323                 pNv->NoAccel = TRUE;
1324                 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1325                         "Using \"Shadow Framebuffer\" - acceleration disabled\n");
1326         }
1327
1328         pNv->Rotate = 0;
1329         pNv->RandRRotation = FALSE;
1330         /*
1331          * Rotation with a randr-1.2 driver happens at a different level, so ignore these options.
1332          */
1333         if ((s = xf86GetOptValString(pNv->Options, OPTION_ROTATE)) && !pNv->randr12_enable) {
1334                 if(!xf86NameCmp(s, "CW")) {
1335                         pNv->ShadowFB = TRUE;
1336                         pNv->NoAccel = TRUE;
1337                         pNv->HWCursor = FALSE;
1338                         pNv->Rotate = 1;
1339                         xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1340                                 "Rotating screen clockwise - acceleration disabled\n");
1341                 } else if(!xf86NameCmp(s, "CCW")) {
1342                         pNv->ShadowFB = TRUE;
1343                         pNv->NoAccel = TRUE;
1344                         pNv->HWCursor = FALSE;
1345                         pNv->Rotate = -1;
1346                         xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1347                                 "Rotating screen counter clockwise - acceleration disabled\n");
1348                 } else if(!xf86NameCmp(s, "RandR")) {
1349                         pNv->ShadowFB = TRUE;
1350                         pNv->NoAccel = TRUE;
1351                         pNv->HWCursor = FALSE;
1352                         pNv->RandRRotation = TRUE;
1353                         xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1354                                 "Using RandR rotation - acceleration disabled\n");
1355                 } else {
1356                         xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1357                                 "\"%s\" is not a valid value for Option \"Rotate\"\n", s);
1358                         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1359                                 "Valid options are \"CW\", \"CCW\", and \"RandR\"\n");
1360                 }
1361         }
1362
1363         if(xf86GetOptValInteger(pNv->Options, OPTION_VIDEO_KEY, &(pNv->videoKey))) {
1364                 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to 0x%x\n",
1365                                         pNv->videoKey);
1366         } else {
1367                 pNv->videoKey =  (1 << pScrn->offset.red) |
1368                                         (1 << pScrn->offset.green) |
1369                 (((pScrn->mask.blue >> pScrn->offset.blue) - 1) << pScrn->offset.blue);
1370         }
1371
1372         /* Things happen on a per output basis for a randr-1.2 driver. */
1373         if (xf86GetOptValBool(pNv->Options, OPTION_FLAT_PANEL, &(pNv->FlatPanel)) && !pNv->randr12_enable) {
1374                 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "forcing %s usage\n",
1375                         pNv->FlatPanel ? "DFP" : "CRTC");
1376         } else {
1377                 pNv->FlatPanel = -1; /* autodetect later */
1378         }
1379
1380         pNv->FPDither = FALSE;
1381         if (xf86GetOptValBool(pNv->Options, OPTION_FP_DITHER, &(pNv->FPDither)))
1382                 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "enabling flat panel dither\n");
1383
1384         if (xf86GetOptValInteger(pNv->Options, OPTION_FP_TWEAK,
1385                                                 &pNv->PanelTweak)) {
1386                 pNv->usePanelTweak = TRUE;
1387         } else {
1388                 pNv->usePanelTweak = FALSE;
1389         }
1390
1391         if (pNv->pEnt->device->MemBase != 0) {
1392                 /* Require that the config file value matches one of the PCI values. */
1393                 if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->MemBase)) {
1394                         NVPreInitFail(
1395                                 "MemBase 0x%08lX doesn't match any PCI base register.\n",
1396                                 pNv->pEnt->device->MemBase);
1397                 }
1398                 pNv->VRAMPhysical = pNv->pEnt->device->MemBase;
1399                 from = X_CONFIG;
1400         } else {
1401                 if (PCI_DEV_MEM_BASE(pNv->PciInfo, 1) != 0) {
1402                         pNv->VRAMPhysical = PCI_DEV_MEM_BASE(pNv->PciInfo, 1) & 0xff800000;
1403                         from = X_PROBED;
1404                 } else {
1405                         NVPreInitFail("No valid FB address in PCI config space\n");
1406                         return FALSE;
1407                 }
1408         }
1409         xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
1410                 (unsigned long)pNv->VRAMPhysical);
1411
1412         if (pNv->pEnt->device->IOBase != 0) {
1413                 /* Require that the config file value matches one of the PCI values. */
1414                 if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->IOBase)) {
1415                         NVPreInitFail("IOBase 0x%08lX doesn't match any PCI base register.\n",
1416                                 pNv->pEnt->device->IOBase);
1417                 }
1418                 pNv->IOAddress = pNv->pEnt->device->IOBase;
1419                 from = X_CONFIG;
1420         } else {
1421                 if (PCI_DEV_MEM_BASE(pNv->PciInfo, 0) != 0) {
1422                         pNv->IOAddress = PCI_DEV_MEM_BASE(pNv->PciInfo, 0) & 0xffffc000;
1423                         from = X_PROBED;
1424                 } else {
1425                         NVPreInitFail("No valid MMIO address in PCI config space\n");
1426                 }
1427         }
1428         xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n",
1429                 (unsigned long)pNv->IOAddress);
1430
1431         if (xf86RegisterResources(pNv->pEnt->index, NULL, ResExclusive)) {
1432                 NVPreInitFail("xf86RegisterResources() found resource conflicts\n");
1433         }
1434
1435         pNv->alphaCursor = (pNv->NVArch >= 0x11);
1436
1437         if(pNv->Architecture < NV_ARCH_10) {
1438                 max_width = (pScrn->bitsPerPixel > 16) ? 2032 : 2048;
1439                 max_height = 2048;
1440         } else {
1441                 max_width = (pScrn->bitsPerPixel > 16) ? 4080 : 4096;
1442                 max_height = 4096;
1443         }
1444
1445         if (pNv->randr12_enable) {
1446                 /* Allocate an xf86CrtcConfig */
1447                 xf86CrtcConfigInit(pScrn, &nv_xf86crtc_config_funcs);
1448                 xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
1449
1450                 xf86CrtcSetSizeRange(pScrn, 320, 200, max_width, max_height);
1451         }
1452
1453         if (NVPreInitDRI(pScrn) == FALSE) {
1454                 NVPreInitFail("\n");
1455         }
1456
1457         if (!pNv->randr12_enable) {
1458                 if ((pScrn->monitor->nHsync == 0) &&
1459                         (pScrn->monitor->nVrefresh == 0)) {
1460
1461                         config_mon_rates = FALSE;
1462                 } else {
1463                         config_mon_rates = TRUE;
1464                 }
1465         }
1466
1467         NVCommonSetup(pScrn);
1468
1469         if (pNv->randr12_enable) {
1470                 if (pNv->Architecture < NV_ARCH_50) {
1471                         NVI2CInit(pScrn);
1472
1473                         num_crtc = pNv->twoHeads ? 2 : 1;
1474                         for (i = 0; i < num_crtc; i++) {
1475                                 nv_crtc_init(pScrn, i);
1476                         }
1477
1478                         NvSetupOutputs(pScrn);
1479                 } else {
1480                         if (!NV50DispPreInit(pScrn))
1481                                 NVPreInitFail("\n");
1482                         if (!NV50CreateOutputs(pScrn))
1483                                 NVPreInitFail("\n");
1484                         NV50DispCreateCrtcs(pScrn);
1485                 }
1486
1487                 if (!xf86InitialConfiguration(pScrn, FALSE))
1488                         NVPreInitFail("No valid modes.\n");
1489         }
1490
1491         pScrn->videoRam = pNv->RamAmountKBytes;
1492         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kBytes\n",
1493                 pScrn->videoRam);
1494
1495         pNv->VRAMPhysicalSize = pScrn->videoRam * 1024;
1496
1497         /*
1498          * If the driver can do gamma correction, it should call xf86SetGamma()
1499          * here.
1500          */
1501
1502         {
1503                 Gamma zeros = {0.0, 0.0, 0.0};
1504
1505                 if (!xf86SetGamma(pScrn, zeros)) {
1506                         NVPreInitFail("\n");
1507                 }
1508         }
1509
1510         /*
1511          * Setup the ClockRanges, which describe what clock ranges are available,
1512          * and what sort of modes they can be used for.
1513          */
1514
1515         clockRanges = xnfcalloc(sizeof(ClockRange), 1);
1516         clockRanges->next = NULL;
1517         clockRanges->minClock = pNv->MinVClockFreqKHz;
1518         clockRanges->maxClock = pNv->MaxVClockFreqKHz;
1519         clockRanges->clockIndex = -1;           /* programmable */
1520         clockRanges->doubleScanAllowed = TRUE;
1521         if ((pNv->Architecture == NV_ARCH_20) ||
1522                 ((pNv->Architecture == NV_ARCH_10) &&
1523                 ((pNv->Chipset & 0x0ff0) != CHIPSET_NV10) &&
1524                 ((pNv->Chipset & 0x0ff0) != CHIPSET_NV15))) {
1525                 /* HW is broken */
1526                 clockRanges->interlaceAllowed = FALSE;
1527         } else {
1528                 clockRanges->interlaceAllowed = TRUE;
1529         }
1530
1531         if(pNv->FlatPanel == 1) {
1532                 clockRanges->interlaceAllowed = FALSE;
1533                 clockRanges->doubleScanAllowed = FALSE;
1534         }
1535
1536 #ifdef M_T_DRIVER
1537         /* If DFP, add a modeline corresponding to its panel size */
1538         if (pNv->FlatPanel && !pNv->Television && pNv->fpWidth && pNv->fpHeight) {
1539                 DisplayModePtr Mode;
1540
1541                 Mode = xnfcalloc(1, sizeof(DisplayModeRec));
1542                 Mode = xf86CVTMode(pNv->fpWidth, pNv->fpHeight, 60.00, TRUE, FALSE);
1543                 Mode->type = M_T_DRIVER;
1544                 pScrn->monitor->Modes = xf86ModesAdd(pScrn->monitor->Modes, Mode);
1545
1546                 if (!config_mon_rates) {
1547                         if (!Mode->HSync)
1548                                 Mode->HSync = ((float) Mode->Clock ) / ((float) Mode->HTotal);
1549                         if (!Mode->VRefresh)
1550                                 Mode->VRefresh = (1000.0 * ((float) Mode->Clock)) /
1551                                                         ((float) (Mode->HTotal * Mode->VTotal));
1552
1553                         if (Mode->HSync < pScrn->monitor->hsync[0].lo)
1554                                 pScrn->monitor->hsync[0].lo = Mode->HSync;
1555                         if (Mode->HSync > pScrn->monitor->hsync[0].hi)
1556                                 pScrn->monitor->hsync[0].hi = Mode->HSync;
1557                         if (Mode->VRefresh < pScrn->monitor->vrefresh[0].lo)
1558                                 pScrn->monitor->vrefresh[0].lo = Mode->VRefresh;
1559                         if (Mode->VRefresh > pScrn->monitor->vrefresh[0].hi)
1560                                 pScrn->monitor->vrefresh[0].hi = Mode->VRefresh;
1561
1562                         pScrn->monitor->nHsync = 1;
1563                         pScrn->monitor->nVrefresh = 1;
1564                 }
1565         }
1566 #endif
1567
1568         if (pNv->randr12_enable) {
1569                 pScrn->displayWidth = NVGetVideoPitch(pScrn, pScrn->depth);
1570         } else {
1571                 /*
1572                  * xf86ValidateModes will check that the mode HTotal and VTotal values
1573                  * don't exceed the chipset's limit if pScrn->maxHValue and
1574                  * pScrn->maxVValue are set.  Since our NVValidMode() already takes
1575                  * care of this, we don't worry about setting them here.
1576                  */
1577                 i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
1578                                         pScrn->display->modes, clockRanges,
1579                                         NULL, 256, max_width,
1580                                         512, 128, max_height,
1581                                         pScrn->display->virtualX,
1582                                         pScrn->display->virtualY,
1583                                         pNv->VRAMPhysicalSize / 2,
1584                                         LOOKUP_BEST_REFRESH);
1585
1586                 if (i == -1) {
1587                         NVPreInitFail("\n");
1588                 }
1589
1590                 /* Prune the modes marked as invalid */
1591                 xf86PruneDriverModes(pScrn);
1592
1593                 /*
1594                  * Set the CRTC parameters for all of the modes based on the type
1595                  * of mode, and the chipset's interlace requirements.
1596                  *
1597                  * Calling this is required if the mode->Crtc* values are used by the
1598                  * driver and if the driver doesn't provide code to set them.  They
1599                  * are not pre-initialised at all.
1600                  */
1601                 xf86SetCrtcForModes(pScrn, 0);
1602         }
1603
1604         if (pScrn->modes == NULL) {
1605                 NVPreInitFail("No valid modes found\n");
1606         }
1607
1608         /* Set the current mode to the first in the list */
1609         pScrn->currentMode = pScrn->modes;
1610
1611         /* Print the list of modes being used */
1612         xf86PrintModes(pScrn);
1613
1614         /* Set display resolution */
1615         xf86SetDpi(pScrn, 0, 0);
1616
1617
1618         /*
1619          * XXX This should be taken into account in some way in the mode valdation
1620          * section.
1621          */
1622
1623         if (xf86LoadSubModule(pScrn, "fb") == NULL) {
1624                 NVPreInitFail("\n");
1625         }
1626
1627         xf86LoaderReqSymLists(fbSymbols, NULL);
1628
1629         /* Load EXA if needed */
1630         if (!pNv->NoAccel) {
1631                 if (!xf86LoadSubModule(pScrn, "exa")) {
1632                         NVPreInitFail("\n");
1633                 }
1634                 xf86LoaderReqSymLists(exaSymbols, NULL);
1635         }
1636
1637         /* Load ramdac if needed */
1638         if (pNv->HWCursor) {
1639                 if (!xf86LoadSubModule(pScrn, "ramdac")) {
1640                         NVPreInitFail("\n");
1641                 }
1642                 xf86LoaderReqSymLists(ramdacSymbols, NULL);
1643         }
1644
1645         /* Load shadowfb if needed */
1646         if (pNv->ShadowFB) {
1647                 if (!xf86LoadSubModule(pScrn, "shadowfb")) {
1648                         NVPreInitFail("\n");
1649                 }
1650                 xf86LoaderReqSymLists(shadowSymbols, NULL);
1651         }
1652
1653         pNv->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
1654         pNv->CurrentLayout.depth = pScrn->depth;
1655         pNv->CurrentLayout.displayWidth = pScrn->displayWidth;
1656         pNv->CurrentLayout.weight.red = pScrn->weight.red;
1657         pNv->CurrentLayout.weight.green = pScrn->weight.green;
1658         pNv->CurrentLayout.weight.blue = pScrn->weight.blue;
1659         pNv->CurrentLayout.mode = pScrn->currentMode;
1660
1661         xf86FreeInt10(pNv->pInt10);
1662
1663         pNv->pInt10 = NULL;
1664         return TRUE;
1665 }
1666
1667
1668 /*
1669  * Map the framebuffer and MMIO memory.
1670  */
1671
1672 static Bool
1673 NVMapMem(ScrnInfoPtr pScrn)
1674 {
1675         NVPtr pNv = NVPTR(pScrn);
1676         int gart_scratch_size;
1677         uint64_t res;
1678
1679         nouveau_device_get_param(pNv->dev, NOUVEAU_GETPARAM_FB_SIZE, &res);
1680         pNv->VRAMSize=res;
1681         nouveau_device_get_param(pNv->dev, NOUVEAU_GETPARAM_FB_PHYSICAL, &res);
1682         pNv->VRAMPhysical=res;
1683         nouveau_device_get_param(pNv->dev, NOUVEAU_GETPARAM_AGP_SIZE, &res);
1684         pNv->AGPSize=res;
1685
1686 #if !NOUVEAU_EXA_PIXMAPS
1687         if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN,
1688                 0, pNv->VRAMPhysicalSize / 2, &pNv->FB)) {
1689                         ErrorF("Failed to allocate memory for framebuffer!\n");
1690                         return FALSE;
1691         }
1692         xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1693                 "Allocated %dMiB VRAM for framebuffer + offscreen pixmaps\n",
1694                 (unsigned int)(pNv->FB->size >> 20));
1695 #endif
1696
1697         if (pNv->AGPSize) {
1698                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1699                            "AGPGART: %dMiB available\n",
1700                            (unsigned int)(pNv->AGPSize >> 20));
1701                 if (pNv->AGPSize > (16*1024*1024))
1702                         gart_scratch_size = 16*1024*1024;
1703                 else
1704                         /* always leave 512kb for other things like the fifos */
1705                         gart_scratch_size = pNv->AGPSize - 512*1024;
1706         } else {
1707                 gart_scratch_size = (4 << 20) - (1 << 18) ;
1708                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1709                            "GART: PCI DMA - using %dKiB\n",
1710                            gart_scratch_size >> 10);
1711         }
1712
1713         if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_GART | NOUVEAU_BO_PIN, 0,
1714                            gart_scratch_size, &pNv->GART)) {
1715                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1716                            "Unable to allocate GART memory\n");
1717         }
1718         if (pNv->GART) {
1719                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1720                            "GART: Allocated %dMiB as a scratch buffer\n",
1721                            (unsigned int)(pNv->GART->size >> 20));
1722         }
1723
1724         if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN, 0,
1725                            64 * 1024, &pNv->Cursor)) {
1726                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1727                            "Failed to allocate memory for hardware cursor\n");
1728                 return FALSE;
1729         }
1730
1731         if (pNv->randr12_enable) {
1732                 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN, 0,
1733                         64 * 1024, &pNv->Cursor2)) {
1734                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1735                                 "Failed to allocate memory for hardware cursor\n");
1736                         return FALSE;
1737                 }
1738         }
1739
1740         if (pNv->Architecture >= NV_ARCH_50) {
1741                 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN,
1742                                    0, 0x1000, &pNv->CLUT)) {
1743                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1744                                    "Failed to allocate memory for CLUT\n");
1745                         return FALSE;
1746                 }
1747         }
1748
1749         if ((pNv->FB && nouveau_bo_map(pNv->FB, NOUVEAU_BO_RDWR)) ||
1750             (pNv->GART && nouveau_bo_map(pNv->GART, NOUVEAU_BO_RDWR)) ||
1751             (pNv->CLUT && nouveau_bo_map(pNv->CLUT, NOUVEAU_BO_RDWR)) ||
1752             nouveau_bo_map(pNv->Cursor, NOUVEAU_BO_RDWR) ||
1753             (pNv->randr12_enable && nouveau_bo_map(pNv->Cursor2, NOUVEAU_BO_RDWR))) {
1754                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1755                            "Failed to map pinned buffers\n");
1756                 return FALSE;
1757         }
1758
1759         return TRUE;
1760 }
1761
1762 /*
1763  * Unmap the framebuffer and MMIO memory.
1764  */
1765
1766 static Bool
1767 NVUnmapMem(ScrnInfoPtr pScrn)
1768 {
1769         NVPtr pNv = NVPTR(pScrn);
1770
1771         nouveau_bo_del(&pNv->FB);
1772         nouveau_bo_del(&pNv->GART);
1773         nouveau_bo_del(&pNv->Cursor);
1774         if (pNv->randr12_enable) {
1775                 nouveau_bo_del(&pNv->Cursor2);
1776         }
1777         nouveau_bo_del(&pNv->CLUT);
1778
1779         return TRUE;
1780 }
1781
1782
1783 /*
1784  * Initialise a new mode.
1785  */
1786
1787 static Bool
1788 NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
1789 {
1790     vgaHWPtr hwp = VGAHWPTR(pScrn);
1791     vgaRegPtr vgaReg;
1792     NVPtr pNv = NVPTR(pScrn);
1793     NVRegPtr nvReg;
1794
1795     /* Initialise the ModeReg values */
1796     if (!vgaHWInit(pScrn, mode))
1797         return FALSE;
1798     pScrn->vtSema = TRUE;
1799
1800     vgaReg = &hwp->ModeReg;
1801     nvReg = &pNv->ModeReg;
1802
1803     if(!NVDACInit(pScrn, mode))
1804         return FALSE;
1805
1806     NVLockUnlock(pScrn, 0);
1807     if(pNv->twoHeads) {
1808         nvWriteCurVGA(pNv, NV_VGA_CRTCX_OWNER, nvReg->crtcOwner);
1809         NVLockUnlock(pScrn, 0);
1810     }
1811
1812     /* Program the registers */
1813     vgaHWProtect(pScrn, TRUE);
1814
1815     NVDACRestore(pScrn, vgaReg, nvReg, FALSE);
1816
1817 #if X_BYTE_ORDER == X_BIG_ENDIAN
1818     /* turn on LFB swapping */
1819     {
1820         unsigned char tmp;
1821
1822         tmp = nvReadCurVGA(pNv, NV_VGA_CRTCX_SWAPPING);
1823         tmp |= (1 << 7);
1824         nvWriteCurVGA(pNv, NV_VGA_CRTCX_SWAPPING, tmp);
1825     }
1826 #endif
1827
1828     if (!pNv->NoAccel)
1829             NVResetGraphics(pScrn);
1830
1831     vgaHWProtect(pScrn, FALSE);
1832
1833     pNv->CurrentLayout.mode = mode;
1834
1835     return TRUE;
1836 }
1837
1838 #define NV_MODE_PRIVATE_ID 0x4F37ED65
1839 #define NV_MODE_PRIVATE_SIZE 2
1840
1841 /*
1842  * Match a private mode flag in a special function.
1843  * I don't want ugly casting all over the code.
1844  */
1845 Bool
1846 NVMatchModePrivate(DisplayModePtr mode, uint32_t flags)
1847 {
1848         if (!mode)
1849                 return FALSE;
1850         if (!mode->Private)
1851                 return FALSE;
1852         if (mode->PrivSize != NV_MODE_PRIVATE_SIZE)
1853                 return FALSE;
1854         if (mode->Private[0] != NV_MODE_PRIVATE_ID)
1855                 return FALSE;
1856
1857         if (mode->Private[1] & flags)
1858                 return TRUE;
1859
1860         return FALSE;
1861 }
1862
1863 static void
1864 NVRestoreConsole(xf86OutputPtr output, DisplayModePtr mode)
1865 {
1866         if (!output->crtc)
1867                 return;
1868
1869         xf86CrtcPtr crtc = output->crtc;
1870         Bool need_unlock;
1871
1872         if (!crtc->enabled)
1873                 return;
1874
1875         xf86SetModeCrtc(mode, INTERLACE_HALVE_V);
1876         DisplayModePtr adjusted_mode = xf86DuplicateMode(mode);
1877
1878         /* Sequence mimics a normal modeset. */
1879         output->funcs->dpms(output, DPMSModeOff);
1880         crtc->funcs->dpms(crtc, DPMSModeOff);
1881         need_unlock = crtc->funcs->lock(crtc);
1882         output->funcs->mode_fixup(output, mode, adjusted_mode);
1883         crtc->funcs->mode_fixup(crtc, mode, adjusted_mode);
1884         output->funcs->prepare(output);
1885         crtc->funcs->prepare(crtc);
1886         /* Always use offset (0,0). */
1887         crtc->funcs->mode_set(crtc, mode, adjusted_mode, 0, 0);
1888         output->funcs->mode_set(output, mode, adjusted_mode);
1889         crtc->funcs->commit(crtc);
1890         output->funcs->commit(output);
1891         if (need_unlock)
1892                 crtc->funcs->unlock(crtc);
1893         /* Always turn on outputs afterwards. */
1894         output->funcs->dpms(output, DPMSModeOn);
1895         crtc->funcs->dpms(crtc, DPMSModeOn);
1896
1897         /* Free mode. */
1898         xfree(adjusted_mode);
1899 }
1900
1901 #define MODEPREFIX(name) NULL, NULL, name, 0,M_T_DRIVER
1902 #define MODESUFFIX   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0
1903
1904 /* hblankstart: 648, hblankend: 792, vblankstart: 407, vblankend: 442 for 640x400 */
1905 static DisplayModeRec VGAModes[2] = {
1906         { MODEPREFIX("640x400"),    28320, /*25175,*/ 640,  680,  776,  800, 0,  400,  412,  414,  449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 640x400 */
1907         { MODEPREFIX("720x400"),    28320,  720,  738,  846,  900, 0,  400,  412,  414,  449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 720x400@70Hz */
1908 };
1909
1910 /*
1911  * Restore the initial (text) mode.
1912  */
1913 static void
1914 NVRestore(ScrnInfoPtr pScrn)
1915 {
1916         vgaHWPtr hwp = VGAHWPTR(pScrn);
1917         vgaRegPtr vgaReg = &hwp->SavedReg;
1918         NVPtr pNv = NVPTR(pScrn);
1919         NVRegPtr nvReg = &pNv->SavedReg;
1920
1921         if (pNv->randr12_enable) {
1922                 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
1923                 RIVA_HW_STATE *state = &pNv->ModeReg;
1924                 int i;
1925
1926                 /* Let's wipe some state regs */
1927                 state->vpll1_a = 0;
1928                 state->vpll1_b = 0;
1929                 state->vpll2_a = 0;
1930                 state->vpll2_b = 0;
1931                 state->reg594 = 0;
1932                 state->reg580 = 0;
1933                 state->pllsel = 0;
1934                 state->sel_clk = 0;
1935                 state->crosswired = FALSE;
1936
1937                 if (pNv->new_restore) { /* new style restore. */
1938                         for (i = 0; i < xf86_config->num_crtc; i++) {
1939                                 NVCrtcLockUnlock(xf86_config->crtc[i], 0);
1940                         }
1941
1942                         /* Reset some values according to stored console value, to avoid confusion later on. */
1943                         /* Otherwise we end up with corrupted terminals. */
1944                         for (i = 0; i < xf86_config->num_crtc; i++) {
1945                                 NVCrtcPrivatePtr nv_crtc = xf86_config->crtc[i]->driver_private;
1946                                 RIVA_HW_STATE *state = &pNv->SavedReg;
1947                                 NVCrtcRegPtr savep = &state->crtc_reg[nv_crtc->head];
1948                                 uint8_t pixelDepth = pNv->console_mode[nv_crtc->head].depth/8;
1949                                 /* restore PIXEL value */
1950                                 uint32_t pixel = NVReadVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_PIXEL) & ~(0xF);
1951                                 pixel |= (pixelDepth > 2) ? 3 : pixelDepth;
1952                                 NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_PIXEL, pixel);
1953                                 /* restore HDisplay and VDisplay */
1954                                 NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_HDISPE, (pNv->console_mode[nv_crtc->head].x_res)/8 - 1);
1955                                 NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_VDISPE, (pNv->console_mode[nv_crtc->head].y_res) - 1);
1956                                 /* restore CR52 */
1957                                 NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_52, pNv->misc_info.crtc_reg_52[nv_crtc->head]);
1958                                 /* restore crtc base */
1959                                 NVCrtcWriteCRTC(xf86_config->crtc[i], NV_CRTC_START, pNv->console_mode[nv_crtc->head].fb_start);
1960                                 /* Restore general control */
1961                                 NVCrtcWriteRAMDAC(xf86_config->crtc[i], NV_RAMDAC_GENERAL_CONTROL, pNv->misc_info.ramdac_general_control[nv_crtc->head]);
1962                                 /* Restore CR5758 */
1963                                 if (pNv->NVArch >= 0x17 && pNv->twoHeads)
1964                                         for (i = 0; i < 0x10; i++)
1965                                                 NVWriteVgaCrtc5758(pNv, nv_crtc->head, i, savep->CR58[i]);
1966                         }
1967
1968                         /* Restore outputs when enabled. */
1969                         for (i = 0; i < xf86_config->num_output; i++) {
1970                                 xf86OutputPtr output = xf86_config->output[i];
1971                                 if (!xf86_config->output[i]->crtc) /* not enabled? */
1972                                         continue;
1973
1974                                 NVOutputPrivatePtr nv_output = output->driver_private;
1975                                 Bool is_fp = FALSE;
1976                                 DisplayModePtr mode = NULL;
1977                                 DisplayModePtr good_mode = NULL;
1978                                 NVConsoleMode *console = &pNv->console_mode[i];
1979                                 DisplayModePtr modes = output->probed_modes;
1980                                 if (!modes) /* no modes means no restore */
1981                                         continue;
1982
1983                                 if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS)
1984                                         is_fp = TRUE;
1985
1986                                 if (console->vga_mode) {
1987                                         /* We support 640x400 and 720x400 vga modes. */
1988                                         if (console->x_res == 720)
1989                                                 good_mode = &VGAModes[1];
1990                                         else
1991                                                 good_mode = &VGAModes[0];
1992                                         if (!good_mode) /* No suitable mode found. */
1993                                                 continue;
1994                                 } else {
1995                                         NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
1996                                         uint32_t old_clock = nv_get_clock_from_crtc(pScrn, &pNv->SavedReg, nv_crtc->head);
1997                                         uint32_t clock_diff = 0xFFFFFFFF;
1998                                         for (mode = modes; mode != NULL; mode = mode->next) {
1999                                                 /* We only have the first 8 bits of y_res - 1. */
2000                                                 /* And it's sometimes bogus. */
2001                                                 if (is_fp || !console->enabled) { /* digital outputs are run at their native clock */
2002                                                         if (mode->HDisplay == console->x_res) {
2003                                                                 if (!good_mode) /* Pick any match, in case we don't find a 60.0 Hz mode. */
2004                                                                         good_mode = mode;
2005                                                                 /* Pick a 60.0 Hz mode if there is one. */
2006                                                                 if (mode->VRefresh > 59.95 && mode->VRefresh < 60.05) {
2007                                                                         good_mode = mode;
2008                                                                         break;
2009                                                                 }
2010                                                         }
2011                                                 } else {
2012                                                         if (mode->HDisplay == console->x_res) {
2013                                                                 int temp_diff = mode->Clock - old_clock;
2014                                                                 if (temp_diff < 0)
2015                                                                         temp_diff *= -1;
2016                                                                 if (temp_diff < clock_diff) { /* converge on the closest mode */
2017                                                                         clock_diff = temp_diff;
2018                                                                         good_mode = mode;
2019                                                                 }
2020                                                         }
2021                                                 }
2022                                         }
2023                                         if (!good_mode) /* No suitable mode found. */
2024                                                 continue;
2025                                 }
2026
2027                                 mode = xf86DuplicateMode(good_mode);
2028
2029                                 INT32 *nv_mode = xnfcalloc(sizeof(INT32)*NV_MODE_PRIVATE_SIZE, 1);
2030
2031                                 /* A semi-unique identifier to avoid using other privates. */
2032                                 nv_mode[0] = NV_MODE_PRIVATE_ID;
2033
2034                                 if (console->vga_mode)
2035                                         nv_mode[1] |= NV_MODE_VGA;
2036
2037                                 nv_mode[1] |= NV_MODE_CONSOLE;
2038
2039                                 mode->Private = nv_mode;
2040                                 mode->PrivSize = NV_MODE_PRIVATE_SIZE;
2041
2042                                 uint8_t scale_backup = nv_output->scaling_mode;
2043                                 if (nv_output->type == OUTPUT_LVDS || nv_output->type == OUTPUT_TMDS)
2044                                         nv_output->scaling_mode = SCALE_FULLSCREEN;
2045
2046                                 NVRestoreConsole(output, mode);
2047
2048                                 /* Restore value, so we reenter X properly. */
2049                                 nv_output->scaling_mode = scale_backup;
2050
2051                                 xfree(mode->Private);
2052                                 xfree(mode);
2053                         }
2054
2055                         /* Force hide the cursor. */
2056                         for (i = 0; i < xf86_config->num_crtc; i++) {
2057                                 xf86_config->crtc[i]->funcs->hide_cursor(xf86_config->crtc[i]);
2058                         }
2059
2060                         /* Lock the crtc's. */
2061                         for (i = 0; i < xf86_config->num_crtc; i++) {
2062                                 NVCrtcLockUnlock(xf86_config->crtc[i], 1);
2063                         }
2064
2065                         /* Let's clean our slate once again, so we always rewrite vpll's upon returning to X. */
2066                         state->vpll1_a = 0;
2067                         state->vpll1_b = 0;
2068                         state->vpll2_a = 0;
2069                         state->vpll2_b = 0;
2070                         state->reg594 = 0;
2071                         state->reg580 = 0;
2072                         state->pllsel = 0;
2073                         state->sel_clk = 0;
2074                         state->crosswired = FALSE;
2075                 } else {
2076                         for (i = 0; i < xf86_config->num_crtc; i++) {
2077                                 NVCrtcLockUnlock(xf86_config->crtc[i], 0);
2078                         }
2079
2080                         /* Some aspects of an output needs to be restore before the crtc. */
2081                         /* In my case this has to do with the mode that i get at very low resolutions. */
2082                         /* If i do this at the end, it will not be restored properly */
2083                         for (i = 0; i < xf86_config->num_output; i++) {
2084                                 NVOutputPrivatePtr nv_output2 = xf86_config->output[i]->driver_private;
2085                                 NVOutputRegPtr regp = &nvReg->dac_reg[nv_output2->preferred_output];
2086                                 Bool crosswired = regp->TMDS[0x4] & (1 << 3);
2087                                 /* Let's guess the bios state ;-) */
2088                                 if (nv_output2->type == OUTPUT_TMDS)
2089                                         ErrorF("Restoring TMDS timings, before restoring anything else\n");
2090                                 if (nv_output2->type == OUTPUT_LVDS)
2091                                         ErrorF("Restoring LVDS timings, before restoring anything else\n");
2092                                 if (nv_output2->type == OUTPUT_TMDS || nv_output2->type == OUTPUT_LVDS) {
2093                                         uint32_t clock = nv_calc_tmds_clock_from_pll(xf86_config->output[i]);
2094                                         nv_set_tmds_registers(xf86_config->output[i], clock, TRUE, crosswired);
2095                                 }
2096                         }
2097
2098                         /* This needs to happen before the crtc restore happens. */
2099                         for (i = 0; i < xf86_config->num_output; i++) {
2100                                 NVOutputPrivatePtr nv_output = xf86_config->output[i]->driver_private;
2101                                 /* Select the default output resource for consistent restore. */
2102                                 if (ffs(pNv->dcb_table.entry[nv_output->dcb_entry].or) & OUTPUT_1) {
2103                                         nv_output->output_resource = 1;
2104                                 } else {
2105                                         nv_output->output_resource = 0;
2106                                 }
2107                         }
2108
2109                         for (i = 0; i < xf86_config->num_crtc; i++) {
2110                                 NVCrtcPrivatePtr nv_crtc = xf86_config->crtc[i]->driver_private;
2111                                 /* Restore this, so it doesn't mess with restore. */
2112                                 pNv->fp_regs_owner[nv_crtc->head] = nv_crtc->head;
2113                         }
2114
2115                         for (i = 0; i < xf86_config->num_crtc; i++) {
2116                                 xf86_config->crtc[i]->funcs->restore(xf86_config->crtc[i]);
2117                         }
2118
2119                         for (i = 0; i < xf86_config->num_output; i++) {
2120                                 xf86_config->output[i]->funcs->restore(xf86_config->
2121                                                                        output[i]);
2122                         }
2123
2124                         for (i = 0; i < xf86_config->num_crtc; i++) {
2125                                 NVCrtcLockUnlock(xf86_config->crtc[i], 1);
2126                         }
2127                 }
2128
2129                 /* bit28: transmit text mode on both heads? */
2130                 if (pNv->twoHeads) {
2131                         uint32_t debug1 = nvReadMC(pNv, NV_PBUS_DEBUG_1);
2132                         nvWriteMC(pNv, NV_PBUS_DEBUG_1, debug1 | (1 << 28));
2133                 }
2134         } else {
2135                 NVLockUnlock(pScrn, 0);
2136
2137                 if(pNv->twoHeads) {
2138                         nvWriteCurVGA(pNv, NV_VGA_CRTCX_OWNER, pNv->crtc_active[1] * 0x3);
2139                         NVLockUnlock(pScrn, 0);
2140                 }
2141
2142                 /* Only restore text mode fonts/text for the primary card */
2143                 vgaHWProtect(pScrn, TRUE);
2144                 NVDACRestore(pScrn, vgaReg, nvReg, pNv->Primary);
2145                 vgaHWProtect(pScrn, FALSE);
2146         }
2147
2148         if (pNv->twoHeads && !pNv->new_restore) {
2149                 NVLockUnlock(pScrn, 0);
2150                 ErrorF("Restoring CRTC_OWNER to %d\n", pNv->vtOWNER);
2151                 NVWriteVGA(pNv, 0, NV_VGA_CRTCX_OWNER, pNv->vtOWNER);
2152                 NVLockUnlock(pScrn, 1);
2153         }
2154 }
2155
2156 static void
2157 NVLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
2158               LOCO * colors, VisualPtr pVisual)
2159 {
2160         xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
2161         int c;
2162         int i, j, index;
2163         CARD16 lut_r[256], lut_g[256], lut_b[256];
2164
2165         for (c = 0; c < xf86_config->num_crtc; c++) {
2166                 xf86CrtcPtr crtc = xf86_config->crtc[c];
2167
2168                 if (crtc->enabled == 0)
2169                         continue;
2170
2171                 /* code borrowed from intel driver */
2172                 switch (pScrn->depth) {
2173                 case 15:
2174                         for (i = 0; i < numColors; i++) {
2175                                 index = indices[i];
2176                                 for (j = 0; j < 8; j++) {
2177                                         lut_r[index * 8 + j] = colors[index].red << 8;
2178                                         lut_g[index * 8 + j] = colors[index].green << 8;
2179                                         lut_b[index * 8 + j] = colors[index].blue << 8;
2180                                 }
2181                         }
2182                 case 16:
2183                         for (i = 0; i < numColors; i++) {
2184                                 index = indices[i];
2185
2186                                 if (i <= 31) {
2187                                         for (j = 0; j < 8; j++) {
2188                                                 lut_r[index * 8 + j] = colors[index].red << 8;
2189                                                 lut_b[index * 8 + j] = colors[index].blue << 8;
2190                                         }
2191                                 }
2192
2193                                 for (j = 0; j < 4; j++) {
2194                                         lut_g[index * 4 + j] = colors[index].green << 8;
2195                                 }
2196                         }
2197                 default:
2198                         for (i = 0; i < numColors; i++) {
2199                                 index = indices[i];
2200                                 lut_r[index] = colors[index].red << 8;
2201                                 lut_g[index] = colors[index].green << 8;
2202                                 lut_b[index] = colors[index].blue << 8;
2203                         }
2204                         break;
2205                 }
2206
2207                 /* Make the change through RandR */
2208                 RRCrtcGammaSet(crtc->randr_crtc, lut_r, lut_g, lut_b);
2209         }
2210 }
2211
2212 #define DEPTH_SHIFT(val, w) ((val << (8 - w)) | (val >> ((w << 1) - 8)))
2213 #define COLOR(c) (unsigned int)(0x3fff * ((c)/255.0))
2214 static void
2215 NV50LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
2216                 LOCO * colors, VisualPtr pVisual)
2217 {
2218         NVPtr pNv = NVPTR(pScrn);
2219         int i, index;
2220         volatile struct {
2221                 unsigned short red, green, blue, unused;
2222         } *lut = (void *) pNv->CLUT->map;
2223
2224         switch (pScrn->depth) {
2225         case 15:
2226                 for (i = 0; i < numColors; i++) {
2227                         index = indices[i];
2228                         lut[DEPTH_SHIFT(index, 5)].red =
2229                             COLOR(colors[index].red);
2230                         lut[DEPTH_SHIFT(index, 5)].green =
2231                             COLOR(colors[index].green);
2232                         lut[DEPTH_SHIFT(index, 5)].blue =
2233                             COLOR(colors[index].blue);
2234                 }
2235                 break;
2236         case 16:
2237                 for (i = 0; i < numColors; i++) {
2238                         index = indices[i];
2239                         lut[DEPTH_SHIFT(index, 6)].green =
2240                             COLOR(colors[index].green);
2241                         if (index < 32) {
2242                                 lut[DEPTH_SHIFT(index, 5)].red =
2243                                     COLOR(colors[index].red);
2244                                 lut[DEPTH_SHIFT(index, 5)].blue =
2245                                     COLOR(colors[index].blue);
2246                         }
2247                 }
2248                 break;
2249         default:
2250                 for (i = 0; i < numColors; i++) {
2251                         index = indices[i];
2252                         lut[index].red = COLOR(colors[index].red);
2253                         lut[index].green = COLOR(colors[index].green);
2254                         lut[index].blue = COLOR(colors[index].blue);
2255                 }
2256                 break;
2257         }
2258 }
2259
2260
2261 static void NVBacklightEnable(NVPtr pNv,  Bool on)
2262 {
2263     /* This is done differently on each laptop.  Here we
2264        define the ones we know for sure. */
2265
2266 #if defined(__powerpc__)
2267     if((pNv->Chipset == 0x10DE0179) ||
2268        (pNv->Chipset == 0x10DE0189) ||
2269        (pNv->Chipset == 0x10DE0329))
2270     {
2271        /* NV17,18,34 Apple iMac, iBook, PowerBook */
2272       CARD32 tmp_pmc, tmp_pcrt;
2273       tmp_pmc = nvReadMC(pNv, NV_PBUS_DEBUG_DUALHEAD_CTL) & 0x7FFFFFFF;
2274       tmp_pcrt = NVReadCRTC(pNv, 0, NV_PCRTC_GPIO_EXT) & 0xFFFFFFFC;
2275       if(on) {
2276           tmp_pmc |= (1 << 31);
2277           tmp_pcrt |= 0x1;
2278       }
2279       nvWriteMC(pNv, NV_PBUS_DEBUG_DUALHEAD_CTL, tmp_pmc);
2280       NVWriteCRTC(pNv, 0, NV_PCRTC_GPIO_EXT, tmp_pcrt);
2281     }
2282 #endif
2283
2284     if(pNv->LVDS) {
2285        if(pNv->twoHeads && ((pNv->Chipset & 0x0ff0) != CHIPSET_NV11)) {
2286            nvWriteMC(pNv, 0x130C, on ? 3 : 7);
2287        }
2288     } else {
2289        CARD32 fpcontrol;
2290
2291        fpcontrol = nvReadCurRAMDAC(pNv, NV_RAMDAC_FP_CONTROL) & 0xCfffffCC;
2292
2293        /* cut the TMDS output */
2294        if(on) fpcontrol |= pNv->fpSyncs;
2295        else fpcontrol |= 0x20000022;
2296
2297        nvWriteCurRAMDAC(pNv, NV_RAMDAC_FP_CONTROL, fpcontrol);
2298     }
2299 }
2300
2301 static void
2302 NVDPMSSetLCD(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
2303 {
2304   NVPtr pNv = NVPTR(pScrn);
2305
2306   if (!pScrn->vtSema) return;
2307
2308   vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
2309
2310   switch (PowerManagementMode) {
2311   case DPMSModeStandby:  /* HSync: Off, VSync: On */
2312   case DPMSModeSuspend:  /* HSync: On, VSync: Off */
2313   case DPMSModeOff:      /* HSync: Off, VSync: Off */
2314     NVBacklightEnable(pNv, 0);
2315     break;
2316   case DPMSModeOn:       /* HSync: On, VSync: On */
2317     NVBacklightEnable(pNv, 1);
2318   default:
2319     break;
2320   }
2321 }
2322
2323
2324 static void
2325 NVDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
2326 {
2327   unsigned char crtc1A;
2328   vgaHWPtr hwp = VGAHWPTR(pScrn);
2329
2330   if (!pScrn->vtSema) return;
2331
2332   crtc1A = hwp->readCrtc(hwp, 0x1A) & ~0xC0;
2333
2334   switch (PowerManagementMode) {
2335   case DPMSModeStandby:  /* HSync: Off, VSync: On */
2336     crtc1A |= 0x80;
2337     break;
2338   case DPMSModeSuspend:  /* HSync: On, VSync: Off */
2339     crtc1A |= 0x40;
2340     break;
2341   case DPMSModeOff:      /* HSync: Off, VSync: Off */
2342     crtc1A |= 0xC0;
2343     break;
2344   case DPMSModeOn:       /* HSync: On, VSync: On */
2345   default:
2346     break;
2347   }
2348
2349   /* vgaHWDPMSSet will merely cut the dac output */
2350   vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
2351
2352   hwp->writeCrtc(hwp, 0x1A, crtc1A);
2353 }
2354
2355
2356 /* Mandatory */
2357
2358 /* This gets called at the start of each server generation */
2359
2360 static Bool
2361 NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
2362 {
2363         ScrnInfoPtr pScrn;
2364         vgaHWPtr hwp;
2365         NVPtr pNv;
2366         int ret;
2367         VisualPtr visual;
2368         unsigned char *FBStart;
2369         int width, height, displayWidth, shadowHeight, i;
2370
2371         /*
2372          * First get the ScrnInfoRec
2373          */
2374         pScrn = xf86Screens[pScreen->myNum];
2375
2376         hwp = VGAHWPTR(pScrn);
2377         pNv = NVPTR(pScrn);
2378
2379         /* Map the VGA memory when the primary video */
2380         if (pNv->Primary) {
2381                 hwp->MapSize = 0x10000;
2382                 if (!vgaHWMapMem(pScrn))
2383                         return FALSE;
2384         }
2385
2386         /* First init DRI/DRM */
2387         if (!NVDRIScreenInit(pScrn))
2388                 return FALSE;
2389
2390         /* Allocate and map memory areas we need */
2391         if (!NVMapMem(pScrn))
2392                 return FALSE;
2393
2394         if (!pNv->NoAccel) {
2395                 /* Init DRM - Alloc FIFO */
2396                 if (!NVInitDma(pScrn))
2397                         return FALSE;
2398
2399                 /* setup graphics objects */
2400                 if (!NVAccelCommonInit(pScrn))
2401                         return FALSE;
2402         }
2403
2404 #if NOUVEAU_EXA_PIXMAPS
2405         if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN,
2406                         0, NOUVEAU_ALIGN(pScrn->virtualX, 64) * NOUVEAU_ALIGN(pScrn->virtualY, 64) *
2407                         (pScrn->bitsPerPixel >> 3), &pNv->FB)) {
2408                 ErrorF("Failed to allocate memory for screen pixmap.\n");
2409                 return FALSE;
2410         }
2411 #endif
2412
2413         if (!pNv->randr12_enable) {
2414                 /* Save the current state */
2415                 NVSave(pScrn);
2416                 /* Initialise the first mode */
2417                 if (!NVModeInit(pScrn, pScrn->currentMode))
2418                         return FALSE;
2419
2420                 /* Darken the screen for aesthetic reasons and set the viewport */
2421                 NVSaveScreen(pScreen, SCREEN_SAVER_ON);
2422                 pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
2423         } else {
2424                 pScrn->memPhysBase = pNv->VRAMPhysical;
2425                 pScrn->fbOffset = 0;
2426
2427                 /* Gather some misc info before the randr stuff kicks in */
2428                 if (pNv->Architecture >= NV_ARCH_10) {
2429                         pNv->misc_info.crtc_reg_52[0] = NVReadVGA(pNv, 0, NV_VGA_CRTCX_52);
2430                         pNv->misc_info.crtc_reg_52[1] = NVReadVGA(pNv, 1, NV_VGA_CRTCX_52);
2431                 }
2432                 if (pNv->Architecture == NV_ARCH_40) {
2433                         pNv->misc_info.ramdac_0_reg_580 = NVReadRAMDAC(pNv, 0, NV_RAMDAC_580);
2434                         pNv->misc_info.reg_c040 = nvReadMC(pNv, 0xc040);
2435                 }
2436                 pNv->misc_info.ramdac_general_control[0] = NVReadRAMDAC(pNv, 0, NV_RAMDAC_GENERAL_CONTROL);
2437                 pNv->misc_info.ramdac_general_control[1] = NVReadRAMDAC(pNv, 1, NV_RAMDAC_GENERAL_CONTROL);
2438                 pNv->misc_info.ramdac_0_pllsel = NVReadRAMDAC(pNv, 0, NV_RAMDAC_PLL_SELECT);
2439                 pNv->misc_info.sel_clk = NVReadRAMDAC(pNv, 0, NV_RAMDAC_SEL_CLK);
2440                 if (pNv->twoHeads) {
2441                         pNv->misc_info.output[0] = NVReadRAMDAC(pNv, 0, NV_RAMDAC_OUTPUT);
2442                         pNv->misc_info.output[1] = NVReadRAMDAC(pNv, 1, NV_RAMDAC_OUTPUT);
2443                 }
2444
2445                 for (i = 0; i <= pNv->twoHeads; i++) {
2446                         if (NVReadVGA(pNv, i, NV_VGA_CRTCX_PIXEL) & 0xf) { /* framebuffer mode */
2447                                 pNv->console_mode[i].vga_mode = FALSE;
2448                                 uint8_t var = NVReadVGA(pNv, i, NV_VGA_CRTCX_PIXEL) & 0xf;
2449                                 Bool filled = (NVReadRAMDAC(pNv, i, NV_RAMDAC_GENERAL_CONTROL) & 0x1000);
2450                                 switch (var){
2451                                         case 3:
2452                                                 if (filled)
2453                                                         pNv->console_mode[i].depth = 32;
2454                                                 else
2455                                                         pNv->console_mode[i].depth = 24;
2456                                                 /* This is pitch related. */
2457                                                 pNv->console_mode[i].bpp = 32;
2458                                                 break;
2459                                         case 2:
2460                                                 if (filled)
2461                                                         pNv->console_mode[i].depth = 16;
2462                                                 else
2463                                                         pNv->console_mode[i].depth = 15;
2464                                                 /* This is pitch related. */
2465                                                 pNv->console_mode[i].bpp = 16;
2466                                                 break;
2467                                         case 1:
2468                                                 /* 8bit mode is always filled? */
2469                                                 pNv->console_mode[i].depth = 8;
2470                                                 /* This is pitch related. */
2471                                                 pNv->console_mode[i].bpp = 8;
2472                                         default:
2473                                                 break;
2474                                 }
2475                         } else { /* vga mode */
2476                                 pNv->console_mode[i].vga_mode = TRUE;
2477                                 pNv->console_mode[i].bpp = 4;
2478                                 pNv->console_mode[i].depth = 4;
2479                         }
2480
2481                         pNv->console_mode[i].x_res = (NVReadVGA(pNv, i, NV_VGA_CRTCX_HDISPE) + 1) * 8;
2482                         pNv->console_mode[i].y_res = (NVReadVGA(pNv, i, NV_VGA_CRTCX_VDISPE) + 1); /* NV_VGA_CRTCX_VDISPE only contains the lower 8 bits. */
2483
2484                         pNv->console_mode[i].fb_start = NVReadCRTC(pNv, i, NV_CRTC_START);
2485
2486                         pNv->console_mode[i].enabled = FALSE;
2487
2488                         ErrorF("CRTC %d: Console mode: %dx%d depth: %d bpp: %d crtc_start: 0x%X\n", i, pNv->console_mode[i].x_res, pNv->console_mode[i].y_res, pNv->console_mode[i].depth, pNv->console_mode[i].bpp, pNv->console_mode[i].fb_start);
2489                 }
2490
2491                 /* Check if crtc's were enabled. */
2492                 if (pNv->misc_info.ramdac_0_pllsel & NV_RAMDAC_PLL_SELECT_PLL_SOURCE_VPLL) {
2493                         pNv->console_mode[0].enabled = TRUE;
2494                         ErrorF("CRTC 0 was enabled.\n");
2495                 }
2496
2497                 if (pNv->misc_info.ramdac_0_pllsel & NV_RAMDAC_PLL_SELECT_PLL_SOURCE_VPLL2) {
2498                         pNv->console_mode[1].enabled = TRUE;
2499                         ErrorF("CRTC 1 was enabled.\n");
2500                 }
2501
2502                 if (!NVEnterVT(scrnIndex, 0))
2503                         return FALSE;
2504                 NVSaveScreen(pScreen, SCREEN_SAVER_ON);
2505         }
2506
2507
2508         /*
2509          * The next step is to setup the screen's visuals, and initialise the
2510          * framebuffer code.  In cases where the framebuffer's default
2511          * choices for things like visual layouts and bits per RGB are OK,
2512          * this may be as simple as calling the framebuffer's ScreenInit()
2513          * function.  If not, the visuals will need to be setup before calling
2514          * a fb ScreenInit() function and fixed up after.
2515          *
2516          * For most PC hardware at depths >= 8, the defaults that fb uses
2517          * are not appropriate.  In this driver, we fixup the visuals after.
2518          */
2519
2520         /*
2521          * Reset the visual list.
2522          */
2523         miClearVisualTypes();
2524
2525         /* Setup the visuals we support. */
2526
2527         if (!miSetVisualTypes(pScrn->depth,
2528                                 miGetDefaultVisualMask(pScrn->depth), 8,
2529                                 pScrn->defaultVisual))
2530                 return FALSE;
2531         if (!miSetPixmapDepths ())
2532                 return FALSE;
2533
2534         /*
2535          * Call the framebuffer layer's ScreenInit function, and fill in other
2536          * pScreen fields.
2537          */
2538
2539         width = pScrn->virtualX;
2540         height = pScrn->virtualY;
2541         displayWidth = pScrn->displayWidth;
2542
2543         if(pNv->Rotate) {
2544                 height = pScrn->virtualX;
2545                 width = pScrn->virtualY;
2546         }
2547
2548         /* If RandR rotation is enabled, leave enough space in the
2549          * framebuffer for us to rotate the screen dimensions without
2550          * changing the pitch.
2551          */
2552         if(pNv->RandRRotation) {
2553                 shadowHeight = max(width, height);
2554         } else {
2555                 shadowHeight = height;
2556         }
2557
2558         if (pNv->ShadowFB) {
2559                 pNv->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width);
2560                 pNv->ShadowPtr = xalloc(pNv->ShadowPitch * shadowHeight);
2561                 displayWidth = pNv->ShadowPitch / (pScrn->bitsPerPixel >> 3);
2562                 FBStart = pNv->ShadowPtr;
2563         } else {
2564                 pNv->ShadowPtr = NULL;
2565                 FBStart = pNv->FB->map;
2566         }
2567
2568         switch (pScrn->bitsPerPixel) {
2569                 case 8:
2570                 case 16:
2571                 case 32:
2572                         ret = fbScreenInit(pScreen, FBStart, width, height,
2573                                 pScrn->xDpi, pScrn->yDpi,
2574                                 displayWidth, pScrn->bitsPerPixel);
2575                         break;
2576                 default:
2577                         xf86DrvMsg(scrnIndex, X_ERROR,
2578                                 "Internal error: invalid bpp (%d) in NVScreenInit\n",
2579                                 pScrn->bitsPerPixel);
2580                         ret = FALSE;
2581                         break;
2582         }
2583         if (!ret)
2584                 return FALSE;
2585
2586         if (pScrn->bitsPerPixel > 8) {
2587                 /* Fixup RGB ordering */
2588                 visual = pScreen->visuals + pScreen->numVisuals;
2589                 while (--visual >= pScreen->visuals) {
2590                         if ((visual->class | DynamicClass) == DirectColor) {
2591                                 visual->offsetRed = pScrn->offset.red;
2592                                 visual->offsetGreen = pScrn->offset.green;
2593                                 visual->offsetBlue = pScrn->offset.blue;
2594                                 visual->redMask = pScrn->mask.red;
2595                                 visual->greenMask = pScrn->mask.green;
2596                                 visual->blueMask = pScrn->mask.blue;
2597                         }
2598                 }
2599         }
2600
2601         fbPictureInit (pScreen, 0, 0);
2602
2603         xf86SetBlackWhitePixels(pScreen);
2604
2605         if (!pNv->NoAccel) {
2606                 if (!NVExaInit(pScreen))
2607                         return FALSE;
2608                 NVResetGraphics(pScrn);
2609         } else if (pNv->VRAMPhysicalSize / 2 < NOUVEAU_ALIGN(pScrn->virtualX, 64) * NOUVEAU_ALIGN(pScrn->virtualY, 64) * (pScrn->bitsPerPixel >> 3)) {
2610                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "The virtual screen size's resolution is too big for the video RAM framebuffer at this colour depth.\n");
2611                 return FALSE;
2612         }
2613
2614
2615         miInitializeBackingStore(pScreen);
2616         xf86SetBackingStore(pScreen);
2617         xf86SetSilkenMouse(pScreen);
2618
2619         /* Finish DRI init */
2620         NVDRIFinishScreenInit(pScrn);
2621
2622         /*
2623          * Initialize software cursor.
2624          * Must precede creation of the default colormap.
2625          */
2626         miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
2627
2628         /*
2629          * Initialize HW cursor layer.
2630          * Must follow software cursor initialization.
2631          */
2632         if (pNv->HWCursor) {
2633                 if (pNv->Architecture < NV_ARCH_50 && !pNv->randr12_enable)
2634                         ret = NVCursorInit(pScreen);
2635                 else if (pNv->Architecture < NV_ARCH_50 && pNv->randr12_enable)
2636                         ret = NVCursorInitRandr12(pScreen);
2637                 else
2638                         ret = NV50CursorInit(pScreen);
2639
2640                 if (ret != TRUE) {
2641                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
2642                                 "Hardware cursor initialization failed\n");
2643                         pNv->HWCursor = FALSE;
2644                 }
2645         }
2646
2647         if (pNv->randr12_enable) {
2648                 xf86DPMSInit(pScreen, xf86DPMSSet, 0);
2649
2650                 if (!xf86CrtcScreenInit(pScreen))
2651                         return FALSE;
2652
2653                 pNv->PointerMoved = pScrn->PointerMoved;
2654                 pScrn->PointerMoved = NVPointerMoved;
2655         }
2656
2657         /* Initialise default colourmap */
2658         if (!miCreateDefColormap(pScreen))
2659                 return FALSE;
2660
2661         /*
2662          * Initialize colormap layer.
2663          * Must follow initialization of the default colormap
2664          */
2665         if (!pNv->randr12_enable) {
2666                 if(!xf86HandleColormaps(pScreen, 256, 8, NVDACLoadPalette,
2667                                 NULL, CMAP_RELOAD_ON_MODE_SWITCH | CMAP_PALETTED_TRUECOLOR))
2668                 return FALSE;
2669         } else {
2670                 if (pNv->Architecture < NV_ARCH_50) {
2671                         if (!xf86HandleColormaps(pScreen, 256, 8, NVLoadPalette,
2672                                                 NULL,
2673                                                 CMAP_RELOAD_ON_MODE_SWITCH |
2674                                                 CMAP_PALETTED_TRUECOLOR))
2675                         return FALSE;
2676                 } else {
2677                         if (!xf86HandleColormaps(pScreen, 256, 8, NV50LoadPalette,
2678                                                 NULL, CMAP_PALETTED_TRUECOLOR))
2679                         return FALSE;
2680                 }
2681         }
2682
2683         if(pNv->ShadowFB) {
2684                 RefreshAreaFuncPtr refreshArea = NVRefreshArea;
2685
2686                 if (pNv->Rotate || pNv->RandRRotation) {
2687                         pNv->PointerMoved = pScrn->PointerMoved;
2688                         if (pNv->Rotate)
2689                                 pScrn->PointerMoved = NVPointerMoved;
2690
2691                         switch(pScrn->bitsPerPixel) {
2692                                 case 8: refreshArea = NVRefreshArea8;   break;
2693                                 case 16:        refreshArea = NVRefreshArea16;  break;
2694                                 case 32:        refreshArea = NVRefreshArea32;  break;
2695                         }
2696                         if(!pNv->RandRRotation) {
2697                                 xf86DisableRandR();
2698                                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
2699                                         "Driver rotation enabled, RandR disabled\n");
2700                         }
2701                 }
2702
2703                 ShadowFBInit(pScreen, refreshArea);
2704         }
2705
2706         if (!pNv->randr12_enable) {
2707                 if(pNv->FlatPanel) {
2708                         xf86DPMSInit(pScreen, NVDPMSSetLCD, 0);
2709                 } else {
2710                         xf86DPMSInit(pScreen, NVDPMSSet, 0);
2711                 }
2712         }
2713
2714         pScrn->memPhysBase = pNv->VRAMPhysical;
2715         pScrn->fbOffset = 0;
2716
2717         if (pNv->Rotate == 0 && !pNv->RandRRotation)
2718                 NVInitVideo(pScreen);
2719
2720         pScreen->SaveScreen = NVSaveScreen;
2721
2722         /* Wrap the current CloseScreen function */
2723         pNv->CloseScreen = pScreen->CloseScreen;
2724         pScreen->CloseScreen = NVCloseScreen;
2725
2726         pNv->BlockHandler = pScreen->BlockHandler;
2727         pScreen->BlockHandler = NVBlockHandler;
2728
2729         /* Install our DriverFunc.  We have to do it this way instead of using the
2730          * HaveDriverFuncs argument to xf86AddDriver, because InitOutput clobbers
2731          * pScrn->DriverFunc
2732          */
2733         if (!pNv->randr12_enable)
2734                 pScrn->DriverFunc = NVDriverFunc;
2735
2736         /* Report any unused options (only for the first generation) */
2737         if (serverGeneration == 1) {
2738                 xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
2739         }
2740
2741         return TRUE;
2742 }
2743
2744 static Bool
2745 NVSaveScreen(ScreenPtr pScreen, int mode)
2746 {
2747     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
2748     NVPtr pNv = NVPTR(pScrn);
2749     int i;
2750     Bool on = xf86IsUnblank(mode);
2751
2752     if (pNv->randr12_enable) {
2753         xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
2754         if (pScrn->vtSema && pNv->Architecture < NV_ARCH_50) {
2755             for (i = 0; i < xf86_config->num_crtc; i++) {
2756
2757                 if (xf86_config->crtc[i]->enabled) {
2758                     NVCrtcPrivatePtr nv_crtc = xf86_config->crtc[i]->driver_private;
2759                     NVBlankScreen(pNv, nv_crtc->head, !on);
2760                 }
2761             }
2762
2763         }
2764         return TRUE;
2765     }
2766
2767         return vgaHWSaveScreen(pScreen, mode);
2768 }
2769
2770 static void
2771 NVSave(ScrnInfoPtr pScrn)
2772 {
2773         NVPtr pNv = NVPTR(pScrn);
2774         NVRegPtr nvReg = &pNv->SavedReg;
2775
2776         if (pNv->randr12_enable) {
2777                 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
2778                 int i;
2779
2780                 for (i = 0; i < xf86_config->num_crtc; i++) {
2781                         xf86_config->crtc[i]->funcs->save(xf86_config->crtc[i]);
2782                 }
2783
2784                 for (i = 0; i < xf86_config->num_output; i++) {
2785                         xf86_config->output[i]->funcs->save(xf86_config->
2786                                                             output[i]);
2787                 }
2788         } else {
2789                 vgaHWPtr pVga = VGAHWPTR(pScrn);
2790                 vgaRegPtr vgaReg = &pVga->SavedReg;
2791                 NVLockUnlock(pScrn, 0);
2792                 if (pNv->twoHeads) {
2793                         nvWriteCurVGA(pNv, NV_VGA_CRTCX_OWNER, pNv->crtc_active[1] * 0x3);
2794                         NVLockUnlock(pScrn, 0);
2795                 }
2796
2797                 NVDACSave(pScrn, vgaReg, nvReg, pNv->Primary);
2798         }
2799 }
2800
2801 static Bool
2802 NVRandRGetInfo(ScrnInfoPtr pScrn, Rotation *rotations)
2803 {
2804     NVPtr pNv = NVPTR(pScrn);
2805
2806     if(pNv->RandRRotation)
2807        *rotations = RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_270;
2808     else
2809        *rotations = RR_Rotate_0;
2810
2811     return TRUE;
2812 }
2813
2814 static Bool
2815 NVRandRSetConfig(ScrnInfoPtr pScrn, xorgRRConfig *config)
2816 {
2817     NVPtr pNv = NVPTR(pScrn);
2818
2819     switch(config->rotation) {
2820         case RR_Rotate_0:
2821             pNv->Rotate = 0;
2822             pScrn->PointerMoved = pNv->PointerMoved;
2823             break;
2824
2825         case RR_Rotate_90:
2826             pNv->Rotate = -1;
2827             pScrn->PointerMoved = NVPointerMoved;
2828             break;
2829
2830         case RR_Rotate_270:
2831             pNv->Rotate = 1;
2832             pScrn->PointerMoved = NVPointerMoved;
2833             break;
2834
2835         default:
2836             xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
2837                     "Unexpected rotation in NVRandRSetConfig!\n");
2838             pNv->Rotate = 0;
2839             pScrn->PointerMoved = pNv->PointerMoved;
2840             return FALSE;
2841     }
2842
2843     return TRUE;
2844 }
2845
2846 static Bool
2847 NVDriverFunc(ScrnInfoPtr pScrn, xorgDriverFuncOp op, pointer data)
2848 {
2849     switch(op) {
2850        case RR_GET_INFO:
2851           return NVRandRGetInfo(pScrn, (Rotation*)data);
2852        case RR_SET_CONFIG:
2853           return NVRandRSetConfig(pScrn, (xorgRRConfig*)data);
2854        default:
2855           return FALSE;
2856     }
2857
2858     return FALSE;
2859 }