2 * Copyright 2006 Dave Airlie
3 * Copyright 2007 Maarten Maathuis
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * this code uses ideas taken from the NVIDIA nv driver - the nvidia license
26 * decleration is at the bottom of this file as it is rather ugly
40 #include "mipointer.h"
41 #include "windowstr.h"
43 #include <X11/extensions/render.h>
46 #include "nv_include.h"
48 const char *OutputType[] = {
57 const char *MonTypeName[7] = {
68 * TMDS registers are indirect 8 bit registers.
69 * Reading is straightforward, writing a bit odd.
70 * Reading: Write adress (+write protect bit, do not forget this), then read value.
71 * Writing: Write adress (+write protect bit), write value, write adress again and write it again (+write protect bit).
74 void NVWriteTMDS(NVPtr pNv, int ramdac, CARD32 tmds_reg, CARD32 val)
76 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL,
77 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
79 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA, val & 0xff);
81 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL, tmds_reg & 0xff);
82 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL,
83 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
86 CARD8 NVReadTMDS(NVPtr pNv, int ramdac, CARD32 tmds_reg)
88 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL,
89 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
91 return (nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA) & 0xff);
94 void NVOutputWriteTMDS(xf86OutputPtr output, CARD32 tmds_reg, CARD32 val)
96 NVOutputPrivatePtr nv_output = output->driver_private;
97 ScrnInfoPtr pScrn = output->scrn;
98 NVPtr pNv = NVPTR(pScrn);
101 /* Is TMDS programmed on a different output? */
102 /* Always choose the prefered ramdac, since that one contains the tmds stuff */
103 /* Assumption: there is always once output that can only run of the primary ramdac */
104 if (nv_output->valid_ramdac & RAMDAC_1) {
110 NVWriteTMDS(pNv, ramdac, tmds_reg, val);
113 CARD8 NVOutputReadTMDS(xf86OutputPtr output, CARD32 tmds_reg)
115 NVOutputPrivatePtr nv_output = output->driver_private;
116 ScrnInfoPtr pScrn = output->scrn;
117 NVPtr pNv = NVPTR(pScrn);
120 /* Is TMDS programmed on a different output? */
121 /* Always choose the prefered ramdac, since that one contains the tmds stuff */
122 /* Assumption: there is always once output that can only run of the primary ramdac */
123 if (nv_output->valid_ramdac & RAMDAC_1) {
129 return NVReadTMDS(pNv, ramdac, tmds_reg);
132 void NVOutputWriteRAMDAC(xf86OutputPtr output, CARD32 ramdac_reg, CARD32 val)
134 NVOutputPrivatePtr nv_output = output->driver_private;
135 ScrnInfoPtr pScrn = output->scrn;
136 NVPtr pNv = NVPTR(pScrn);
138 nvWriteRAMDAC(pNv, nv_output->ramdac, ramdac_reg, val);
141 CARD32 NVOutputReadRAMDAC(xf86OutputPtr output, CARD32 ramdac_reg)
143 NVOutputPrivatePtr nv_output = output->driver_private;
144 ScrnInfoPtr pScrn = output->scrn;
145 NVPtr pNv = NVPTR(pScrn);
147 return nvReadRAMDAC(pNv, nv_output->ramdac, ramdac_reg);
150 static void nv_output_backlight_enable(xf86OutputPtr output, Bool on)
152 ScrnInfoPtr pScrn = output->scrn;
153 NVPtr pNv = NVPTR(pScrn);
155 ErrorF("nv_output_backlight_enable is called for output %s to turn %s\n", output->name, on ? "on" : "off");
157 /* This is done differently on each laptop. Here we
158 * define the ones we know for sure. */
160 #if defined(__powerpc__)
161 if ((pNv->Chipset == 0x10DE0179) ||
162 (pNv->Chipset == 0x10DE0189) ||
163 (pNv->Chipset == 0x10DE0329)) {
164 /* NV17,18,34 Apple iMac, iBook, PowerBook */
165 CARD32 tmp_pmc, tmp_pcrt;
166 tmp_pmc = nvReadMC(pNv, 0x10F0) & 0x7FFFFFFF;
167 tmp_pcrt = nvReadCRTC0(pNv, NV_CRTC_081C) & 0xFFFFFFFC;
169 tmp_pmc |= (1 << 31);
172 nvWriteMC(pNv, 0x10F0, tmp_pmc);
173 nvWriteCRTC0(pNv, NV_CRTC_081C, tmp_pcrt);
177 if(pNv->twoHeads && ((pNv->Chipset & 0x0ff0) != CHIPSET_NV11))
178 nvWriteMC(pNv, 0x130C, on ? 3 : 7);
182 nv_lvds_output_dpms(xf86OutputPtr output, int mode)
184 NVOutputPrivatePtr nv_output = output->driver_private;
185 NVPtr pNv = NVPTR(output->scrn);
187 if (nv_output->ramdac != -1 && mode != DPMSModeOff) {
188 /* This was not a modeset, but a normal dpms call */
189 pNv->ramdac_active[nv_output->ramdac] = TRUE;
190 ErrorF("Activating ramdac %d\n", nv_output->ramdac);
191 nv_output->ramdac_assigned = TRUE;
195 case DPMSModeStandby:
196 case DPMSModeSuspend:
198 nv_output_backlight_enable(output, 0);
201 nv_output_backlight_enable(output, 1);
206 /* We may be going for modesetting, so we must reset the ramdacs */
207 if (nv_output->ramdac != -1 && mode == DPMSModeOff) {
208 pNv->ramdac_active[nv_output->ramdac] = FALSE;
209 ErrorF("Deactivating ramdac %d\n", nv_output->ramdac);
210 nv_output->ramdac_assigned = FALSE;
215 nv_analog_output_dpms(xf86OutputPtr output, int mode)
217 xf86CrtcPtr crtc = output->crtc;
218 NVOutputPrivatePtr nv_output = output->driver_private;
219 NVPtr pNv = NVPTR(output->scrn);
221 ErrorF("nv_analog_output_dpms is called with mode %d\n", mode);
223 if (nv_output->ramdac != -1) {
224 /* We may be going for modesetting, so we must reset the ramdacs */
225 if (mode == DPMSModeOff) {
226 pNv->ramdac_active[nv_output->ramdac] = FALSE;
227 ErrorF("Deactivating ramdac %d\n", nv_output->ramdac);
228 nv_output->ramdac_assigned = FALSE;
229 /* This was not a modeset, but a normal dpms call */
231 pNv->ramdac_active[nv_output->ramdac] = TRUE;
232 ErrorF("Activating ramdac %d\n", nv_output->ramdac);
233 nv_output->ramdac_assigned = TRUE;
238 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
240 ErrorF("nv_analog_output_dpms is called for CRTC %d with mode %d\n", nv_crtc->crtc, mode);
245 nv_tmds_output_dpms(xf86OutputPtr output, int mode)
247 xf86CrtcPtr crtc = output->crtc;
248 NVOutputPrivatePtr nv_output = output->driver_private;
249 NVPtr pNv = NVPTR(output->scrn);
251 ErrorF("nv_tmds_output_dpms is called with mode %d\n", mode);
253 /* We just woke up again from an actual monitor dpms and not a modeset prepare */
254 /* Put here since we actually need our ramdac to wake up again ;-) */
255 if (nv_output->ramdac != -1 && mode != DPMSModeOff) {
256 pNv->ramdac_active[nv_output->ramdac] = TRUE;
257 nv_output->ramdac_assigned = TRUE;
258 ErrorF("Activating ramdac %d\n", nv_output->ramdac);
261 /* Are we assigned a ramdac already?, else we will be activated during mode set */
262 if (crtc && nv_output->ramdac != -1) {
263 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
265 ErrorF("nv_tmds_output_dpms is called for CRTC %d with mode %d\n", nv_crtc->crtc, mode);
267 CARD32 fpcontrol = nvReadRAMDAC(pNv, nv_output->ramdac, NV_RAMDAC_FP_CONTROL);
269 case DPMSModeStandby:
270 case DPMSModeSuspend:
272 /* cut the TMDS output */
273 fpcontrol |= 0x20000022;
276 /* disable cutting the TMDS output */
277 fpcontrol &= ~0x20000022;
280 nvWriteRAMDAC(pNv, nv_output->ramdac, NV_RAMDAC_FP_CONTROL, fpcontrol);
283 /* We may be going for modesetting, so we must reset the ramdacs */
284 if (nv_output->ramdac != -1 && mode == DPMSModeOff) {
285 pNv->ramdac_active[nv_output->ramdac] = FALSE;
286 nv_output->ramdac_assigned = FALSE;
287 ErrorF("Deactivating ramdac %d\n", nv_output->ramdac);
291 /* Some registers are not set, because they are zero. */
292 /* This sequence matters, this is how the blob does it */
294 /* I made an educated guess were to put some of the lvds specific regs */
295 int tmds_regs[] = { 0x2f, 0x2e, 0x33, 0x04, 0x05, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x00, 0x01, 0x02, 0x40, 0x43, 0x2e, 0x2f, 0x04, 0x3a, 0x33, 0x04 };
296 /* Unfortunately, the guess breaks LVDS console restore, so don't do this
299 int tmds_regs[] = { 0x2f, 0x2e, 0x33, 0x04, 0x05, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x00, 0x01, 0x02, 0x2e, 0x2f, 0x04, 0x3a, 0x33, 0x04 };
301 void nv_output_save_state_ext(xf86OutputPtr output, RIVA_HW_STATE *state, Bool override)
303 NVOutputPrivatePtr nv_output = output->driver_private;
304 ScrnInfoPtr pScrn = output->scrn;
305 NVPtr pNv = NVPTR(pScrn);
309 regp = &state->dac_reg[nv_output->ramdac];
310 regp->test_control = NVOutputReadRAMDAC(output, NV_RAMDAC_TEST_CONTROL);
311 regp->unk_670 = NVOutputReadRAMDAC(output, NV_RAMDAC_670);
312 state->config = nvReadFB(pNv, NV_PFB_CFG0);
314 //regp->unk_900 = NVOutputReadRAMDAC(output, NV_RAMDAC_900);
316 /* This exists purely for proper text mode restore */
317 if (override) regp->output = NVOutputReadRAMDAC(output, NV_RAMDAC_OUTPUT);
319 /* I want to be able reset TMDS registers for DVI-D/DVI-A pairs for example */
320 /* Also write on VT restore */
321 if (nv_output->type != OUTPUT_LVDS || override )
322 for (i = 0; i < sizeof(tmds_regs)/sizeof(tmds_regs[0]); i++) {
323 regp->TMDS[tmds_regs[i]] = NVOutputReadTMDS(output, tmds_regs[i]);
327 void nv_output_load_state_ext(xf86OutputPtr output, RIVA_HW_STATE *state, Bool override)
329 NVOutputPrivatePtr nv_output = output->driver_private;
333 regp = &state->dac_reg[nv_output->ramdac];
335 /* This exists purely for proper text mode restore */
336 if (override) NVOutputWriteRAMDAC(output, NV_RAMDAC_OUTPUT, regp->output);
338 //NVOutputWriteRAMDAC(output, NV_RAMDAC_900, regp->unk_900);
340 NVOutputWriteRAMDAC(output, NV_RAMDAC_TEST_CONTROL, regp->test_control);
341 NVOutputWriteRAMDAC(output, NV_RAMDAC_670, regp->unk_670);
343 /* I want to be able reset TMDS registers for DVI-D/DVI-A pairs for example */
344 /* Also write on VT restore */
345 if (nv_output->type != OUTPUT_LVDS || override )
346 for (i = 0; i < sizeof(tmds_regs)/sizeof(tmds_regs[0]); i++) {
347 NVOutputWriteTMDS(output, tmds_regs[i], regp->TMDS[tmds_regs[i]]);
351 /* NOTE: Don't rely on this data for anything other than restoring VT's */
354 nv_output_save (xf86OutputPtr output)
356 ScrnInfoPtr pScrn = output->scrn;
357 NVPtr pNv = NVPTR(pScrn);
358 RIVA_HW_STATE *state;
359 NVOutputPrivatePtr nv_output = output->driver_private;
360 int ramdac_backup = nv_output->ramdac;
362 ErrorF("nv_output_save is called\n");
364 /* This is early init and we have not yet been assigned a ramdac */
365 /* Always choose the prefered ramdac, for consistentcy */
366 /* Assumption: there is always once output that can only run of the primary ramdac */
367 if (nv_output->valid_ramdac & RAMDAC_1) {
368 nv_output->ramdac = 1;
370 nv_output->ramdac = 0;
373 state = &pNv->SavedReg;
375 /* Due to strange mapping of outputs we could have swapped analog and digital */
376 /* So we force save all the registers */
377 nv_output_save_state_ext(output, state, TRUE);
379 /* restore previous state */
380 nv_output->ramdac = ramdac_backup;
384 nv_output_restore (xf86OutputPtr output)
386 ScrnInfoPtr pScrn = output->scrn;
387 NVPtr pNv = NVPTR(pScrn);
388 RIVA_HW_STATE *state;
389 NVOutputPrivatePtr nv_output = output->driver_private;
390 int ramdac_backup = nv_output->ramdac;
392 ErrorF("nv_output_restore is called\n");
394 /* We want consistent mode restoring and the ramdac entry is variable */
395 /* Always choose the prefered ramdac, for consistentcy */
396 /* Assumption: there is always once output that can only run of the primary ramdac */
397 if (nv_output->valid_ramdac & RAMDAC_1) {
398 nv_output->ramdac = 1;
400 nv_output->ramdac = 0;
403 state = &pNv->SavedReg;
405 /* Due to strange mapping of outputs we could have swapped analog and digital */
406 /* So we force load all the registers */
407 nv_output_load_state_ext(output, state, TRUE);
409 /* restore previous state */
410 nv_output->ramdac = ramdac_backup;
414 nv_output_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
416 if (pMode->Flags & V_DBLSCAN)
417 return MODE_NO_DBLESCAN;
419 if (pMode->Clock > 400000 || pMode->Clock < 25000)
420 return MODE_CLOCK_RANGE;
427 nv_output_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
428 DisplayModePtr adjusted_mode)
430 ErrorF("nv_output_mode_fixup is called\n");
436 nv_output_mode_set_regs(xf86OutputPtr output, DisplayModePtr mode, DisplayModePtr adjusted_mode)
438 NVOutputPrivatePtr nv_output = output->driver_private;
439 ScrnInfoPtr pScrn = output->scrn;
440 NVPtr pNv = NVPTR(pScrn);
441 RIVA_HW_STATE *state, *sv_state;
443 Bool is_lvds = FALSE;
444 NVOutputRegPtr regp, regp2, savep;
445 xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
448 xf86CrtcPtr crtc = output->crtc;
449 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
451 state = &pNv->ModeReg;
452 regp = &state->dac_reg[nv_output->ramdac];
453 /* The other ramdac */
454 regp2 = &state->dac_reg[(~(nv_output->ramdac)) & 1];
456 sv_state = &pNv->SavedReg;
457 savep = &sv_state->dac_reg[nv_output->ramdac];
459 if ((nv_output->type == OUTPUT_LVDS) || (nv_output->type == OUTPUT_TMDS)) {
461 if (nv_output->type == OUTPUT_LVDS) {
466 /* This is just a guess, there are probably more registers which need setting */
467 /* But we must start somewhere ;-) */
469 regp->TMDS[0x4] = 0x80;
470 /* Enable crosswired mode */
471 /* As far as i know, this may never be set on ramdac 0 tmds registers (ramdac 1 -> crosswired -> ramdac 0 tmds regs) */
472 /* This will upset the monitor, trust me, i know it :-( */
473 /* Now allowed for non-bios inited systems */
474 if ((nv_crtc->head == 0) && (nv_output->valid_ramdac & RAMDAC_1)) {
475 regp->TMDS[0x4] |= (1 << 3);
479 regp->TMDS[0x4] |= (1 << 0);
483 /* The TMDS game begins */
484 /* A few registers are also programmed on non-tmds monitors */
485 /* At the moment i can't give rationale for these values */
487 regp->TMDS[0x2e] = 0x80;
488 regp->TMDS[0x2f] = 0xff;
489 regp->TMDS[0x33] = 0xfe;
491 NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
492 uint32_t pll_setup_control = nvReadRAMDAC(pNv, 0, NV_RAMDAC_PLL_SETUP_CONTROL);
493 regp->TMDS[0x2b] = 0x7d;
494 regp->TMDS[0x2c] = 0x0;
495 /* Various combinations exist for lvds, 0x08, 0x48, 0xc8, 0x88 */
496 /* 0x88 seems most popular and (maybe) the end setting */
498 regp->TMDS[0x2e] = 0x88;
500 if (nv_crtc->head == 1) {
501 regp->TMDS[0x2e] = 0x81;
503 regp->TMDS[0x2e] = 0x85;
506 /* 0x08 is also seen for lvds */
507 regp->TMDS[0x2f] = 0x21;
508 regp->TMDS[0x30] = 0x0;
509 regp->TMDS[0x31] = 0x0;
510 regp->TMDS[0x32] = 0x0;
511 regp->TMDS[0x33] = 0xf0;
512 /* 0x00 is also seen for lvds */
513 regp->TMDS[0x3a] = 0x80;
515 /* Here starts the registers that may cause problems for some */
516 /* This an educated guess */
517 if (pNv->misc_info.reg_c040 & (1 << 10)) {
518 regp->TMDS[0x5] = 0x68;
520 regp->TMDS[0x5] = 0x6e;
524 regp->TMDS[0x0] = 0x61;
526 /* This seems to be related to PLL_SETUP_CONTROL */
527 /* When PLL_SETUP_CONTROL ends with 0x1c, then this value is 0xc1 */
529 if ((pll_setup_control & 0xff) == 0x1c) {
530 regp->TMDS[0x0] = 0xc1;
532 regp->TMDS[0x0] = 0xf1;
536 /* This is also related to PLL_SETUP_CONTROL, exactly how is unknown */
537 if (pll_setup_control == 0) {
538 regp->TMDS[0x1] = 0x0;
540 if (nvReadRAMDAC(pNv, 0, NV_RAMDAC_SEL_CLK) & (1<<12)) {
541 regp->TMDS[0x1] = 0x41;
543 regp->TMDS[0x1] = 0x42;
548 regp->TMDS[0x2] = 0x0;
550 if (pll_setup_control == 0x0) {
551 regp->TMDS[0x2] = 0x90;
553 regp->TMDS[0x2] = 0x89;
556 /* This test is not needed for me although the blob sets this value */
557 /* It may be wrong, but i'm leaving it for historical reference */
558 /*if (pNv->misc_info.reg_c040 == 0x3c0bc003 || pNv->misc_info.reg_c040 == 0x3c0bc333) {
559 regp->TMDS[0x2] = 0xa9;
562 /* I assume they are zero for !is_lvds */
564 /* Observed values are 0x11 and 0x14, TODO: this needs refinement */
565 regp->TMDS[0x40] = 0x14;
566 regp->TMDS[0x43] = 0xb0;
570 /* Put test control into what seems to be the neutral position */
571 if (pNv->NVArch < 0x44) {
572 regp->test_control = 0xf0000000;
574 regp->test_control = 0xf0100000;
577 /* This is a similar register to test control */
578 /* This is an educated guess */
579 /* The blob doesn't set this on ramdac 1, so maybe the primary one counts for both? */
580 if (pNv->NVArch < 0x44) {
581 regp->unk_670 = 0xf0010000;
583 /* This seems to be a safer guess */
584 regp->unk_670 = 0xf0110000;
587 /* This may be causing problems */
588 //regp->unk_900 = 0x10000;
591 NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
595 for (i = 0; i < config->num_output; i++) {
596 NVOutputPrivatePtr nv_output2 = config->output[i]->driver_private;
598 /* is it this output ?? */
599 if (config->output[i] == output)
602 /* it the output connected */
603 if (config->output[i]->crtc == NULL)
607 if ((nv_output2->type == OUTPUT_ANALOG) && (nv_output->type == OUTPUT_ANALOG)) {
612 ErrorF("%d: crtc %d ramdac %d twocrt %d twomon %d\n", is_fp, nv_crtc->crtc, nv_output->ramdac, two_crt, two_mon);
617 nv_output_mode_set_routing(xf86OutputPtr output)
619 NVOutputPrivatePtr nv_output = output->driver_private;
620 xf86CrtcPtr crtc = output->crtc;
621 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
622 ScrnInfoPtr pScrn = output->scrn;
623 NVPtr pNv = NVPTR(pScrn);
625 int other_ramdac = 0;
627 uint32_t output_reg = nvReadRAMDAC(pNv, nv_output->ramdac, NV_RAMDAC_OUTPUT);
629 if ((nv_output->type == OUTPUT_LVDS) || (nv_output->type == OUTPUT_TMDS)) {
636 output_reg = NV_RAMDAC_OUTPUT_DAC_ENABLE;
639 if (nv_crtc->head == 1) {
640 output_reg |= NV_RAMDAC_OUTPUT_SELECT_VPLL2;
642 output_reg &= ~NV_RAMDAC_OUTPUT_SELECT_VPLL2;
645 if (nv_output->ramdac == 1) {
651 uint32_t output2_reg = nvReadRAMDAC(pNv, other_ramdac, NV_RAMDAC_OUTPUT);
653 if (nv_crtc->head == 1) {
654 output2_reg &= ~NV_RAMDAC_OUTPUT_SELECT_VPLL2;
656 output2_reg |= NV_RAMDAC_OUTPUT_SELECT_VPLL2;
659 nvWriteRAMDAC(pNv, nv_output->ramdac, NV_RAMDAC_OUTPUT, output_reg);
660 nvWriteRAMDAC(pNv, other_ramdac, NV_RAMDAC_OUTPUT, output2_reg);
664 nv_output_mode_set(xf86OutputPtr output, DisplayModePtr mode,
665 DisplayModePtr adjusted_mode)
667 ScrnInfoPtr pScrn = output->scrn;
668 NVPtr pNv = NVPTR(pScrn);
669 RIVA_HW_STATE *state;
671 ErrorF("nv_output_mode_set is called\n");
673 state = &pNv->ModeReg;
675 nv_output_mode_set_regs(output, mode, adjusted_mode);
676 nv_output_load_state_ext(output, state, FALSE);
677 nv_output_mode_set_routing(output);
681 nv_get_edid(xf86OutputPtr output)
683 /* no use for shared DDC output */
684 NVOutputPrivatePtr nv_output = output->driver_private;
687 if (nv_output->pDDCBus == NULL)
690 ddc_mon = xf86OutputGetEDID(output, nv_output->pDDCBus);
694 if (ddc_mon->features.input_type && (nv_output->type == OUTPUT_ANALOG))
697 if ((!ddc_mon->features.input_type) && (nv_output->type == OUTPUT_TMDS ||
698 nv_output->type == OUTPUT_LVDS))
709 nv_ddc_detect(xf86OutputPtr output)
711 xf86MonPtr m = nv_get_edid(output);
721 nv_crt_load_detect(xf86OutputPtr output)
723 ScrnInfoPtr pScrn = output->scrn;
724 NVOutputPrivatePtr nv_output = output->driver_private;
725 NVPtr pNv = NVPTR(pScrn);
726 CARD32 reg_output, reg_test_ctrl, temp;
732 /* Restrict to primary ramdac for now, because i get false positives on the secondary */
733 for (ramdac = 0; ramdac < 1; ramdac++) {
734 reg_output = nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_OUTPUT);
735 reg_test_ctrl = nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_CONTROL);
737 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_CONTROL, (reg_test_ctrl & ~0x00010000));
739 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_OUTPUT, (reg_output & 0x0000FEEE));
742 temp = nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_OUTPUT);
743 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_OUTPUT, temp | 1);
745 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_DATA, 0x94050140);
746 temp = nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_CONTROL);
747 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_CONTROL, temp | 0x1000);
751 present[ramdac] = (nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_CONTROL) & (1 << 28)) ? TRUE : FALSE;
753 temp = NVOutputReadRAMDAC(output, NV_RAMDAC_TEST_CONTROL);
754 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_CONTROL, temp & 0x000EFFF);
756 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_OUTPUT, reg_output);
757 nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_TEST_CONTROL, reg_test_ctrl);
760 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT detect returned %d for ramdac0\n", present[0]);
761 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT detect returned %d for ramdac1\n", present[1]);
763 /* Can we only be ramdac0 ?*/
764 if (!(nv_output->valid_ramdac & RAMDAC_1)) {
770 /* What do with a secondary output running of the primary ramdac? */
776 static xf86OutputStatus
777 nv_tmds_output_detect(xf86OutputPtr output)
779 ErrorF("nv_tmds_output_detect is called\n");
781 if (nv_ddc_detect(output))
782 return XF86OutputStatusConnected;
784 return XF86OutputStatusDisconnected;
788 static xf86OutputStatus
789 nv_analog_output_detect(xf86OutputPtr output)
791 ErrorF("nv_analog_output_detect is called\n");
793 if (nv_ddc_detect(output))
794 return XF86OutputStatusConnected;
796 /* This may not work in all cases, but it's the best that can be done */
797 /* Example: Secondary output running of primary ramdac, what to do? */
798 //if (nv_crt_load_detect(output))
799 // return XF86OutputStatusConnected;
801 return XF86OutputStatusDisconnected;
804 static DisplayModePtr
805 nv_output_get_modes(xf86OutputPtr output)
807 NVOutputPrivatePtr nv_output = output->driver_private;
809 DisplayModePtr ddc_modes;
811 ErrorF("nv_output_get_modes is called\n");
813 ddc_mon = nv_get_edid(output);
815 xf86OutputSetEDID(output, ddc_mon);
820 ddc_modes = xf86OutputGetEDIDModes (output);
822 if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS) {
826 for (i = 0; i < 4; i++) {
827 /* We only look at detailed timings atm */
828 if (ddc_mon->det_mon[i].type != DT)
830 /* Selecting only based on width ok? */
831 if (ddc_mon->det_mon[i].section.d_timings.h_active > nv_output->fpWidth) {
832 nv_output->fpWidth = ddc_mon->det_mon[i].section.d_timings.h_active;
833 nv_output->fpHeight = ddc_mon->det_mon[i].section.d_timings.v_active;
837 /* Add a native resolution mode that is preferred */
838 /* Reduced blanking should be fine on DVI monitor */
839 nv_output->native_mode = xf86CVTMode(nv_output->fpWidth, nv_output->fpHeight, 60.0, TRUE, FALSE);
840 nv_output->native_mode->type = M_T_DRIVER | M_T_PREFERRED;
841 /* We want the new mode to be preferred */
842 for (mode = ddc_modes; mode != NULL; mode = mode->next) {
843 if (mode->type & M_T_PREFERRED) {
844 mode->type &= ~M_T_PREFERRED;
847 ddc_modes = xf86ModesAdd(ddc_modes, nv_output->native_mode);
854 nv_output_destroy (xf86OutputPtr output)
856 ErrorF("nv_output_destroy is called\n");
857 if (output->driver_private)
858 xfree (output->driver_private);
862 nv_clear_ramdac_from_outputs(xf86OutputPtr output, int ramdac)
865 ScrnInfoPtr pScrn = output->scrn;
866 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
867 xf86OutputPtr output2;
868 NVOutputPrivatePtr nv_output2;
869 for (i = 0; i < xf86_config->num_output; i++) {
870 output2 = xf86_config->output[i];
871 nv_output2 = output2->driver_private;
872 if (nv_output2->ramdac == ramdac && output != output2) {
873 nv_output2->ramdac = -1;
874 nv_output2->ramdac_assigned = FALSE;
881 nv_output_prepare(xf86OutputPtr output)
883 ErrorF("nv_output_prepare is called\n");
884 NVOutputPrivatePtr nv_output = output->driver_private;
885 ScrnInfoPtr pScrn = output->scrn;
886 NVPtr pNv = NVPTR(pScrn);
887 Bool stole_ramdac = FALSE;
888 xf86OutputPtr output2 = NULL;
890 output->funcs->dpms(output, DPMSModeOff);
892 if (nv_output->ramdac_assigned) {
893 ErrorF("We already have a ramdac.\n");
897 /* We need this ramdac, so let's steal it */
898 if (!(nv_output->valid_ramdac & RAMDAC_1) && pNv->ramdac_active[0]) {
899 ErrorF("Stealing ramdac0 ;-)\n");
901 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
902 NVOutputPrivatePtr nv_output2;
903 for (i = 0; i < xf86_config->num_output; i++) {
904 output2 = xf86_config->output[i];
905 nv_output2 = output2->driver_private;
906 if (nv_output2->ramdac == 0 && output != output2) {
907 nv_output2->ramdac = -1;
908 nv_output2->ramdac_assigned = FALSE;
912 pNv->ramdac_active[0] = FALSE;
916 /* TODO: figure out what ramdac 2 is on how it is identified */
918 /* At this point we already stole ramdac 0 if we need it */
919 if (!pNv->ramdac_active[0]) {
920 ErrorF("Activating ramdac %d\n", 0);
921 pNv->ramdac_active[0] = TRUE;
922 nv_output->ramdac = 0;
924 ErrorF("Activating ramdac %d\n", 1);
925 pNv->ramdac_active[1] = TRUE;
926 nv_output->ramdac = 1;
929 if (nv_output->ramdac != -1) {
930 nv_output->ramdac_assigned = TRUE;
931 nv_clear_ramdac_from_outputs(output, nv_output->ramdac);
935 ErrorF("Resetting the stolen ramdac\n");
936 output2->funcs->prepare(output2);
937 output2->funcs->mode_set(output2, &(output2->crtc->desiredMode), &(output2->crtc->desiredMode));
942 nv_output_commit(xf86OutputPtr output)
944 ErrorF("nv_output_commit is called\n");
946 output->funcs->dpms(output, DPMSModeOn);
949 static const xf86OutputFuncsRec nv_analog_output_funcs = {
950 .dpms = nv_analog_output_dpms,
951 .save = nv_output_save,
952 .restore = nv_output_restore,
953 .mode_valid = nv_output_mode_valid,
954 .mode_fixup = nv_output_mode_fixup,
955 .mode_set = nv_output_mode_set,
956 .detect = nv_analog_output_detect,
957 .get_modes = nv_output_get_modes,
958 .destroy = nv_output_destroy,
959 .prepare = nv_output_prepare,
960 .commit = nv_output_commit,
963 static const xf86OutputFuncsRec nv_tmds_output_funcs = {
964 .dpms = nv_tmds_output_dpms,
965 .save = nv_output_save,
966 .restore = nv_output_restore,
967 .mode_valid = nv_output_mode_valid,
968 .mode_fixup = nv_output_mode_fixup,
969 .mode_set = nv_output_mode_set,
970 .detect = nv_tmds_output_detect,
971 .get_modes = nv_output_get_modes,
972 .destroy = nv_output_destroy,
973 .prepare = nv_output_prepare,
974 .commit = nv_output_commit,
977 static int nv_lvds_output_mode_valid
978 (xf86OutputPtr output, DisplayModePtr pMode)
980 NVOutputPrivatePtr nv_output = output->driver_private;
982 /* No modes > panel's native res */
983 if (pMode->HDisplay > nv_output->fpWidth || pMode->VDisplay > nv_output->fpHeight)
986 return nv_output_mode_valid(output, pMode);
989 static xf86OutputStatus
990 nv_lvds_output_detect(xf86OutputPtr output)
992 ScrnInfoPtr pScrn = output->scrn;
993 NVPtr pNv = NVPTR(pScrn);
995 if (pNv->fp_native_mode || nv_ddc_detect(output))
996 return XF86OutputStatusConnected;
998 return XF86OutputStatusDisconnected;
1001 static DisplayModePtr
1002 nv_lvds_output_get_modes(xf86OutputPtr output)
1004 ScrnInfoPtr pScrn = output->scrn;
1005 NVPtr pNv = NVPTR(pScrn);
1006 NVOutputPrivatePtr nv_output = output->driver_private;
1007 DisplayModePtr modes;
1009 if ((modes = nv_output_get_modes(output)))
1012 /* it is possible to set up a mode from what we can read from the
1013 * RAMDAC registers, but if we can't read the BIOS table correctly
1014 * we might as well give up */
1015 if (pNv->fp_native_mode == NULL)
1018 nv_output->fpWidth = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_HDISP_END) + 1;
1019 nv_output->fpHeight = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_VDISP_END) + 1;
1020 nv_output->fpSyncs = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_CONTROL) & 0x30000033;
1022 if (pNv->fp_native_mode->HDisplay != nv_output->fpWidth ||
1023 pNv->fp_native_mode->VDisplay != nv_output->fpHeight) {
1024 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1025 "Panel size mismatch; ignoring RAMDAC\n");
1026 nv_output->fpWidth = pNv->fp_native_mode->HDisplay;
1027 nv_output->fpHeight = pNv->fp_native_mode->VDisplay;
1030 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Panel size is %u x %u\n",
1031 nv_output->fpWidth, nv_output->fpHeight);
1033 nv_output->native_mode = xf86DuplicateMode(pNv->fp_native_mode);
1035 return xf86DuplicateMode(pNv->fp_native_mode);
1038 static const xf86OutputFuncsRec nv_lvds_output_funcs = {
1039 .dpms = nv_lvds_output_dpms,
1040 .save = nv_output_save,
1041 .restore = nv_output_restore,
1042 .mode_valid = nv_lvds_output_mode_valid,
1043 .mode_fixup = nv_output_mode_fixup,
1044 .mode_set = nv_output_mode_set,
1045 .detect = nv_lvds_output_detect,
1046 .get_modes = nv_lvds_output_get_modes,
1047 .destroy = nv_output_destroy,
1048 .prepare = nv_output_prepare,
1049 .commit = nv_output_commit,
1052 static void nv_add_analog_output(ScrnInfoPtr pScrn, int heads, int order, int i2c_index, Bool dvi_pair)
1054 NVPtr pNv = NVPTR(pScrn);
1055 xf86OutputPtr output;
1056 NVOutputPrivatePtr nv_output;
1057 char outputname[20];
1058 Bool create_output = TRUE;
1060 /* DVI have an analog connector and a digital one, differentiate between that and a normal vga */
1062 sprintf(outputname, "DVI-A-%d", pNv->dvi_a_count);
1065 sprintf(outputname, "VGA-%d", pNv->vga_count);
1069 nv_output = xnfcalloc (sizeof (NVOutputPrivateRec), 1);
1074 if (pNv->dcb_table.i2c_read[i2c_index] && pNv->pI2CBus[i2c_index] == NULL)
1075 NV_I2CInit(pScrn, &pNv->pI2CBus[i2c_index], pNv->dcb_table.i2c_read[i2c_index], xstrdup(outputname));
1077 nv_output->type = OUTPUT_ANALOG;
1080 * bit0: RAMDAC_0 valid
1081 * bit1: RAMDAC_1 valid
1082 * So lowest order has highest priority.
1083 * Below is guesswork:
1084 * bit2: All ramdac's valid?
1085 * FIXME: this probably wrong
1087 nv_output->valid_ramdac = order;
1089 if (!create_output) {
1094 /* Delay creation of output until we actually know we want it */
1095 output = xf86OutputCreate (pScrn, &nv_analog_output_funcs, outputname);
1099 output->driver_private = nv_output;
1101 nv_output->pDDCBus = pNv->pI2CBus[i2c_index];
1103 nv_output->ramdac = -1;
1105 output->possible_crtcs = heads;
1106 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Adding output %s\n", outputname);
1109 static void nv_add_digital_output(ScrnInfoPtr pScrn, int heads, int order, int i2c_index, int lvds)
1111 NVPtr pNv = NVPTR(pScrn);
1112 xf86OutputPtr output;
1113 NVOutputPrivatePtr nv_output;
1114 char outputname[20];
1115 Bool create_output = TRUE;
1118 sprintf(outputname, "LVDS-%d", pNv->lvds_count);
1121 sprintf(outputname, "DVI-D-%d", pNv->dvi_d_count);
1125 nv_output = xnfcalloc (sizeof (NVOutputPrivateRec), 1);
1131 if (pNv->dcb_table.i2c_read[i2c_index] && pNv->pI2CBus[i2c_index] == NULL)
1132 NV_I2CInit(pScrn, &pNv->pI2CBus[i2c_index], pNv->dcb_table.i2c_read[i2c_index], xstrdup(outputname));
1134 nv_output->pDDCBus = pNv->pI2CBus[i2c_index];
1137 * bit0: RAMDAC_0 valid
1138 * bit1: RAMDAC_1 valid
1139 * So lowest order has highest priority.
1140 * Below is guesswork:
1141 * bit2: All ramdac's valid?
1142 * FIXME: this probably wrong
1144 nv_output->valid_ramdac = order;
1147 nv_output->type = OUTPUT_LVDS;
1148 /* comment below two lines to test LVDS under RandR12.
1149 * If your screen "blooms" or "bleeds" (i.e. has a developing
1150 * white / psychedelic pattern) then KILL X IMMEDIATELY
1151 * (ctrl+alt+backspace) & if the effect continues reset power */
1152 ErrorF("Output refused because we don't accept LVDS at the moment.\n");
1153 create_output = FALSE;
1155 nv_output->type = OUTPUT_TMDS;
1158 if (!create_output) {
1163 /* Delay creation of output until we are certain is desirable */
1165 output = xf86OutputCreate (pScrn, &nv_lvds_output_funcs, outputname);
1167 output = xf86OutputCreate (pScrn, &nv_tmds_output_funcs, outputname);
1171 output->driver_private = nv_output;
1173 nv_output->ramdac = -1;
1175 output->possible_crtcs = heads;
1176 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Adding output %s\n", outputname);
1179 void NvDCBSetupOutputs(ScrnInfoPtr pScrn)
1181 unsigned char type, i2c_index = 0xf, old_i2c_index, or, heads;
1182 NVPtr pNv = NVPTR(pScrn);
1184 Bool dvi_pair[MAX_NUM_DCB_ENTRIES];
1186 Bool sel_clk_override = TRUE;
1188 /* check how many TMDS ports there are */
1189 if (pNv->dcb_table.entries) {
1190 for (i = 0 ; i < pNv->dcb_table.entries; i++) {
1191 type = pNv->dcb_table.entry[i].type;
1192 old_i2c_index = i2c_index;
1193 i2c_index = pNv->dcb_table.entry[i].i2c_index;
1194 or = ffs(pNv->dcb_table.entry[i].or);
1195 dvi_pair[i] = FALSE;
1197 /* Are we on the same i2c index? */
1198 if (i2c_index != 0xf && i2c_index == old_i2c_index) {
1199 /* Have we passed the analog connector or not? */
1200 if (type == OUTPUT_TMDS) {
1201 dvi_pair[i - 1] = TRUE;
1202 } else if (type == OUTPUT_ANALOG) {
1203 dvi_pair[i ] = TRUE;
1207 /* A normal card has at least one output valid on both ramdac's */
1208 if (i2c_index != 0xf && type < 4 && type != OUTPUT_TV && or == 3) {
1209 sel_clk_override = FALSE;
1214 pNv->sel_clk_override = sel_clk_override;
1216 /* we setup the outputs up from the BIOS table */
1217 for (i = 0 ; i < pNv->dcb_table.entries; i++) {
1218 type = pNv->dcb_table.entry[i].type;
1219 i2c_index = pNv->dcb_table.entry[i].i2c_index;
1220 or = ffs(pNv->dcb_table.entry[i].or);
1221 heads = pNv->dcb_table.entry[i].head;
1224 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DCB entry %d: type: %d, i2c_index: %d, head: %d, or: %d\n", i, type, i2c_index, pNv->dcb_table.entry[i].head, or);
1228 nv_add_analog_output(pScrn, heads, or, i2c_index, dvi_pair[i]);
1231 nv_add_digital_output(pScrn, heads, or, i2c_index, 0);
1234 nv_add_digital_output(pScrn, heads, or, i2c_index, 1);
1243 void NvSetupOutputs(ScrnInfoPtr pScrn)
1245 NVPtr pNv = NVPTR(pScrn);
1247 pNv->Television = FALSE;
1249 memset(pNv->pI2CBus, 0, sizeof(pNv->pI2CBus));
1250 NvDCBSetupOutputs(pScrn);
1253 /*************************************************************************** \
1255 |* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
1257 |* NOTICE TO USER: The source code is copyrighted under U.S. and *|
1258 |* international laws. Users and possessors of this source code are *|
1259 |* hereby granted a nonexclusive, royalty-free copyright license to *|
1260 |* use this code in individual and commercial software. *|
1262 |* Any use of this source code must include, in the user documenta- *|
1263 |* tion and internal comments to the code, notices to the end user *|
1266 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
1268 |* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
1269 |* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
1270 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
1271 |* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
1272 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
1273 |* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
1274 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
1275 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
1276 |* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
1277 |* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
1278 |* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
1280 |* U.S. Government End Users. This source code is a "commercial *|
1281 |* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
1282 |* consisting of "commercial computer software" and "commercial *|
1283 |* computer software documentation," as such terms are used in *|
1284 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
1285 |* ment only as a commercial end item. Consistent with 48 C.F.R. *|
1286 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
1287 |* all U.S. Government End Users acquire the source code with only *|
1288 |* those rights set forth herein. *|
1290 \***************************************************************************/