2 * Copyright 2008 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "nv_include.h"
24 #include "nv50_accel.h"
27 NVAccelInitNV50TCL(ScrnInfoPtr pScrn)
29 NVPtr pNv = NVPTR(pScrn);
30 struct nouveau_channel *chan = pNv->chan;
31 struct nouveau_grobj *tesla;
35 switch (pNv->NVArch & 0xf0) {
50 if (nouveau_grobj_alloc(pNv->chan, Nv3D, class, &pNv->Nv3D))
53 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM, 0, 65536,
54 &pNv->tesla_scratch)) {
55 nouveau_grobj_free(&pNv->Nv3D);
61 BEGIN_RING(chan, tesla, 0x1558, 1);
63 BEGIN_RING(chan, tesla, NV50TCL_DMA_NOTIFY, 1);
64 OUT_RING (chan, pNv->NvNull->handle);
65 BEGIN_RING(chan, tesla, NV50TCL_DMA_UNK0(0), NV50TCL_DMA_UNK0__SIZE);
66 for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++)
67 OUT_RING (chan, pNv->chan->vram->handle);
68 BEGIN_RING(chan, tesla, NV50TCL_DMA_UNK1(0), NV50TCL_DMA_UNK1__SIZE);
69 for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++)
70 OUT_RING (chan, pNv->chan->vram->handle);
71 BEGIN_RING(chan, tesla, 0x121c, 1);
74 BEGIN_RING(chan, tesla, 0x192c, 1);
76 BEGIN_RING(chan, tesla, 0x0f90, 1);
79 BEGIN_RING(chan, tesla, 0x1234, 1);
82 /*XXX: NFI - gets the oddball 0x1458 method working "properly" */
83 BEGIN_RING(chan, tesla, 0x13bc, 1);
84 OUT_RING (chan, 0x54);
86 BEGIN_RING(chan, tesla, NV50TCL_VP_ADDRESS_HIGH, 2);
87 OUT_RELOCh(chan, pNv->tesla_scratch, PVP_OFFSET, NOUVEAU_BO_VRAM);
88 OUT_RELOCl(chan, pNv->tesla_scratch, PVP_OFFSET, NOUVEAU_BO_VRAM);
89 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
90 OUT_RELOCh(chan, pNv->tesla_scratch, PVP_OFFSET, NOUVEAU_BO_VRAM);
91 OUT_RELOCl(chan, pNv->tesla_scratch, PVP_OFFSET, NOUVEAU_BO_VRAM);
92 OUT_RING (chan, 0x00004000);
93 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
95 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, (3*4*2));
96 OUT_RING (chan, 0x10000001);
97 OUT_RING (chan, 0x0423c788);
98 OUT_RING (chan, 0x10000205);
99 OUT_RING (chan, 0x0423c788);
100 OUT_RING (chan, 0x10000409);
101 OUT_RING (chan, 0x0423c788);
102 OUT_RING (chan, 0x1000060d);
103 OUT_RING (chan, 0x0423c788);
104 OUT_RING (chan, 0x10000811);
105 OUT_RING (chan, 0x0423c788);
106 OUT_RING (chan, 0x10000a15);
107 OUT_RING (chan, 0x0423c788);
108 OUT_RING (chan, 0x10000c19);
109 OUT_RING (chan, 0x0423c788);
110 OUT_RING (chan, 0x10000e1d);
111 OUT_RING (chan, 0x0423c788);
112 OUT_RING (chan, 0x10001021);
113 OUT_RING (chan, 0x0423c788);
114 OUT_RING (chan, 0x10001225);
115 OUT_RING (chan, 0x0423c788);
116 OUT_RING (chan, 0x10001429);
117 OUT_RING (chan, 0x0423c788);
118 OUT_RING (chan, 0x1000162d);
119 OUT_RING (chan, 0x0423c789);
121 BEGIN_RING(chan, tesla, NV50TCL_VP_ATTR_EN_0, 2);
122 OUT_RING (chan, 0x0000000f);
123 OUT_RING (chan, 0x000000ff);
124 BEGIN_RING(chan, tesla, 0x16b8, 1);
126 BEGIN_RING(chan, tesla, 0x16ac, 2);
129 BEGIN_RING(chan, tesla, NV50TCL_VP_START_ID, 1);
132 BEGIN_RING(chan, tesla, NV50TCL_FP_ADDRESS_HIGH, 2);
133 OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET, NOUVEAU_BO_VRAM);
134 OUT_RELOCl(chan, pNv->tesla_scratch, PFP_OFFSET, NOUVEAU_BO_VRAM);
135 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
136 OUT_RELOCh(chan, pNv->tesla_scratch,
137 PFP_OFFSET + PFP_S, NOUVEAU_BO_VRAM);
138 OUT_RELOCl(chan, pNv->tesla_scratch,
139 PFP_OFFSET + PFP_S, NOUVEAU_BO_VRAM);
140 OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
141 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
143 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 6);
144 OUT_RING (chan, 0x80000000);
145 OUT_RING (chan, 0x90000004);
146 OUT_RING (chan, 0x82010200);
147 OUT_RING (chan, 0x82020204);
148 OUT_RING (chan, 0xf6400001);
149 OUT_RING (chan, 0x0000c785);
150 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
151 OUT_RELOCh(chan, pNv->tesla_scratch,
152 PFP_OFFSET + PFP_C, NOUVEAU_BO_VRAM);
153 OUT_RELOCl(chan, pNv->tesla_scratch,
154 PFP_OFFSET + PFP_C, NOUVEAU_BO_VRAM);
155 OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
156 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
158 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 16);
159 OUT_RING (chan, 0x80000000);
160 OUT_RING (chan, 0x90000004);
161 OUT_RING (chan, 0x82030210);
162 OUT_RING (chan, 0x82040214);
163 OUT_RING (chan, 0x82010200);
164 OUT_RING (chan, 0x82020204);
165 OUT_RING (chan, 0xf6400001);
166 OUT_RING (chan, 0x0000c784);
167 OUT_RING (chan, 0xf0400211);
168 OUT_RING (chan, 0x00008784);
169 OUT_RING (chan, 0xc0040000);
170 OUT_RING (chan, 0xc0040204);
171 OUT_RING (chan, 0xc0040408);
172 OUT_RING (chan, 0xc004060c);
173 OUT_RING (chan, 0x00000001);
174 OUT_RING (chan, 0x00000001);
175 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
176 OUT_RELOCh(chan, pNv->tesla_scratch,
177 PFP_OFFSET + PFP_CCA, NOUVEAU_BO_VRAM);
178 OUT_RELOCl(chan, pNv->tesla_scratch,
179 PFP_OFFSET + PFP_CCA, NOUVEAU_BO_VRAM);
180 OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
181 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
183 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 16);
184 OUT_RING (chan, 0x80000000);
185 OUT_RING (chan, 0x90000004);
186 OUT_RING (chan, 0x82030210);
187 OUT_RING (chan, 0x82040214);
188 OUT_RING (chan, 0x82010200);
189 OUT_RING (chan, 0x82020204);
190 OUT_RING (chan, 0xf6400001);
191 OUT_RING (chan, 0x0000c784);
192 OUT_RING (chan, 0xf6400211);
193 OUT_RING (chan, 0x0000c784);
194 OUT_RING (chan, 0xc0040000);
195 OUT_RING (chan, 0xc0050204);
196 OUT_RING (chan, 0xc0060408);
197 OUT_RING (chan, 0xc007060c);
198 OUT_RING (chan, 0x00000001);
199 OUT_RING (chan, 0x00000001);
200 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
201 OUT_RELOCh(chan, pNv->tesla_scratch,
202 PFP_OFFSET + PFP_CCASA, NOUVEAU_BO_VRAM);
203 OUT_RELOCl(chan, pNv->tesla_scratch,
204 PFP_OFFSET + PFP_CCASA, NOUVEAU_BO_VRAM);
205 OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
206 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
208 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 16);
209 OUT_RING (chan, 0x80000000);
210 OUT_RING (chan, 0x90000004);
211 OUT_RING (chan, 0x82030200);
212 OUT_RING (chan, 0x82040204);
213 OUT_RING (chan, 0x82010210);
214 OUT_RING (chan, 0x82020214);
215 OUT_RING (chan, 0xf6400201);
216 OUT_RING (chan, 0x0000c784);
217 OUT_RING (chan, 0xf0400011);
218 OUT_RING (chan, 0x00008784);
219 OUT_RING (chan, 0xc0040000);
220 OUT_RING (chan, 0xc0040204);
221 OUT_RING (chan, 0xc0040408);
222 OUT_RING (chan, 0xc004060c);
223 OUT_RING (chan, 0x00000001);
224 OUT_RING (chan, 0x00000001);
225 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
226 OUT_RELOCh(chan, pNv->tesla_scratch,
227 PFP_OFFSET + PFP_S_A8, NOUVEAU_BO_VRAM);
228 OUT_RELOCl(chan, pNv->tesla_scratch,
229 PFP_OFFSET + PFP_S_A8, NOUVEAU_BO_VRAM);
230 OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
231 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
233 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 10);
234 OUT_RING (chan, 0x80000000);
235 OUT_RING (chan, 0x90000004);
236 OUT_RING (chan, 0x82010200);
237 OUT_RING (chan, 0x82020204);
238 OUT_RING (chan, 0xf0400001);
239 OUT_RING (chan, 0x00008784);
240 OUT_RING (chan, 0x10008004);
241 OUT_RING (chan, 0x10008008);
242 OUT_RING (chan, 0x1000000d);
243 OUT_RING (chan, 0x0403c781);
244 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
245 OUT_RELOCh(chan, pNv->tesla_scratch,
246 PFP_OFFSET + PFP_C_A8, NOUVEAU_BO_VRAM);
247 OUT_RELOCl(chan, pNv->tesla_scratch,
248 PFP_OFFSET + PFP_C_A8, NOUVEAU_BO_VRAM);
249 OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
250 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
252 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 15);
253 OUT_RING (chan, 0x80000000);
254 OUT_RING (chan, 0x90000004);
255 OUT_RING (chan, 0x82030208);
256 OUT_RING (chan, 0x8204020c);
257 OUT_RING (chan, 0x82010200);
258 OUT_RING (chan, 0x82020204);
259 OUT_RING (chan, 0xf0400001);
260 OUT_RING (chan, 0x00008784);
261 OUT_RING (chan, 0xf0400209);
262 OUT_RING (chan, 0x00008784);
263 OUT_RING (chan, 0xc002000c);
264 OUT_RING (chan, 0x10008600);
265 OUT_RING (chan, 0x10008604);
266 OUT_RING (chan, 0x10000609);
267 OUT_RING (chan, 0x0403c781);
268 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
269 OUT_RELOCh(chan, pNv->tesla_scratch,
270 PFP_OFFSET + PFP_NV12, NOUVEAU_BO_VRAM);
271 OUT_RELOCl(chan, pNv->tesla_scratch,
272 PFP_OFFSET + PFP_NV12, NOUVEAU_BO_VRAM);
273 OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
274 BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
276 BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 34);
277 OUT_RING (chan, 0x80000008);
278 OUT_RING (chan, 0x90000408);
279 OUT_RING (chan, 0x80010400);
280 OUT_RING (chan, 0x80020404);
281 OUT_RING (chan, 0xf0400001);
282 OUT_RING (chan, 0x00008784);
283 OUT_RING (chan, 0xc0080001);
284 OUT_RING (chan, 0x03f9507f);
285 OUT_RING (chan, 0xb013000d);
286 OUT_RING (chan, 0x0bf5ee3b);
287 OUT_RING (chan, 0xb02f0011);
288 OUT_RING (chan, 0x03f078ff);
289 OUT_RING (chan, 0xb0220015);
290 OUT_RING (chan, 0x0bf8a677);
291 OUT_RING (chan, 0x80030400);
292 OUT_RING (chan, 0x80040404);
293 OUT_RING (chan, 0xf0400201);
294 OUT_RING (chan, 0x0000c784);
295 OUT_RING (chan, 0xc0160009);
296 OUT_RING (chan, 0x0bec890f);
297 OUT_RING (chan, 0xb0000411);
298 OUT_RING (chan, 0x00010780);
299 OUT_RING (chan, 0xc0070009);
300 OUT_RING (chan, 0x0400116b);
301 OUT_RING (chan, 0xc02d0201);
302 OUT_RING (chan, 0x03fcc433);
303 OUT_RING (chan, 0xc0370205);
304 OUT_RING (chan, 0x0bf501a3);
305 OUT_RING (chan, 0xb0000001);
306 OUT_RING (chan, 0x0000c780);
307 OUT_RING (chan, 0xb0000205);
308 OUT_RING (chan, 0x00010780);
309 OUT_RING (chan, 0xb0000409);
310 OUT_RING (chan, 0x00014781);
312 BEGIN_RING(chan, tesla, 0x16bc, 2);
313 OUT_RING (chan, 0x03020100);
314 OUT_RING (chan, 0x09080504);
315 BEGIN_RING(chan, tesla, 0x1520, 1);
316 OUT_RING (chan, 0x00000000);
317 BEGIN_RING(chan, tesla, 0x1988, 2);
318 OUT_RING (chan, 0x08070407);
319 OUT_RING (chan, 0x00000008);
321 BEGIN_RING(chan, tesla, NV50TCL_TIC_ADDRESS_HIGH, 3);
322 OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, NOUVEAU_BO_VRAM);
323 OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, NOUVEAU_BO_VRAM);
324 OUT_RING (chan, 0x00000800);
325 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
326 OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, NOUVEAU_BO_VRAM);
327 OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, NOUVEAU_BO_VRAM);
328 OUT_RING (chan, (CB_TIC << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
330 BEGIN_RING(chan, tesla, NV50TCL_TSC_ADDRESS_HIGH, 3);
331 OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, NOUVEAU_BO_VRAM);
332 OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, NOUVEAU_BO_VRAM);
333 OUT_RING (chan, 0x00000000);
334 BEGIN_RING(chan, tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
335 OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, NOUVEAU_BO_VRAM);
336 OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, NOUVEAU_BO_VRAM);
337 OUT_RING (chan, (CB_TSC << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
339 BEGIN_RING(chan, tesla, NV50TCL_VIEWPORT_HORIZ, 2);
340 OUT_RING (chan, 8192 << NV50TCL_VIEWPORT_HORIZ_W_SHIFT);
341 OUT_RING (chan, 8192 << NV50TCL_VIEWPORT_VERT_H_SHIFT);
342 BEGIN_RING(chan, tesla, NV50TCL_SCISSOR_HORIZ, 2);
343 OUT_RING (chan, 8192 << NV50TCL_SCISSOR_HORIZ_R_SHIFT);
344 OUT_RING (chan, 8192 << NV50TCL_SCISSOR_VERT_B_SHIFT);
345 BEGIN_RING(chan, tesla, 0x0ff4, 2);
346 OUT_RING (chan, 8192 << NV50TCL_UNKFF4_W_SHIFT);
347 OUT_RING (chan, 8192 << NV50TCL_UNKFF8_H_SHIFT);