2 * Copyright 2007 Maarten Maathuis
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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21 * DEALINGS IN THE SOFTWARE.
27 /* These are probably redrirected from 0x4000 range (very similar regs to nv40, maybe different order) */
28 #define NV50_DISPLAY_VPLL1_A 0x4104
29 #define NV50_DISPLAY_VPLL1_B 0x4108
30 #define NV50_DISPLAY_VPLL2_A 0x4904
31 #define NV50_DISPLAY_VPLL2_B 0x4908
33 /* These things below are so called "commands" */
34 #define NV50_CRTC0_CLOCK 0x804
35 #define NV50_CRTC1_CLOCK 0xC04
36 #define NV50_CRTC0_INTERLACE 0x808
37 #define NV50_CRTC1_INTERLACE 0xC08
39 #define NV50_CRTC0_HBLANK_START 0x814
40 #define NV50_CRTC0_HSYNC_END 0x818
41 #define NV50_CRTC0_HBLANK_END 0x81C
42 #define NV50_CRTC0_HTOTAL 0x820
44 #define NV50_CRTC1_HBLANK_START 0xC14
45 #define NV50_CRTC1_HSYNC_END 0xC18
46 #define NV50_CRTC1_HBLANK_END 0xC1C
47 #define NV50_CRTC1_HTOTAL 0xC20
49 #define NV50_CRTC0_FB_SIZE 0x868
50 #define NV50_CRTC1_FB_SIZE 0xC68
51 #define NV50_CRTC0_PITCH 0x86C
52 #define NV50_CRTC1_PITCH 0xC6C
53 #define NV50_CRTC0_FB_POS 0x8C0
54 #define NV50_CRTC1_FB_POS 0xCC0
55 #define NV50_CRTC0_SCRN_SIZE 0x8C8
56 #define NV50_CRTC1_SCRN_SIZE 0xCC8
58 #define NV50_CRTC0_DEPTH 0x870
59 #define NV50_CRTC0_DEPTH_8BPP 0x1E00
60 #define NV50_CRTC0_DEPTH_15BPP 0xE900
61 #define NV50_CRTC0_DEPTH_16BPP 0xE800
62 #define NV50_CRTC0_DEPTH_24BPP 0xCF00
64 #define NV50_CRTC1_DEPTH 0xC70
65 #define NV50_CRTC1_DEPTH_8BPP 0x1E00
66 #define NV50_CRTC1_DEPTH_15BPP 0xE900
67 #define NV50_CRTC1_DEPTH_16BPP 0xE800
68 #define NV50_CRTC1_DEPTH_24BPP 0xCF00
70 #define NV50_CRTC0_FB_OFFSET 0x860
71 #define NV50_CRTC1_FB_OFFSET 0xC60
73 #define NV50_CRTC0_CURSOR_OFFSET 0x884
74 #define NV50_CRTC1_CURSOR_OFFSET 0xC84
76 /* You can't have a palette in 8 bit mode (=OFF) */
77 #define NV50_CRTC0_CLUT_MODE 0x840
78 #define NV50_CRTC0_CLUT_MODE_BLANK 0x00000000
79 #define NV50_CRTC0_CLUT_MODE_OFF 0x80000000
80 #define NV50_CRTC0_CLUT_MODE_ON 0xC0000000
81 #define NV50_CRTC0_CLUT_OFFSET 0x844
83 #define NV50_CRTC1_CLUT_MODE 0xC40
84 #define NV50_CRTC1_CLUT_MODE_BLANK 0x00000000
85 #define NV50_CRTC1_CLUT_MODE_OFF 0x80000000
86 #define NV50_CRTC1_CLUT_MODE_ON 0xC0000000
87 #define NV50_CRTC1_CLUT_OFFSET 0xC44
89 /* Clamped to 256 MiB */
90 #define NV50_CRTC0_RAM_AMOUNT 0x384
91 #define NV50_CRTC1_RAM_AMOUNT 0x784
93 #define NV50_CRTC0_CURSOR0 0x880
94 #define NV50_CRTC0_CURSOR0_SHOW 0x85000000
95 #define NV50_CRTC0_CURSOR0_HIDE 0x05000000
97 #define NV50_CRTC1_CURSOR0 0xC80
98 #define NV50_CRTC1_CURSOR0_SHOW 0x85000000
99 #define NV50_CRTC1_CURSOR0_HIDE 0x05000000
101 #endif /* __NV50REG_H_ */