git.oblomov.eu Git - nouveau/blob - src/nv40_exa.c

   1 /*
   2  * Copyright 2007 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "nv_include.h"
  24 #include "nv_shaders.h"
  25
  26 typedef struct nv_pict_surface_format {
  27         int      pict_fmt;
  28         uint32_t card_fmt;
  29 } nv_pict_surface_format_t;
  30
  31 typedef struct nv_pict_texture_format {
  32         int      pict_fmt;
  33         uint32_t card_fmt;
  34         uint32_t card_swz;
  35 } nv_pict_texture_format_t;
  36
  37 typedef struct nv_pict_op {
  38         Bool     src_alpha;
  39         Bool     dst_alpha;
  40         uint32_t src_card_op;
  41         uint32_t dst_card_op;
  42 } nv_pict_op_t;
  43
  44 typedef struct nv40_exa_state {
  45         Bool have_mask;
  46
  47         struct {
  48                 PictTransformPtr transform;
  49                 float width;
  50                 float height;
  51         } unit[2];
  52 } nv40_exa_state_t;
  53 static nv40_exa_state_t exa_state;
  54 #define NV40EXA_STATE nv40_exa_state_t *state = &exa_state
  55
  56 static nv_pict_surface_format_t
  57 NV40SurfaceFormat[] = {
  58         { PICT_a8r8g8b8 , NV40TCL_RT_FORMAT_COLOR_A8R8G8B8 },
  59         { PICT_x8r8g8b8 , NV40TCL_RT_FORMAT_COLOR_X8R8G8B8 },
  60         { PICT_r5g6b5   , NV40TCL_RT_FORMAT_COLOR_R5G6B5   },
  61         { PICT_a8       , NV40TCL_RT_FORMAT_COLOR_B8       },
  62         { -1, ~0 }
  63 };
  64
  65 static nv_pict_surface_format_t *
  66 NV40_GetPictSurfaceFormat(int format)
  67 {
  68         int i = 0;
  69
  70         while (NV40SurfaceFormat[i].pict_fmt != -1) {
  71                 if (NV40SurfaceFormat[i].pict_fmt == format)
  72                         return &NV40SurfaceFormat[i];
  73                 i++;
  74         }
  75
  76         return NULL;
  77 }
  78
  79 enum {
  80         NV40EXA_FPID_PASS_COL0 = 0,
  81         NV40EXA_FPID_PASS_TEX0 = 1,
  82         NV40EXA_FPID_COMPOSITE_MASK = 2,
  83         NV40EXA_FPID_COMPOSITE_MASK_SA_CA = 3,
  84         NV40EXA_FPID_COMPOSITE_MASK_CA = 4,
  85         NV40EXA_FPID_MAX = 5
  86 } NV40EXA_FPID;
  87
  88 static nv_shader_t *nv40_fp_map[NV40EXA_FPID_MAX] = {
  89         &nv30_fp_pass_col0,
  90         &nv30_fp_pass_tex0,
  91         &nv30_fp_composite_mask,
  92         &nv30_fp_composite_mask_sa_ca,
  93         &nv30_fp_composite_mask_ca
  94 };
  95
  96 static nv_shader_t *nv40_fp_map_a8[NV40EXA_FPID_MAX];
  97
  98 static void
  99 NV40EXAHackupA8Shaders(ScrnInfoPtr pScrn)
 100 {
 101         int s;
 102
 103         for (s = 0; s < NV40EXA_FPID_MAX; s++) {
 104                 nv_shader_t *def, *a8;
 105
 106                 def = nv40_fp_map[s];
 107                 a8 = xcalloc(1, sizeof(nv_shader_t));
 108                 a8->card_priv.NV30FP.num_regs = def->card_priv.NV30FP.num_regs;
 109                 a8->size = def->size + 4;
 110                 memcpy(a8->data, def->data, def->size * sizeof(uint32_t));
 111                 nv40_fp_map_a8[s] = a8;
 112
 113                 a8->data[a8->size - 8 + 0] &= ~0x00000081;
 114                 a8->data[a8->size - 4 + 0]  = 0x01401e81;
 115                 a8->data[a8->size - 4 + 1]  = 0x1c9dfe00;
 116                 a8->data[a8->size - 4 + 2]  = 0x0001c800;
 117                 a8->data[a8->size - 4 + 3]  = 0x0001c800;
 118         }
 119 }
 120
 121 #define _(r,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w)                        \
 122   {                                                                            \
 123   PICT_##r, NV40TCL_TEX_FORMAT_FORMAT_##tf,                                    \
 124   NV40TCL_TEX_SWIZZLE_S0_X_##ts0x | NV40TCL_TEX_SWIZZLE_S0_Y_##ts0y |          \
 125   NV40TCL_TEX_SWIZZLE_S0_Z_##ts0z | NV40TCL_TEX_SWIZZLE_S0_W_##ts0w |          \
 126   NV40TCL_TEX_SWIZZLE_S1_X_##ts1x | NV40TCL_TEX_SWIZZLE_S1_Y_##ts1y |          \
 127   NV40TCL_TEX_SWIZZLE_S1_Z_##ts1z | NV40TCL_TEX_SWIZZLE_S1_W_##ts1w,           \
 128   }
 129 static nv_pict_texture_format_t
 130 NV40TextureFormat[] = {
 131         _(a8r8g8b8, A8R8G8B8,   S1,   S1,   S1,   S1, X, Y, Z, W),
 132         _(x8r8g8b8, A8R8G8B8,   S1,   S1,   S1,  ONE, X, Y, Z, W),
 133         _(x8b8g8r8, A8R8G8B8,   S1,   S1,   S1,  ONE, Z, Y, X, W),
 134         _(a1r5g5b5, A1R5G5B5,   S1,   S1,   S1,   S1, X, Y, Z, W),
 135         _(x1r5g5b5, A1R5G5B5,   S1,   S1,   S1,  ONE, X, Y, Z, W),
 136         _(  r5g6b5,   R5G6B5,   S1,   S1,   S1,   S1, X, Y, Z, W),
 137         _(      a8,       L8, ZERO, ZERO, ZERO,   S1, X, X, X, X),
 138         { -1, ~0, ~0 }
 139 };
 140 #undef _
 141
 142 static nv_pict_texture_format_t *
 143 NV40_GetPictTextureFormat(int format)
 144 {
 145         int i = 0;
 146
 147         while (NV40TextureFormat[i].pict_fmt != -1) {
 148                 if (NV40TextureFormat[i].pict_fmt == format)
 149                         return &NV40TextureFormat[i];
 150                 i++;
 151         }
 152
 153         return NULL;
 154 }
 155
 156 #define SF(bf) (NV40TCL_BLEND_FUNC_SRC_RGB_##bf |                              \
 157                 NV40TCL_BLEND_FUNC_SRC_ALPHA_##bf)
 158 #define DF(bf) (NV40TCL_BLEND_FUNC_DST_RGB_##bf |                              \
 159                 NV40TCL_BLEND_FUNC_DST_ALPHA_##bf)
 160 static nv_pict_op_t
 161 NV40PictOp[] = {
 162 /* Clear       */ { 0, 0, SF(               ZERO), DF(               ZERO) },
 163 /* Src         */ { 0, 0, SF(                ONE), DF(               ZERO) },
 164 /* Dst         */ { 0, 0, SF(               ZERO), DF(                ONE) },
 165 /* Over        */ { 1, 0, SF(                ONE), DF(ONE_MINUS_SRC_ALPHA) },
 166 /* OverReverse */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF(                ONE) },
 167 /* In          */ { 0, 1, SF(          DST_ALPHA), DF(               ZERO) },
 168 /* InReverse   */ { 1, 0, SF(               ZERO), DF(          SRC_ALPHA) },
 169 /* Out         */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF(               ZERO) },
 170 /* OutReverse  */ { 1, 0, SF(               ZERO), DF(ONE_MINUS_SRC_ALPHA) },
 171 /* Atop        */ { 1, 1, SF(          DST_ALPHA), DF(ONE_MINUS_SRC_ALPHA) },
 172 /* AtopReverse */ { 1, 1, SF(ONE_MINUS_DST_ALPHA), DF(          SRC_ALPHA) },
 173 /* Xor         */ { 1, 1, SF(ONE_MINUS_DST_ALPHA), DF(ONE_MINUS_SRC_ALPHA) },
 174 /* Add         */ { 0, 0, SF(                ONE), DF(                ONE) }
 175 };
 176
 177 static nv_pict_op_t *
 178 NV40_GetPictOpRec(int op)
 179 {
 180         if (op >= PictOpSaturate)
 181                 return NULL;
 182         return &NV40PictOp[op];
 183 }
 184
 185 #if 0
 186 #define FALLBACK(fmt,args...) do {                                      \
 187         ErrorF("FALLBACK %s:%d> " fmt, __func__, __LINE__, ##args);     \
 188         return FALSE;                                                   \
 189 } while(0)
 190 #else
 191 #define FALLBACK(fmt,args...) do { \
 192         return FALSE;              \
 193 } while(0)
 194 #endif
 195
 196 static void
 197 NV40_LoadVtxProg(ScrnInfoPtr pScrn, nv_shader_t *shader)
 198 {
 199         NVPtr pNv = NVPTR(pScrn);
 200         static int next_hw_id = 0;
 201         int i;
 202
 203         if (!shader->hw_id) {
 204                 shader->hw_id = next_hw_id;
 205
 206                 BEGIN_RING(Nv3D, NV40TCL_VP_UPLOAD_FROM_ID, 1);
 207                 OUT_RING  ((shader->hw_id));
 208                 for (i=0; i<shader->size; i+=4) {
 209                         BEGIN_RING(Nv3D, NV40TCL_VP_UPLOAD_INST(0), 4);
 210                         OUT_RING  (shader->data[i + 0]);
 211                         OUT_RING  (shader->data[i + 1]);
 212                         OUT_RING  (shader->data[i + 2]);
 213                         OUT_RING  (shader->data[i + 3]);
 214                         next_hw_id++;
 215                 }
 216         }
 217
 218         BEGIN_RING(Nv3D, NV40TCL_VP_START_FROM_ID, 1);
 219         OUT_RING  ((shader->hw_id));
 220
 221         BEGIN_RING(Nv3D, NV40TCL_VP_ATTRIB_EN, 2);
 222         OUT_RING  (shader->card_priv.NV30VP.vp_in_reg);
 223         OUT_RING  (shader->card_priv.NV30VP.vp_out_reg);
 224 }
 225
 226 static void
 227 NV40_LoadFragProg(ScrnInfoPtr pScrn, nv_shader_t *shader)
 228 {
 229         NVPtr pNv = NVPTR(pScrn);
 230         static NVAllocRec *fp_mem = NULL;
 231         static int next_hw_id_offset = 0;
 232
 233         if (!fp_mem) {
 234                 fp_mem = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, 0x1000);
 235                 if (!fp_mem) {
 236                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 237                                    "Couldn't alloc fragprog buffer!\n");
 238                         return;
 239                 }
 240         }
 241
 242         if (!shader->hw_id) {
 243                 uint32_t *map = fp_mem->map + next_hw_id_offset;
 244                 int i;
 245
 246                 for (i = 0; i < shader->size; i++) {
 247                         uint32_t data = shader->data[i];
 248 #if (X_BYTE_ORDER != X_LITTLE_ENDIAN)
 249                         data = ((data >> 16) | ((data & 0xffff) << 16));
 250 #endif
 251                         map[i] = data;
 252                 }
 253
 254                 shader->hw_id  = fp_mem->offset;
 255                 shader->hw_id += next_hw_id_offset;
 256
 257                 next_hw_id_offset += (shader->size * sizeof(uint32_t));
 258                 next_hw_id_offset = (next_hw_id_offset + 63) & ~63;
 259         }
 260
 261         BEGIN_RING(Nv3D, NV40TCL_FP_ADDRESS, 1);
 262         OUT_RING  (shader->hw_id | NV40TCL_FP_ADDRESS_DMA0);
 263         BEGIN_RING(Nv3D, NV40TCL_FP_CONTROL, 1);
 264         OUT_RING  (shader->card_priv.NV30FP.num_regs <<
 265                    NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT);
 266 }
 267
 268 static void
 269 NV40_SetupBlend(ScrnInfoPtr pScrn, nv_pict_op_t *blend,
 270                 PictFormatShort dest_format, Bool component_alpha)
 271 {
 272         NVPtr pNv = NVPTR(pScrn);
 273         uint32_t sblend, dblend;
 274
 275         sblend = blend->src_card_op;
 276         dblend = blend->dst_card_op;
 277
 278         if (blend->dst_alpha) {
 279                 if (!PICT_FORMAT_A(dest_format)) {
 280                         if (sblend == SF(DST_ALPHA)) {
 281                                 sblend = SF(ONE);
 282                         } else if (sblend == SF(ONE_MINUS_DST_ALPHA)) {
 283                                 sblend = SF(ZERO);
 284                         }
 285                 } else if (dest_format == PICT_a8) {
 286                         if (sblend == SF(DST_ALPHA)) {
 287                                 sblend = SF(DST_COLOR);
 288                         } else if (sblend == SF(ONE_MINUS_DST_ALPHA)) {
 289                                 sblend = SF(ONE_MINUS_DST_COLOR);
 290                         }
 291                 }
 292         }
 293
 294         if (blend->src_alpha && (component_alpha || dest_format == PICT_a8)) {
 295                 if (dblend == DF(SRC_ALPHA)) {
 296                         dblend = DF(SRC_COLOR);
 297                 } else if (dblend == DF(ONE_MINUS_SRC_ALPHA)) {
 298                         dblend = DF(ONE_MINUS_SRC_COLOR);
 299                 }
 300         }
 301
 302         if (sblend == SF(ONE) && dblend == DF(ZERO)) {
 303                 BEGIN_RING(Nv3D, NV40TCL_BLEND_ENABLE, 1);
 304                 OUT_RING  (0);
 305         } else {
 306                 BEGIN_RING(Nv3D, NV40TCL_BLEND_ENABLE, 5);
 307                 OUT_RING  (1);
 308                 OUT_RING  (sblend);
 309                 OUT_RING  (dblend);
 310                 OUT_RING  (0x00000000);
 311                 OUT_RING  (NV40TCL_BLEND_EQUATION_ALPHA_FUNC_ADD |
 312                            NV40TCL_BLEND_EQUATION_RGB_FUNC_ADD);
 313         }
 314 }
 315
 316 static Bool
 317 NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
 318 {
 319         NVPtr pNv = NVPTR(pScrn);
 320         nv_pict_texture_format_t *fmt;
 321         NV40EXA_STATE;
 322
 323         fmt = NV40_GetPictTextureFormat(pPict->format);
 324         if (!fmt)
 325                 return FALSE;
 326
 327         BEGIN_RING(Nv3D, NV40TCL_TEX_OFFSET(unit), 8);
 328         OUT_RING  (NVAccelGetPixmapOffset(pPix));
 329         OUT_RING  (fmt->card_fmt | NV40TCL_TEX_FORMAT_LINEAR |
 330                    NV40TCL_TEX_FORMAT_DIMS_2D | NV40TCL_TEX_FORMAT_DMA0 |
 331                    NV40TCL_TEX_FORMAT_NO_BORDER | (0x8000) |
 332                    (1 << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT));
 333         if (pPict->repeat && pPict->repeatType == RepeatNormal) {
 334                 OUT_RING  (NV40TCL_TEX_WRAP_S_REPEAT |
 335                            NV40TCL_TEX_WRAP_T_REPEAT |
 336                            NV40TCL_TEX_WRAP_R_REPEAT);
 337         } else {
 338                 OUT_RING  (NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE |
 339                            NV40TCL_TEX_WRAP_T_CLAMP_TO_EDGE |
 340                            NV40TCL_TEX_WRAP_R_CLAMP_TO_EDGE);
 341         }
 342         OUT_RING  (NV40TCL_TEX_ENABLE_ENABLE);
 343         OUT_RING  (fmt->card_swz);
 344         if (pPict->filter == PictFilterBilinear) {
 345                 OUT_RING  (NV40TCL_TEX_FILTER_MIN_LINEAR |
 346                            NV40TCL_TEX_FILTER_MAG_LINEAR |
 347                            0x3fd6);
 348         } else {
 349                 OUT_RING  (NV40TCL_TEX_FILTER_MIN_NEAREST |
 350                            NV40TCL_TEX_FILTER_MAG_NEAREST |
 351                            0x3fd6);
 352         }
 353         OUT_RING  ((pPix->drawable.width << 16) | pPix->drawable.height);
 354         OUT_RING  (0); /* border ARGB */
 355         BEGIN_RING(Nv3D, NV40TCL_TEX_SIZE1(unit), 1);
 356         OUT_RING  ((1 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) |
 357                    (uint32_t)exaGetPixmapPitch(pPix));
 358
 359         state->unit[unit].width         = (float)pPix->drawable.width;
 360         state->unit[unit].height        = (float)pPix->drawable.height;
 361         state->unit[unit].transform     = pPict->transform;
 362
 363         return TRUE;
 364 }
 365
 366 static Bool
 367 NV40_SetupSurface(ScrnInfoPtr pScrn, PixmapPtr pPix, PictFormatShort format)
 368 {
 369         NVPtr pNv = NVPTR(pScrn);
 370         nv_pict_surface_format_t *fmt;
 371
 372         fmt = NV40_GetPictSurfaceFormat(format);
 373         if (!fmt) {
 374                 ErrorF("AIII no format\n");
 375                 return FALSE;
 376         }
 377
 378         uint32_t pitch = (uint32_t)exaGetPixmapPitch(pPix);
 379
 380         BEGIN_RING(Nv3D, NV40TCL_RT_FORMAT, 3);
 381         OUT_RING  (NV40TCL_RT_FORMAT_TYPE_LINEAR |
 382                    NV40TCL_RT_FORMAT_ZETA_Z24S8 |
 383                    fmt->card_fmt);
 384         OUT_RING  (pitch);
 385         OUT_RING  (NVAccelGetPixmapOffset(pPix));
 386
 387         return TRUE;
 388 }
 389
 390 static Bool
 391 NV40EXACheckCompositeTexture(PicturePtr pPict)
 392 {
 393         nv_pict_texture_format_t *fmt;
 394         int w = pPict->pDrawable->width;
 395         int h = pPict->pDrawable->height;
 396
 397         if ((w > 4096) || (h > 4096))
 398                 FALLBACK("picture too large, %dx%d\n", w, h);
 399
 400         fmt = NV40_GetPictTextureFormat(pPict->format);
 401         if (!fmt)
 402                 FALLBACK("picture format 0x%08x not supported\n",
 403                                 pPict->format);
 404
 405         if (pPict->filter != PictFilterNearest &&
 406             pPict->filter != PictFilterBilinear)
 407                 FALLBACK("filter 0x%x not supported\n", pPict->filter);
 408
 409         if (pPict->repeat &&
 410             (pPict->repeat != RepeatNormal && pPict->repeatType != RepeatNone))
 411                 FALLBACK("repeat 0x%x not supported\n", pPict->repeatType);
 412
 413         return TRUE;
 414 }
 415
 416 Bool
 417 NV40EXACheckComposite(int op, PicturePtr psPict,
 418                               PicturePtr pmPict,
 419                               PicturePtr pdPict)
 420 {
 421         nv_pict_surface_format_t *fmt;
 422         nv_pict_op_t *opr;
 423
 424         opr = NV40_GetPictOpRec(op);
 425         if (!opr)
 426                 FALLBACK("unsupported blend op 0x%x\n", op);
 427
 428         fmt = NV40_GetPictSurfaceFormat(pdPict->format);
 429         if (!fmt)
 430                 FALLBACK("dst picture format 0x%08x not supported\n",
 431                                 pdPict->format);
 432
 433         if (!NV40EXACheckCompositeTexture(psPict))
 434                 FALLBACK("src picture\n");
 435         if (pmPict) {
 436                 if (pmPict->componentAlpha &&
 437                     PICT_FORMAT_RGB(pmPict->format) &&
 438                     opr->src_alpha && opr->src_card_op != SF(ZERO))
 439                         FALLBACK("mask CA + SA\n");
 440                 if (!NV40EXACheckCompositeTexture(pmPict))
 441                         FALLBACK("mask picture\n");
 442         }
 443
 444         return TRUE;
 445 }
 446
 447 Bool
 448 NV40EXAPrepareComposite(int op, PicturePtr psPict,
 449                                 PicturePtr pmPict,
 450                                 PicturePtr pdPict,
 451                                 PixmapPtr  psPix,
 452                                 PixmapPtr  pmPix,
 453                                 PixmapPtr  pdPix)
 454 {
 455         ScrnInfoPtr pScrn = xf86Screens[psPix->drawable.pScreen->myNum];
 456         NVPtr pNv = NVPTR(pScrn);
 457         nv_pict_op_t *blend;
 458         int fpid = NV40EXA_FPID_PASS_COL0;
 459         NV40EXA_STATE;
 460
 461         blend = NV40_GetPictOpRec(op);
 462
 463         NV40_SetupBlend(pScrn, blend, pdPict->format,
 464                         (pmPict && pmPict->componentAlpha &&
 465                          PICT_FORMAT_RGB(pmPict->format)));
 466
 467         NV40_SetupSurface(pScrn, pdPix, pdPict->format);
 468         NV40EXATexture(pScrn, psPix, psPict, 0);
 469
 470         NV40_LoadVtxProg(pScrn, &nv40_vp_exa_render);
 471         if (pmPict) {
 472                 NV40EXATexture(pScrn, pmPix, pmPict, 1);
 473
 474                 if (pmPict->componentAlpha && PICT_FORMAT_RGB(pmPict->format)) {
 475                         if (blend->src_alpha)
 476                                 fpid = NV40EXA_FPID_COMPOSITE_MASK_SA_CA;
 477                         else
 478                                 fpid = NV40EXA_FPID_COMPOSITE_MASK_CA;
 479                 } else {
 480                         fpid = NV40EXA_FPID_COMPOSITE_MASK;
 481                 }
 482
 483                 state->have_mask = TRUE;
 484         } else {
 485                 fpid = NV40EXA_FPID_PASS_TEX0;
 486
 487                 state->have_mask = FALSE;
 488         }
 489
 490         if (pdPict->format == PICT_a8)
 491                 NV40_LoadFragProg(pScrn, nv40_fp_map_a8[fpid]);
 492         else
 493                 NV40_LoadFragProg(pScrn, nv40_fp_map[fpid]);
 494
 495         /* Appears to be some kind of cache flush, needed here at least
 496          * sometimes.. funky text rendering otherwise :)
 497          */
 498         BEGIN_RING(Nv3D, NV40TCL_TEX_CACHE_CTL, 1);
 499         OUT_RING  (2);
 500         BEGIN_RING(Nv3D, NV40TCL_TEX_CACHE_CTL, 1);
 501         OUT_RING  (1);
 502
 503         BEGIN_RING(Nv3D, NV40TCL_BEGIN_END, 1);
 504         OUT_RING  (NV40TCL_BEGIN_END_QUADS);
 505
 506         return TRUE;
 507 }
 508
 509 #define xFixedToFloat(v) \
 510         ((float)xFixedToInt((v)) + ((float)xFixedFrac(v) / 65536.0))
 511
 512 static void
 513 NV40EXATransformCoord(PictTransformPtr t, int x, int y, float sx, float sy,
 514                                           float *x_ret, float *y_ret)
 515 {
 516         PictVector v;
 517
 518         if (t) {
 519                 v.vector[0] = IntToxFixed(x);
 520                 v.vector[1] = IntToxFixed(y);
 521                 v.vector[2] = xFixed1;
 522                 PictureTransformPoint(t, &v);
 523                 *x_ret = xFixedToFloat(v.vector[0]) / sx;
 524                 *y_ret = xFixedToFloat(v.vector[1]) / sy;
 525         } else {
 526                 *x_ret = (float)x / sx;
 527                 *y_ret = (float)y / sy;
 528         }
 529 }
 530
 531 #define CV_OUTm(sx,sy,mx,my,dx,dy) do {                                        \
 532         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2F_X(8), 4);                         \
 533         OUT_RINGf ((sx)); OUT_RINGf ((sy));                                    \
 534         OUT_RINGf ((mx)); OUT_RINGf ((my));                                    \
 535         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2I(0), 1);                           \
 536         OUT_RING  (((dy)<<16)|(dx));                                           \
 537 } while(0)
 538 #define CV_OUT(sx,sy,dx,dy) do {                                               \
 539         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2F_X(8), 2);                         \
 540         OUT_RINGf ((sx)); OUT_RINGf ((sy));                                    \
 541         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2I(0), 1);                           \
 542         OUT_RING  (((dy)<<16)|(dx));                                           \
 543 } while(0)
 544
 545 void
 546 NV40EXAComposite(PixmapPtr pdPix, int srcX , int srcY,
 547                                   int maskX, int maskY,
 548                                   int dstX , int dstY,
 549                                   int width, int height)
 550 {
 551         ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum];
 552         NVPtr pNv = NVPTR(pScrn);
 553         float sX0, sX1, sY0, sY1;
 554         float mX0, mX1, mY0, mY1;
 555         NV40EXA_STATE;
 556
 557         NV40EXATransformCoord(state->unit[0].transform, srcX, srcY,
 558                               state->unit[0].width,
 559                               state->unit[0].height, &sX0, &sY0);
 560         NV40EXATransformCoord(state->unit[0].transform,
 561                               srcX + width, srcY + height,
 562                               state->unit[0].width,
 563                               state->unit[0].height, &sX1, &sY1);
 564
 565         if (state->have_mask) {
 566                 NV40EXATransformCoord(state->unit[1].transform, maskX, maskY,
 567                                       state->unit[1].width,
 568                                       state->unit[1].height, &mX0, &mY0);
 569                 NV40EXATransformCoord(state->unit[1].transform,
 570                                       maskX + width, maskY + height,
 571                                       state->unit[1].width,
 572                                       state->unit[1].height, &mX1, &mY1);
 573                 CV_OUTm(sX0 , sY0 , mX0, mY0, dstX        ,          dstY);
 574                 CV_OUTm(sX1 , sY0 , mX1, mY0, dstX + width,          dstY);
 575                 CV_OUTm(sX1 , sY1 , mX1, mY1, dstX + width, dstY + height);
 576                 CV_OUTm(sX0 , sY1 , mX0, mY1, dstX        , dstY + height);
 577         } else {
 578                 CV_OUT(sX0 , sY0 , dstX        ,          dstY);
 579                 CV_OUT(sX1 , sY0 , dstX + width,          dstY);
 580                 CV_OUT(sX1 , sY1 , dstX + width, dstY + height);
 581                 CV_OUT(sX0 , sY1 , dstX        , dstY + height);
 582         }
 583
 584         FIRE_RING();
 585 }
 586
 587 void
 588 NV40EXADoneComposite(PixmapPtr pdPix)
 589 {
 590         ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum];
 591         NVPtr pNv = NVPTR(pScrn);
 592
 593         BEGIN_RING(Nv3D, NV40TCL_BEGIN_END, 1);
 594         OUT_RING  (NV40TCL_BEGIN_END_STOP);
 595 }
 596
 597 #define NV40TCL_CHIPSET_4X_MASK 0x00000baf
 598 #define NV44TCL_CHIPSET_4X_MASK 0x00005450
 599 Bool
 600 NVAccelInitNV40TCL(ScrnInfoPtr pScrn)
 601 {
 602         NVPtr pNv = NVPTR(pScrn);
 603         static int have_object = FALSE;
 604         uint32_t class = 0, chipset;
 605         int i;
 606
 607         NV40EXAHackupA8Shaders(pScrn);
 608
 609         chipset = (nvReadMC(pNv, 0) >> 20) & 0xff;
 610         if ((chipset & 0xf0) != NV_ARCH_40)
 611                 return TRUE;
 612         chipset &= 0xf;
 613
 614         if (NV40TCL_CHIPSET_4X_MASK & (1<<chipset))
 615                 class = NV40TCL;
 616         else if (NV44TCL_CHIPSET_4X_MASK & (1<<chipset))
 617                 class = NV44TCL;
 618         else {
 619                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 620                            "NV40EXA: Unknown chipset NV4%1x\n", chipset);
 621                 return FALSE;
 622         }
 623
 624         if (!have_object) {
 625                 if (!NVDmaCreateContextObject(pNv, Nv3D, class))
 626                         return FALSE;
 627                 have_object = TRUE;
 628         }
 629
 630         BEGIN_RING(Nv3D, NV40TCL_DMA_NOTIFY, 1);
 631         OUT_RING  (NvDmaNotifier0);
 632         BEGIN_RING(Nv3D, NV40TCL_DMA_TEXTURE0, 1);
 633         OUT_RING  (NvDmaFB);
 634         BEGIN_RING(Nv3D, NV40TCL_DMA_COLOR0, 2);
 635         OUT_RING  (NvDmaFB);
 636         OUT_RING  (NvDmaFB);
 637
 638         /* voodoo */
 639         BEGIN_RING(Nv3D, 0x1ea4, 3);
 640         OUT_RING  (0x00000010);
 641         OUT_RING  (0x01000100);
 642         OUT_RING  (0xff800006);
 643         BEGIN_RING(Nv3D, 0x1fc4, 1);
 644         OUT_RING  (0x06144321);
 645         BEGIN_RING(Nv3D, 0x1fc8, 2);
 646         OUT_RING  (0xedcba987);
 647         OUT_RING  (0x00000021);
 648         BEGIN_RING(Nv3D, 0x1fd0, 1);
 649         OUT_RING  (0x00171615);
 650         BEGIN_RING(Nv3D, 0x1fd4, 1);
 651         OUT_RING  (0x001b1a19);
 652         BEGIN_RING(Nv3D, 0x1ef8, 1);
 653         OUT_RING  (0x0020ffff);
 654         BEGIN_RING(Nv3D, 0x1d64, 1);
 655         OUT_RING  (0x00d30000);
 656         BEGIN_RING(Nv3D, 0x1e94, 1);
 657         OUT_RING  (0x00000001);
 658
 659         BEGIN_RING(Nv3D, NV40TCL_VIEWPORT_TRANSLATE_X, 8);
 660         OUT_RINGf (0.0);
 661         OUT_RINGf (0.0);
 662         OUT_RINGf (0.0);
 663         OUT_RINGf (0.0);
 664         OUT_RINGf (1.0);
 665         OUT_RINGf (1.0);
 666         OUT_RINGf (1.0);
 667         OUT_RINGf (0.0);
 668
 669         /* default 3D state */
 670         /*XXX: replace with the same state that the DRI emits on startup */
 671         BEGIN_RING(Nv3D, NV40TCL_STENCIL_FRONT_ENABLE, 1);
 672         OUT_RING  (0);
 673         BEGIN_RING(Nv3D, NV40TCL_STENCIL_BACK_ENABLE, 1);
 674         OUT_RING  (0);
 675         BEGIN_RING(Nv3D, NV40TCL_ALPHA_TEST_ENABLE, 1);
 676         OUT_RING  (0);
 677         BEGIN_RING(Nv3D, NV40TCL_DEPTH_WRITE_ENABLE, 2);
 678         OUT_RING  (0);
 679         OUT_RING  (0);
 680         BEGIN_RING(Nv3D, NV40TCL_COLOR_MASK, 1);
 681         OUT_RING  (0x01010101); /* TR,TR,TR,TR */
 682         BEGIN_RING(Nv3D, NV40TCL_CULL_FACE_ENABLE, 1);
 683         OUT_RING  (0);
 684         BEGIN_RING(Nv3D, NV40TCL_BLEND_ENABLE, 1);
 685         OUT_RING  (0);
 686         BEGIN_RING(Nv3D, NV40TCL_COLOR_LOGIC_OP_ENABLE, 2);
 687         OUT_RING  (0);
 688         OUT_RING  (NV40TCL_COLOR_LOGIC_OP_COPY);
 689         BEGIN_RING(Nv3D, NV40TCL_DITHER_ENABLE, 1);
 690         OUT_RING  (0);
 691         BEGIN_RING(Nv3D, NV40TCL_SHADE_MODEL, 1);
 692         OUT_RING  (NV40TCL_SHADE_MODEL_SMOOTH);
 693         BEGIN_RING(Nv3D, NV40TCL_POLYGON_OFFSET_FACTOR,2);
 694         OUT_RINGf (0.0);
 695         OUT_RINGf (0.0);
 696         BEGIN_RING(Nv3D, NV40TCL_POLYGON_MODE_FRONT, 2);
 697         OUT_RING  (NV40TCL_POLYGON_MODE_FRONT_FILL);
 698         OUT_RING  (NV40TCL_POLYGON_MODE_BACK_FILL);
 699         BEGIN_RING(Nv3D, NV40TCL_POLYGON_STIPPLE_PATTERN(0), 0x20);
 700         for (i=0;i<0x20;i++)
 701                 OUT_RING  (0xFFFFFFFF);
 702         for (i=0;i<16;i++) {
 703                 BEGIN_RING(Nv3D, NV40TCL_TEX_ENABLE(i), 1);
 704                 OUT_RING  (0);
 705         }
 706
 707         BEGIN_RING(Nv3D, 0x1d78, 1);
 708         OUT_RING  (0x110);
 709
 710         BEGIN_RING(Nv3D, NV40TCL_RT_ENABLE, 1);
 711         OUT_RING  (NV40TCL_RT_ENABLE_COLOR0);
 712
 713         BEGIN_RING(Nv3D, NV40TCL_RT_HORIZ, 2);
 714         OUT_RING  ((4096 << 16));
 715         OUT_RING  ((4096 << 16));
 716         BEGIN_RING(Nv3D, NV40TCL_SCISSOR_HORIZ, 2);
 717         OUT_RING  ((4096 << 16));
 718         OUT_RING  ((4096 << 16));
 719         BEGIN_RING(Nv3D, NV40TCL_VIEWPORT_HORIZ, 2);
 720         OUT_RING  ((4096 << 16));
 721         OUT_RING  ((4096 << 16));
 722         BEGIN_RING(Nv3D, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
 723         OUT_RING  ((4095 << 16));
 724         OUT_RING  ((4095 << 16));
 725
 726         return TRUE;
 727 }
 728