1 /* $XdotOrg: driver/xf86-video-nv/src/nv_driver.c,v 1.21 2006/01/24 16:45:29 aplattner Exp $ */
2 /* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
4 * Copyright 1996-1997 David J. McKay
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
28 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.144 2006/06/16 00:19:32 mvojkovi Exp $ */
32 #include "nv_include.h"
34 #include "xf86int10.h"
38 extern DisplayModePtr xf86ModesAdd(DisplayModePtr Modes, DisplayModePtr Additions);
41 * Forward definitions for the functions that make up the driver.
43 /* Mandatory functions */
44 static const OptionInfoRec * NVAvailableOptions(int chipid, int busid);
45 static void NVIdentify(int flags);
46 #ifndef XSERVER_LIBPCIACCESS
47 static Bool NVProbe(DriverPtr drv, int flags);
48 #endif /* XSERVER_LIBPCIACCESS */
49 static Bool NVPreInit(ScrnInfoPtr pScrn, int flags);
50 static Bool NVScreenInit(int Index, ScreenPtr pScreen, int argc,
52 static Bool NVEnterVT(int scrnIndex, int flags);
53 static void NVLeaveVT(int scrnIndex, int flags);
54 static Bool NVCloseScreen(int scrnIndex, ScreenPtr pScreen);
55 static Bool NVSaveScreen(ScreenPtr pScreen, int mode);
57 /* Optional functions */
58 static void NVFreeScreen(int scrnIndex, int flags);
59 static ModeStatus NVValidMode(int scrnIndex, DisplayModePtr mode,
60 Bool verbose, int flags);
61 static Bool NVDriverFunc(ScrnInfoPtr pScrnInfo, xorgDriverFuncOp op,
64 /* Internally used functions */
66 static Bool NVMapMem(ScrnInfoPtr pScrn);
67 static Bool NVUnmapMem(ScrnInfoPtr pScrn);
68 static void NVSave(ScrnInfoPtr pScrn);
69 static void NVRestore(ScrnInfoPtr pScrn);
70 static Bool NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
72 #ifdef XSERVER_LIBPCIACCESS
74 #define NOUVEAU_PCI_DEVICE(_vendor_id, _device_id) \
75 { (_vendor_id), (_device_id), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x00030000, 0x00ffffff, 0 }
77 static const struct pci_id_match nouveau_device_match[] = {
78 NOUVEAU_PCI_DEVICE(PCI_VENDOR_NVIDIA, PCI_MATCH_ANY),
79 NOUVEAU_PCI_DEVICE(PCI_VENDOR_NVIDIA_SGS, PCI_MATCH_ANY),
83 static Bool NVPciProbe ( DriverPtr drv,
85 struct pci_device *dev,
86 intptr_t match_data );
88 #endif /* XSERVER_LIBPCIACCESS */
91 * This contains the functions needed by the server after loading the
92 * driver module. It must be supplied, and gets added the driver list by
93 * the Module Setup funtion in the dynamic case. In the static case a
94 * reference to this is compiled in, and this requires that the name of
95 * this DriverRec be an upper-case version of the driver name.
98 _X_EXPORT DriverRec NV = {
102 #ifdef XSERVER_LIBPCIACCESS
106 #endif /* XSERVER_LIBPCIACCESS */
111 #ifdef XSERVER_LIBPCIACCESS
112 nouveau_device_match,
114 #endif /* XSERVER_LIBPCIACCESS */
123 static struct NvFamily NVKnownFamilies[] =
125 { "RIVA TNT", "NV04" },
126 { "RIVA TNT2", "NV05" },
127 { "GeForce 256", "NV10" },
128 { "GeForce 2", "NV11, NV15" },
129 { "GeForce 4MX", "NV17, NV18" },
130 { "GeForce 3", "NV20" },
131 { "GeForce 4Ti", "NV25, NV28" },
132 { "GeForce FX", "NV3x" },
133 { "GeForce 6", "NV4x" },
134 { "GeForce 7", "G7x" },
135 { "GeForce 8", "G8x" },
140 * List of symbols from other modules that this module references. This
141 * list is used to tell the loader that it is OK for symbols here to be
142 * unresolved providing that it hasn't been told that they haven't been
143 * told that they are essential via a call to xf86LoaderReqSymbols() or
144 * xf86LoaderReqSymLists(). The purpose is this is to avoid warnings about
145 * unresolved symbols that are not required.
148 static const char *vgahwSymbols[] = {
163 static const char *fbSymbols[] = {
169 static const char *exaSymbols[] = {
175 static const char *ramdacSymbols[] = {
176 "xf86CreateCursorInfoRec",
177 "xf86DestroyCursorInfoRec",
182 static const char *ddcSymbols[] = {
185 "xf86SetDDCproperties",
189 static const char *vbeSymbols[] = {
196 static const char *i2cSymbols[] = {
197 "xf86CreateI2CBusRec",
202 static const char *shadowSymbols[] = {
207 static const char *int10Symbols[] = {
213 const char *drmSymbols[] = {
218 "drmAgpVersionMajor",
219 "drmAgpVersionMinor",
229 "drmCommandWriteRead",
232 "drmCtlUninstHandler",
235 "drmGetInterruptFromBusID",
241 const char *driSymbols[] = {
245 "DRIFinishScreenInit",
246 "DRIGetSAREAPrivate",
251 "GlxSetVisualConfigs",
257 static MODULESETUPPROTO(nouveauSetup);
259 static XF86ModuleVersionInfo nouveauVersRec =
265 XORG_VERSION_CURRENT,
266 NV_MAJOR_VERSION, NV_MINOR_VERSION, NV_PATCHLEVEL,
267 ABI_CLASS_VIDEODRV, /* This is a video driver */
268 ABI_VIDEODRV_VERSION,
273 _X_EXPORT XF86ModuleData nouveauModuleData = { &nouveauVersRec, nouveauSetup, NULL };
277 * This is intentionally screen-independent. It indicates the binding
278 * choice made in the first PreInit.
280 static int pix24bpp = 0;
283 NVGetRec(ScrnInfoPtr pScrn)
286 * Allocate an NVRec, and hook it into pScrn->driverPrivate.
287 * pScrn->driverPrivate is initialised to NULL, so we can check if
288 * the allocation has already been done.
290 if (pScrn->driverPrivate != NULL)
293 pScrn->driverPrivate = xnfcalloc(sizeof(NVRec), 1);
300 NVFreeRec(ScrnInfoPtr pScrn)
302 if (pScrn->driverPrivate == NULL)
304 xfree(pScrn->driverPrivate);
305 pScrn->driverPrivate = NULL;
310 nouveauSetup(pointer module, pointer opts, int *errmaj, int *errmin)
312 static Bool setupDone = FALSE;
314 /* This module should be loaded only once, but check to be sure. */
318 /* The 1 here is needed to turn off a backwards compatibility mode */
319 /* Otherwise NVPciProbe() is not called */
320 xf86AddDriver(&NV, module, 1);
323 * Modules that this driver always requires may be loaded here
324 * by calling LoadSubModule().
327 * Tell the loader about symbols from other modules that this module
330 LoaderRefSymLists(vgahwSymbols, exaSymbols, fbSymbols,
334 ramdacSymbols, shadowSymbols,
335 i2cSymbols, ddcSymbols, vbeSymbols,
339 * The return value must be non-NULL on success even though there
340 * is no TearDownProc.
344 if (errmaj) *errmaj = LDR_ONCEONLY;
349 static const OptionInfoRec *
350 NVAvailableOptions(int chipid, int busid)
357 NVIdentify(int flags)
359 struct NvFamily *family;
362 xf86DrvMsg(0, X_INFO, NV_NAME " driver " NV_DRIVER_DATE "\n");
363 xf86DrvMsg(0, X_INFO, NV_NAME " driver for NVIDIA chipset families :\n");
365 /* maximum length for alignment */
366 family = NVKnownFamilies;
367 while(family->name && family->chipset)
369 maxLen = max(maxLen, strlen(family->name));
374 family = NVKnownFamilies;
375 while(family->name && family->chipset)
377 size_t len = strlen(family->name);
378 xf86ErrorF("\t%s", family->name);
384 xf86ErrorF("(%s)\n", family->chipset);
390 #ifndef XSERVER_LIBPCIACCESS
392 NVGetScrnInfoRec(PciChipsets *chips, int chip)
396 pScrn = xf86ConfigPciEntity(NULL, 0, chip,
397 chips, NULL, NULL, NULL,
400 if(!pScrn) return FALSE;
402 pScrn->driverVersion = NV_VERSION;
403 pScrn->driverName = NV_DRIVER_NAME;
404 pScrn->name = NV_NAME;
406 pScrn->Probe = NVProbe;
407 pScrn->PreInit = NVPreInit;
408 pScrn->ScreenInit = NVScreenInit;
409 pScrn->SwitchMode = NVSwitchMode;
410 pScrn->AdjustFrame = NVAdjustFrame;
411 pScrn->EnterVT = NVEnterVT;
412 pScrn->LeaveVT = NVLeaveVT;
413 pScrn->FreeScreen = NVFreeScreen;
414 pScrn->ValidMode = NVValidMode;
420 /* This returns architecture in hexdecimal, so NV40 is 0x40 */
421 static int NVGetArchitecture (volatile CARD32 *regs)
423 int architecture = 0;
425 /* We're dealing with >=NV10 */
426 if ((regs[0] & 0x0f000000) > 0 ) {
427 /* Bit 27-20 contain the architecture in hex */
428 architecture = (regs[0] & 0xff00000) >> 20;
430 } else if ((regs[0] & 0xff00fff0) == 0x20004000) {
437 /* Reading the pci_id from the card registers is the most reliable way */
438 static CARD32 NVGetPCIID (volatile CARD32 *regs)
442 int architecture = NVGetArchitecture(regs);
444 /* Dealing with an unknown or unsupported card */
445 if (architecture == 0) {
449 if (architecture >= 0x40)
450 pci_id = regs[0x88000/4];
452 pci_id = regs[0x1800/4];
454 /* A pci-id can be inverted, we must correct this */
455 if ((pci_id & 0xffff) == PCI_VENDOR_NVIDIA) {
456 pci_id = (PCI_VENDOR_NVIDIA << 16) | (pci_id >> 16);
457 } else if ((pci_id & 0xffff) == PCI_VENDOR_NVIDIA_SGS) {
458 pci_id = (PCI_VENDOR_NVIDIA_SGS << 16) | (pci_id >> 16);
459 /* Checking endian issues */
461 /* PCI_VENDOR_NVIDIA = 0x10DE */
462 if ((pci_id & (0xffff << 16)) == (0xDE10 << 16)) { /* wrong endian */
463 pci_id = (PCI_VENDOR_NVIDIA << 16) | ((pci_id << 8) & 0x0000ff00) |
464 ((pci_id >> 8) & 0x000000ff);
465 /* PCI_VENDOR_NVIDIA_SGS = 0x12D2 */
466 } else if ((pci_id & (0xffff << 16)) == (0xD212 << 16)) { /* wrong endian */
467 pci_id = (PCI_VENDOR_NVIDIA_SGS << 16) | ((pci_id << 8) & 0x0000ff00) |
468 ((pci_id >> 8) & 0x000000ff);
475 #ifdef XSERVER_LIBPCIACCESS
477 static Bool NVPciProbe ( DriverPtr drv,
479 struct pci_device *dev,
480 intptr_t match_data )
482 ScrnInfoPtr pScrn = NULL;
484 volatile uint32_t *regs = NULL;
486 /* Temporary mapping to discover the architecture */
487 pci_device_map_range(dev, PCI_DEV_MEM_BASE(dev, 0), 0x90000, 0,
490 uint8_t architecture = NVGetArchitecture(regs);
492 CARD32 pci_id = NVGetPCIID(regs);
494 pci_device_unmap_range(dev, (void *) regs, 0x90000);
496 /* Currently NV04 up to NV83 is supported */
497 /* For safety the fictional NV8F is used */
498 if (architecture >= 0x04 && architecture <= 0x8F) {
500 /* At this stage the pci_id should be ok, so we generate this
501 * to avoid list duplication */
502 /* AGP bridge chips need their bridge chip id to be detected */
503 PciChipsets NVChipsets[] = {
504 { pci_id, PCI_DEV_PCI_ID(dev), RES_SHARED_VGA },
505 { -1, -1, RES_UNDEFINED }
508 pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, NVChipsets,
509 NULL, NULL, NULL, NULL, NULL);
512 pScrn->driverVersion = NV_VERSION;
513 pScrn->driverName = NV_DRIVER_NAME;
514 pScrn->name = NV_NAME;
517 pScrn->PreInit = NVPreInit;
518 pScrn->ScreenInit = NVScreenInit;
519 pScrn->SwitchMode = NVSwitchMode;
520 pScrn->AdjustFrame = NVAdjustFrame;
521 pScrn->EnterVT = NVEnterVT;
522 pScrn->LeaveVT = NVLeaveVT;
523 pScrn->FreeScreen = NVFreeScreen;
524 pScrn->ValidMode = NVValidMode;
533 #endif /* XSERVER_LIBPCIACCESS */
535 #define MAX_CHIPS MAXSCREENS
537 #ifndef XSERVER_LIBPCIACCESS
540 NVProbe(DriverPtr drv, int flags)
543 GDevPtr *devSections;
545 SymTabRec NVChipsets[MAX_CHIPS + 1];
546 PciChipsets NVPciChipsets[MAX_CHIPS + 1];
550 Bool foundScreen = FALSE;
552 if ((numDevSections = xf86MatchDevice(NV_DRIVER_NAME, &devSections)) <= 0)
553 return FALSE; /* no matching device section */
555 if (!(ppPci = xf86GetPciVideoInfo()))
556 return FALSE; /* no PCI cards found */
560 /* Create the NVChipsets and NVPciChipsets from found devices */
561 while (*ppPci && (numUsed < MAX_CHIPS)) {
562 if (((*ppPci)->vendor == PCI_VENDOR_NVIDIA_SGS) ||
563 ((*ppPci)->vendor == PCI_VENDOR_NVIDIA))
565 volatile CARD32 *regs;
568 PCI_DEV_READ_LONG(*ppPci, PCI_CMD_STAT_REG, &pcicmd);
569 /* Enable reading memory? */
570 PCI_DEV_WRITE_LONG(*ppPci, PCI_CMD_STAT_REG, pcicmd | PCI_CMD_MEM_ENABLE);
572 regs = xf86MapPciMem(-1, VIDMEM_MMIO, PCI_DEV_TAG(*ppPci), PCI_DEV_MEM_BASE(*ppPci, 0), 0x90000);
573 int pciid = NVGetPCIID(regs);
575 int architecture = NVGetArchitecture(regs);
577 sprintf(name, "NVIDIA NV%02X", architecture);
578 /* NV04 upto NV83 is supported, NV8F is fictive limit */
579 if (architecture >= 0x04 && architecture <= 0x8F) {
580 NVChipsets[numUsed].token = pciid;
581 NVChipsets[numUsed].name = name;
582 NVPciChipsets[numUsed].numChipset = pciid;
583 /* AGP bridge chips need their bridge chip id to be detected */
584 NVPciChipsets[numUsed].PCIid = PCI_DEV_PCI_ID(*ppPci);
585 NVPciChipsets[numUsed].resList = RES_SHARED_VGA;
588 xf86UnMapVidMem(-1, (pointer)regs, 0x90000);
590 /* Reset previous state */
591 PCI_DEV_WRITE_LONG(*ppPci, PCI_CMD_STAT_REG, pcicmd);
596 /* terminate the list */
597 NVChipsets[numUsed].token = -1;
598 NVChipsets[numUsed].name = NULL;
599 NVPciChipsets[numUsed].numChipset = -1;
600 NVPciChipsets[numUsed].PCIid = -1;
601 NVPciChipsets[numUsed].resList = RES_UNDEFINED;
603 numUsed = xf86MatchPciInstances(NV_NAME, 0, NVChipsets, NVPciChipsets,
604 devSections, numDevSections, drv,
611 if (flags & PROBE_DETECT) {
614 for (i = 0; i < numUsed; i++) {
617 pPci = xf86GetPciInfoForEntity(usedChips[i]);
618 if (NVGetScrnInfoRec(NVPciChipsets, usedChips[i])) {
629 #endif /* XSERVER_LIBPCIACCESS */
632 NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
634 ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
635 NVPtr pNv = NVPTR(pScrn);
637 if (pNv->randr12_enable) {
638 /* No rotation support for the moment */
639 return xf86SetSingleMode(pScrn, mode, RR_Rotate_0);
642 return NVModeInit(xf86Screens[scrnIndex], mode);
646 * This function is used to initialize the Start Address - the first
647 * displayed location in the video memory.
649 /* Usually mandatory */
651 NVAdjustFrame(int scrnIndex, int x, int y, int flags)
653 ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
654 NVPtr pNv = NVPTR(pScrn);
656 if (pNv->randr12_enable) {
657 xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
658 xf86CrtcPtr crtc = config->output[config->compat_output]->crtc;
660 if (crtc && crtc->enabled) {
661 NVCrtcSetBase(crtc, x, y, FALSE);
665 NVFBLayout *pLayout = &pNv->CurrentLayout;
666 startAddr = (((y*pLayout->displayWidth)+x)*(pLayout->bitsPerPixel/8));
667 startAddr += pNv->FB->offset;
668 NVSetStartAddress(pNv, startAddr);
673 NV50AcquireDisplay(ScrnInfoPtr pScrn)
675 if (!NV50DispInit(pScrn))
677 if (!NV50CursorAcquire(pScrn))
679 xf86SetDesiredModes(pScrn);
685 NV50ReleaseDisplay(ScrnInfoPtr pScrn)
687 NV50CursorRelease(pScrn);
688 NV50DispShutdown(pScrn);
693 * This is called when VT switching back to the X server. Its job is
694 * to reinitialise the video mode.
696 * We may wish to unmap video/MMIO memory too.
701 NVEnterVT(int scrnIndex, int flags)
703 ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
704 NVPtr pNv = NVPTR(pScrn);
706 if (pNv->randr12_enable) {
707 ErrorF("NVEnterVT is called\n");
708 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
710 pScrn->vtSema = TRUE;
712 if (pNv->Architecture == NV_ARCH_50) {
713 if (!NV50AcquireDisplay(pScrn))
718 /* Save the current state */
719 if (pNv->SaveGeneration != serverGeneration) {
720 pNv->SaveGeneration = serverGeneration;
724 for (i = 0; i < xf86_config->num_crtc; i++) {
725 NVCrtcLockUnlock(xf86_config->crtc[i], 0);
728 /* Reassign outputs so disabled outputs don't get stuck on the wrong crtc */
729 for (i = 0; i < xf86_config->num_output; i++) {
730 xf86OutputPtr output = xf86_config->output[i];
731 NVOutputPrivatePtr nv_output = output->driver_private;
732 if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS) {
735 /* Disable any crosswired tmds, to avoid picking up a signal on a disabled output */
736 /* Example: TMDS1 crosswired to CRTC0 (by bios) reassigned to CRTC1 in xorg, disabled. */
737 /* But the bios reinits it to CRTC0 when going back to VT. */
738 /* Because it's disabled, it doesn't get a mode set, still it picks up the signal from CRTC0 (which is another output) */
739 /* A legitimately crosswired output will get set properly during mode set */
740 if ((tmds_reg4 = NVReadTMDS(pNv, nv_output->preferred_output, 0x4)) & (1 << 3)) {
741 NVWriteTMDS(pNv, nv_output->preferred_output, 0x4, tmds_reg4 & ~(1 << 3));
746 if (!xf86SetDesiredModes(pScrn))
749 if (!NVModeInit(pScrn, pScrn->currentMode))
752 NVAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
755 if (pNv->overlayAdaptor && pNv->Architecture != NV_ARCH_04)
756 NV10WriteOverlayParameters(pScrn);
761 * This is called when VT switching away from the X server. Its job is
762 * to restore the previous (text) mode.
764 * We may wish to remap video/MMIO memory too.
769 NVLeaveVT(int scrnIndex, int flags)
771 ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
772 NVPtr pNv = NVPTR(pScrn);
773 if (pNv->randr12_enable)
774 ErrorF("NVLeaveVT is called\n");
776 if (pNv->Architecture == NV_ARCH_50) {
777 NV50ReleaseDisplay(pScrn);
782 if (!pNv->randr12_enable)
783 NVLockUnlock(pNv, 1);
796 ScreenPtr pScreen = screenInfo.screens[i];
797 ScrnInfoPtr pScrnInfo = xf86Screens[i];
798 NVPtr pNv = NVPTR(pScrnInfo);
802 pScreen->BlockHandler = pNv->BlockHandler;
803 (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
804 pScreen->BlockHandler = NVBlockHandler;
806 if (pNv->VideoTimerCallback)
807 (*pNv->VideoTimerCallback)(pScrnInfo, currentTime.milliseconds);
813 * This is called at the end of each server generation. It restores the
814 * original (text) mode. It should also unmap the video memory, and free
815 * any per-generation data allocated by the driver. It should finish
816 * by unwrapping and calling the saved CloseScreen function.
821 NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
823 ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
824 NVPtr pNv = NVPTR(pScrn);
827 pScrn->vtSema = FALSE;
828 if (pNv->Architecture == NV_ARCH_50) {
829 NV50ReleaseDisplay(pScrn);
831 if (pNv->randr12_enable)
832 ErrorF("NVCloseScreen is called\n");
835 if (!pNv->randr12_enable)
836 NVLockUnlock(pNv, 1);
841 vgaHWUnmapMem(pScrn);
842 if (pNv->CursorInfoRec)
843 xf86DestroyCursorInfoRec(pNv->CursorInfoRec);
845 xfree(pNv->ShadowPtr);
846 if (pNv->overlayAdaptor)
847 xfree(pNv->overlayAdaptor);
848 if (pNv->blitAdaptor)
849 xfree(pNv->blitAdaptor);
851 pScrn->vtSema = FALSE;
852 pScreen->CloseScreen = pNv->CloseScreen;
853 pScreen->BlockHandler = pNv->BlockHandler;
854 return (*pScreen->CloseScreen)(scrnIndex, pScreen);
857 /* Free up any persistent data structures */
861 NVFreeScreen(int scrnIndex, int flags)
864 * This only gets called when a screen is being deleted. It does not
865 * get called routinely at the end of a server generation.
867 if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
868 vgaHWFreeHWRec(xf86Screens[scrnIndex]);
869 NVFreeRec(xf86Screens[scrnIndex]);
873 /* Checks if a mode is suitable for the selected chipset. */
877 NVValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
879 NVPtr pNv = NVPTR(xf86Screens[scrnIndex]);
881 if(pNv->fpWidth && pNv->fpHeight)
882 if((pNv->fpWidth < mode->HDisplay) || (pNv->fpHeight < mode->VDisplay))
889 nvProbeDDC(ScrnInfoPtr pScrn, int index)
893 if (xf86LoadSubModule(pScrn, "vbe")) {
894 pVbe = VBEInit(NULL,index);
895 ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
900 Bool NVI2CInit(ScrnInfoPtr pScrn)
902 NVPtr pNv = NVPTR(pScrn);
905 if (xf86LoadSubModule(pScrn, mod)) {
906 xf86LoaderReqSymLists(i2cSymbols,NULL);
909 if(xf86LoadSubModule(pScrn, mod)) {
910 xf86LoaderReqSymLists(ddcSymbols, NULL);
911 /* randr-1.2 clients have their DDC's initialized elsewhere */
912 if (pNv->randr12_enable) {
915 return NVDACi2cInit(pScrn);
920 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
921 "Couldn't load %s module. DDC probing can't be done\n", mod);
926 static Bool NVPreInitDRI(ScrnInfoPtr pScrn)
928 NVPtr pNv = NVPTR(pScrn);
930 if (!NVDRIGetVersion(pScrn))
933 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
934 "[dri] Found DRI library version %d.%d.%d and kernel"
935 " module version %d.%d.%d\n",
936 pNv->pLibDRMVersion->version_major,
937 pNv->pLibDRMVersion->version_minor,
938 pNv->pLibDRMVersion->version_patchlevel,
939 pNv->pKernelDRMVersion->version_major,
940 pNv->pKernelDRMVersion->version_minor,
941 pNv->pKernelDRMVersion->version_patchlevel);
947 nv_xf86crtc_resize(ScrnInfoPtr pScrn, int width, int height)
949 ErrorF("nv_xf86crtc_resize is called with %dx%d resolution\n", width, height);
950 pScrn->virtualX = width;
951 pScrn->virtualY = height;
955 static const xf86CrtcConfigFuncsRec nv_xf86crtc_config_funcs = {
959 /* This is taken from the haiku driver */
960 /* We must accept crtc pitch constrains */
961 /* A hardware bug on some hardware requires twice the pitch */
962 static CARD8 NVGetCRTCMask(ScrnInfoPtr pScrn, CARD8 bpp)
967 mask = 0xf; /* 0x7 */
970 mask = 0x7; /* 0x3 */
973 mask = 0x7; /* 0x3 */
976 mask = 0xf; /* 0x7 */
979 mask = 0x3; /* 0x1 */
982 ErrorF("Unkown color format\n");
989 /* This is taken from the haiku driver */
990 static CARD8 NVGetAccelerationMask(ScrnInfoPtr pScrn, CARD8 bpp)
992 NVPtr pNv = NVPTR(pScrn);
994 /* Identical for NV04 */
995 if (pNv->Architecture == NV_ARCH_04) {
996 return NVGetCRTCMask(pScrn, bpp);
1015 ErrorF("Unkown color format\n");
1023 static CARD32 NVGetVideoPitch(ScrnInfoPtr pScrn, CARD8 bpp)
1025 NVPtr pNv = NVPTR(pScrn);
1026 CARD8 crtc_mask, accel_mask = 0;
1027 crtc_mask = NVGetCRTCMask(pScrn, bpp);
1028 if (!pNv->NoAccel) {
1029 accel_mask = NVGetAccelerationMask(pScrn, bpp);
1032 /* adhere to the largest granularity imposed */
1033 if (accel_mask > crtc_mask) {
1034 return (pScrn->virtualX + accel_mask) & ~accel_mask;
1036 return (pScrn->virtualX + crtc_mask) & ~crtc_mask;
1040 #define NVPreInitFail(fmt, args...) do { \
1041 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "%d: "fmt, __LINE__, ##args); \
1043 xf86FreeInt10(pNv->pInt10); \
1050 NVPreInit(ScrnInfoPtr pScrn, int flags)
1052 xf86CrtcConfigPtr xf86_config;
1055 int i, max_width, max_height;
1056 ClockRangePtr clockRanges;
1058 int config_mon_rates = FALSE;
1061 if (flags & PROBE_DETECT) {
1062 EntityInfoPtr pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
1070 nvProbeDDC(pScrn, i);
1075 * Note: This function is only called once at server startup, and
1076 * not at the start of each server generation. This means that
1077 * only things that are persistent across server generations can
1078 * be initialised here. xf86Screens[] is (pScrn is a pointer to one
1079 * of these). Privates allocated using xf86AllocateScrnInfoPrivateIndex()
1080 * are too, and should be used for data that must persist across
1081 * server generations.
1083 * Per-generation data should be allocated with
1084 * AllocateScreenPrivateIndex() from the ScreenInit() function.
1087 /* Check the number of entities, and fail if it isn't one. */
1088 if (pScrn->numEntities != 1)
1091 /* Allocate the NVRec driverPrivate */
1092 if (!NVGetRec(pScrn)) {
1097 /* Get the entity, and make sure it is PCI. */
1098 pNv->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
1099 if (pNv->pEnt->location.type != BUS_PCI)
1102 /* Find the PCI info for this screen */
1103 pNv->PciInfo = xf86GetPciInfoForEntity(pNv->pEnt->index);
1104 #ifndef XSERVER_LIBPCIACCESS
1105 pNv->PciTag = pciTag(pNv->PciInfo->bus, pNv->PciInfo->device,
1106 pNv->PciInfo->func);
1107 #endif /* XSERVER_LIBPCIACCESS */
1109 pNv->Primary = xf86IsPrimaryPci(pNv->PciInfo);
1111 /* Initialize the card through int10 interface if needed */
1112 if (xf86LoadSubModule(pScrn, "int10")) {
1113 xf86LoaderReqSymLists(int10Symbols, NULL);
1114 #if !defined(__alpha__) && !defined(__powerpc__)
1115 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing int10\n");
1116 pNv->pInt10 = xf86InitInt10(pNv->pEnt->index);
1120 xf86SetOperatingState(resVgaIo, pNv->pEnt->index, ResUnusedOpr);
1121 xf86SetOperatingState(resVgaMem, pNv->pEnt->index, ResDisableOpr);
1123 /* Set pScrn->monitor */
1124 pScrn->monitor = pScrn->confScreen->monitor;
1126 volatile uint32_t *regs = NULL;
1127 #ifdef XSERVER_LIBPCIACCESS
1128 pci_device_map_range(pNv->PciInfo, PCI_DEV_MEM_BASE(pNv->PciInfo, 0),
1129 0x90000, 0, (void *)®s);
1130 pNv->Chipset = NVGetPCIID(regs) & 0xffff;
1131 pNv->NVArch = NVGetArchitecture(regs);
1132 pci_device_unmap_range(pNv->PciInfo, (void *) regs, 0x90000);
1135 PCI_DEV_READ_LONG(pNv->PciInfo, PCI_CMD_STAT_REG, &pcicmd);
1136 /* Enable reading memory? */
1137 PCI_DEV_WRITE_LONG(pNv->PciInfo, PCI_CMD_STAT_REG, pcicmd | PCI_CMD_MEM_ENABLE);
1138 regs = xf86MapPciMem(-1, VIDMEM_MMIO, pNv->PciTag, PCI_DEV_MEM_BASE(pNv->PciInfo, 0), 0x90000);
1139 pNv->Chipset = NVGetPCIID(regs) & 0xffff;
1140 pNv->NVArch = NVGetArchitecture(regs);
1141 xf86UnMapVidMem(-1, (pointer)regs, 0x90000);
1142 /* Reset previous state */
1143 PCI_DEV_WRITE_LONG(pNv->PciInfo, PCI_CMD_STAT_REG, pcicmd);
1144 #endif /* XSERVER_LIBPCIACCESS */
1146 pScrn->chipset = malloc(sizeof(char) * 25);
1147 sprintf(pScrn->chipset, "NVIDIA NV%02X", pNv->NVArch);
1149 if(!pScrn->chipset) {
1150 pScrn->chipset = "Unknown NVIDIA";
1154 * This shouldn't happen because such problems should be caught in
1155 * NVProbe(), but check it just in case.
1157 if (pScrn->chipset == NULL)
1158 NVPreInitFail("ChipID 0x%04X is not recognised\n", pNv->Chipset);
1160 if (pNv->NVArch < 0x04)
1161 NVPreInitFail("Chipset \"%s\" is not recognised\n", pScrn->chipset);
1163 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Chipset: \"%s\"\n", pScrn->chipset);
1165 /* The highest architecture currently supported is NV5x */
1166 if (pNv->NVArch >= 0x50) {
1167 pNv->Architecture = NV_ARCH_50;
1168 } else if (pNv->NVArch >= 0x40) {
1169 pNv->Architecture = NV_ARCH_40;
1170 } else if (pNv->NVArch >= 0x30) {
1171 pNv->Architecture = NV_ARCH_30;
1172 } else if (pNv->NVArch >= 0x20) {
1173 pNv->Architecture = NV_ARCH_20;
1174 } else if (pNv->NVArch >= 0x10) {
1175 pNv->Architecture = NV_ARCH_10;
1176 } else if (pNv->NVArch >= 0x04) {
1177 pNv->Architecture = NV_ARCH_04;
1178 /* The lowest architecture currently supported is NV04 */
1184 * The first thing we should figure out is the depth, bpp, etc.
1187 if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) {
1188 NVPreInitFail("\n");
1190 /* Check that the returned depth is one we support */
1191 switch (pScrn->depth) {
1199 NVPreInitFail("Given depth (%d) is not supported by this driver\n",
1203 xf86PrintDepthBpp(pScrn);
1205 /* Get the depth24 pixmap format */
1206 if (pScrn->depth == 24 && pix24bpp == 0)
1207 pix24bpp = xf86GetBppFromDepth(pScrn, 24);
1210 * This must happen after pScrn->display has been set because
1211 * xf86SetWeight references it.
1213 if (pScrn->depth > 8) {
1214 /* The defaults are OK for us */
1215 rgb zeros = {0, 0, 0};
1217 if (!xf86SetWeight(pScrn, zeros, zeros)) {
1218 NVPreInitFail("\n");
1222 if (!xf86SetDefaultVisual(pScrn, -1)) {
1223 NVPreInitFail("\n");
1225 /* We don't currently support DirectColor at > 8bpp */
1226 if (pScrn->depth > 8 && (pScrn->defaultVisual != TrueColor)) {
1227 NVPreInitFail("Given default visual"
1228 " (%s) is not supported at depth %d\n",
1229 xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
1233 /* The vgahw module should be loaded here when needed */
1234 if (!xf86LoadSubModule(pScrn, "vgahw")) {
1235 NVPreInitFail("\n");
1238 xf86LoaderReqSymLists(vgahwSymbols, NULL);
1241 * Allocate a vgaHWRec
1243 if (!vgaHWGetHWRec(pScrn)) {
1244 NVPreInitFail("\n");
1247 /* We use a programmable clock */
1248 pScrn->progClock = TRUE;
1250 /* Collect all of the relevant option flags (fill in pScrn->options) */
1251 xf86CollectOptions(pScrn, NULL);
1253 /* Process the options */
1254 if (!(pNv->Options = xalloc(sizeof(NVOptions))))
1256 memcpy(pNv->Options, NVOptions, sizeof(NVOptions));
1257 xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pNv->Options);
1259 /* Set the bits per RGB for 8bpp mode */
1260 if (pScrn->depth == 8)
1265 pNv->new_restore = FALSE;
1267 if (pNv->Architecture == NV_ARCH_50) {
1268 pNv->randr12_enable = TRUE;
1270 pNv->randr12_enable = FALSE;
1271 if (xf86ReturnOptValBool(pNv->Options, OPTION_RANDR12, FALSE)) {
1272 pNv->randr12_enable = TRUE;
1275 xf86DrvMsg(pScrn->scrnIndex, from, "Randr1.2 support %sabled\n", pNv->randr12_enable ? "en" : "dis");
1277 if (pNv->randr12_enable) {
1278 if (xf86ReturnOptValBool(pNv->Options, OPTION_NEW_RESTORE, FALSE)) {
1279 pNv->new_restore = TRUE;
1281 xf86DrvMsg(pScrn->scrnIndex, from, "New (experimental) restore support %sabled\n", pNv->new_restore ? "en" : "dis");
1284 pNv->HWCursor = TRUE;
1286 * The preferred method is to use the "hw cursor" option as a tri-state
1287 * option, with the default set above.
1289 if (xf86GetOptValBool(pNv->Options, OPTION_HW_CURSOR, &pNv->HWCursor)) {
1292 /* For compatibility, accept this too (as an override) */
1293 if (xf86ReturnOptValBool(pNv->Options, OPTION_SW_CURSOR, FALSE)) {
1295 pNv->HWCursor = FALSE;
1297 xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
1298 pNv->HWCursor ? "HW" : "SW");
1300 pNv->FpScale = TRUE;
1302 if (xf86GetOptValBool(pNv->Options, OPTION_FP_SCALE, &pNv->FpScale)) {
1303 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Flat panel scaling %s\n",
1304 pNv->FpScale ? "on" : "off");
1306 if (xf86ReturnOptValBool(pNv->Options, OPTION_NOACCEL, FALSE)) {
1307 pNv->NoAccel = TRUE;
1308 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
1310 if (xf86ReturnOptValBool(pNv->Options, OPTION_SHADOW_FB, FALSE)) {
1311 pNv->ShadowFB = TRUE;
1312 pNv->NoAccel = TRUE;
1313 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1314 "Using \"Shadow Framebuffer\" - acceleration disabled\n");
1318 pNv->RandRRotation = FALSE;
1320 * Rotation with a randr-1.2 driver happens at a different level, so ignore these options.
1322 if ((s = xf86GetOptValString(pNv->Options, OPTION_ROTATE)) && !pNv->randr12_enable) {
1323 if(!xf86NameCmp(s, "CW")) {
1324 pNv->ShadowFB = TRUE;
1325 pNv->NoAccel = TRUE;
1326 pNv->HWCursor = FALSE;
1328 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1329 "Rotating screen clockwise - acceleration disabled\n");
1330 } else if(!xf86NameCmp(s, "CCW")) {
1331 pNv->ShadowFB = TRUE;
1332 pNv->NoAccel = TRUE;
1333 pNv->HWCursor = FALSE;
1335 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1336 "Rotating screen counter clockwise - acceleration disabled\n");
1337 } else if(!xf86NameCmp(s, "RandR")) {
1338 pNv->ShadowFB = TRUE;
1339 pNv->NoAccel = TRUE;
1340 pNv->HWCursor = FALSE;
1341 pNv->RandRRotation = TRUE;
1342 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1343 "Using RandR rotation - acceleration disabled\n");
1345 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
1346 "\"%s\" is not a valid value for Option \"Rotate\"\n", s);
1347 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1348 "Valid options are \"CW\", \"CCW\", and \"RandR\"\n");
1352 if(xf86GetOptValInteger(pNv->Options, OPTION_VIDEO_KEY, &(pNv->videoKey))) {
1353 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to 0x%x\n",
1356 pNv->videoKey = (1 << pScrn->offset.red) |
1357 (1 << pScrn->offset.green) |
1358 (((pScrn->mask.blue >> pScrn->offset.blue) - 1) << pScrn->offset.blue);
1361 /* Things happen on a per output basis for a randr-1.2 driver. */
1362 if (xf86GetOptValBool(pNv->Options, OPTION_FLAT_PANEL, &(pNv->FlatPanel)) && !pNv->randr12_enable) {
1363 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "forcing %s usage\n",
1364 pNv->FlatPanel ? "DFP" : "CRTC");
1366 pNv->FlatPanel = -1; /* autodetect later */
1369 pNv->FPDither = FALSE;
1370 if (xf86GetOptValBool(pNv->Options, OPTION_FP_DITHER, &(pNv->FPDither)))
1371 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "enabling flat panel dither\n");
1373 if (xf86GetOptValInteger(pNv->Options, OPTION_FP_TWEAK,
1374 &pNv->PanelTweak)) {
1375 pNv->usePanelTweak = TRUE;
1377 pNv->usePanelTweak = FALSE;
1380 if (pNv->pEnt->device->MemBase != 0) {
1381 /* Require that the config file value matches one of the PCI values. */
1382 if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->MemBase)) {
1384 "MemBase 0x%08lX doesn't match any PCI base register.\n",
1385 pNv->pEnt->device->MemBase);
1387 pNv->VRAMPhysical = pNv->pEnt->device->MemBase;
1390 if (PCI_DEV_MEM_BASE(pNv->PciInfo, 1) != 0) {
1391 pNv->VRAMPhysical = PCI_DEV_MEM_BASE(pNv->PciInfo, 1) & 0xff800000;
1394 NVPreInitFail("No valid FB address in PCI config space\n");
1398 xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
1399 (unsigned long)pNv->VRAMPhysical);
1401 if (pNv->pEnt->device->IOBase != 0) {
1402 /* Require that the config file value matches one of the PCI values. */
1403 if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->IOBase)) {
1404 NVPreInitFail("IOBase 0x%08lX doesn't match any PCI base register.\n",
1405 pNv->pEnt->device->IOBase);
1407 pNv->IOAddress = pNv->pEnt->device->IOBase;
1410 if (PCI_DEV_MEM_BASE(pNv->PciInfo, 0) != 0) {
1411 pNv->IOAddress = PCI_DEV_MEM_BASE(pNv->PciInfo, 0) & 0xffffc000;
1414 NVPreInitFail("No valid MMIO address in PCI config space\n");
1417 xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n",
1418 (unsigned long)pNv->IOAddress);
1420 if (xf86RegisterResources(pNv->pEnt->index, NULL, ResExclusive)) {
1421 NVPreInitFail("xf86RegisterResources() found resource conflicts\n");
1424 pNv->alphaCursor = (pNv->NVArch >= 0x11);
1426 if(pNv->Architecture < NV_ARCH_10) {
1427 max_width = (pScrn->bitsPerPixel > 16) ? 2032 : 2048;
1430 max_width = (pScrn->bitsPerPixel > 16) ? 4080 : 4096;
1434 if (pNv->randr12_enable) {
1435 /* Allocate an xf86CrtcConfig */
1436 xf86CrtcConfigInit(pScrn, &nv_xf86crtc_config_funcs);
1437 xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
1439 xf86CrtcSetSizeRange(pScrn, 320, 200, max_width, max_height);
1441 /* Set this in case no output ever does. */
1442 if (pNv->Architecture >= NV_ARCH_30) {
1443 pNv->restricted_mode = FALSE;
1444 } else { /* real flexibility starts at the NV3x cards */
1445 pNv->restricted_mode = TRUE;
1449 if (NVPreInitDRI(pScrn) == FALSE) {
1450 NVPreInitFail("\n");
1453 if (!pNv->randr12_enable) {
1454 if ((pScrn->monitor->nHsync == 0) &&
1455 (pScrn->monitor->nVrefresh == 0)) {
1457 config_mon_rates = FALSE;
1459 config_mon_rates = TRUE;
1463 NVCommonSetup(pScrn);
1465 if (pNv->randr12_enable) {
1466 if (pNv->Architecture < NV_ARCH_50) {
1469 num_crtc = pNv->twoHeads ? 2 : 1;
1470 for (i = 0; i < num_crtc; i++) {
1471 nv_crtc_init(pScrn, i);
1474 NvSetupOutputs(pScrn);
1476 if (!NV50DispPreInit(pScrn))
1477 NVPreInitFail("\n");
1478 if (!NV50CreateOutputs(pScrn))
1479 NVPreInitFail("\n");
1480 NV50DispCreateCrtcs(pScrn);
1483 if (!xf86InitialConfiguration(pScrn, FALSE))
1484 NVPreInitFail("No valid modes.\n");
1487 pScrn->videoRam = pNv->RamAmountKBytes;
1488 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kBytes\n",
1491 pNv->VRAMPhysicalSize = pScrn->videoRam * 1024;
1494 * If the driver can do gamma correction, it should call xf86SetGamma()
1499 Gamma zeros = {0.0, 0.0, 0.0};
1501 if (!xf86SetGamma(pScrn, zeros)) {
1502 NVPreInitFail("\n");
1507 * Setup the ClockRanges, which describe what clock ranges are available,
1508 * and what sort of modes they can be used for.
1511 clockRanges = xnfcalloc(sizeof(ClockRange), 1);
1512 clockRanges->next = NULL;
1513 clockRanges->minClock = pNv->MinVClockFreqKHz;
1514 clockRanges->maxClock = pNv->MaxVClockFreqKHz;
1515 clockRanges->clockIndex = -1; /* programmable */
1516 clockRanges->doubleScanAllowed = TRUE;
1517 if ((pNv->Architecture == NV_ARCH_20) ||
1518 ((pNv->Architecture == NV_ARCH_10) &&
1519 ((pNv->Chipset & 0x0ff0) != CHIPSET_NV10) &&
1520 ((pNv->Chipset & 0x0ff0) != CHIPSET_NV15))) {
1522 clockRanges->interlaceAllowed = FALSE;
1524 clockRanges->interlaceAllowed = TRUE;
1527 if(pNv->FlatPanel == 1) {
1528 clockRanges->interlaceAllowed = FALSE;
1529 clockRanges->doubleScanAllowed = FALSE;
1533 /* If DFP, add a modeline corresponding to its panel size */
1534 if (pNv->FlatPanel && !pNv->Television && pNv->fpWidth && pNv->fpHeight) {
1535 DisplayModePtr Mode;
1537 Mode = xnfcalloc(1, sizeof(DisplayModeRec));
1538 Mode = xf86CVTMode(pNv->fpWidth, pNv->fpHeight, 60.00, TRUE, FALSE);
1539 Mode->type = M_T_DRIVER;
1540 pScrn->monitor->Modes = xf86ModesAdd(pScrn->monitor->Modes, Mode);
1542 if (!config_mon_rates) {
1544 Mode->HSync = ((float) Mode->Clock ) / ((float) Mode->HTotal);
1545 if (!Mode->VRefresh)
1546 Mode->VRefresh = (1000.0 * ((float) Mode->Clock)) /
1547 ((float) (Mode->HTotal * Mode->VTotal));
1549 if (Mode->HSync < pScrn->monitor->hsync[0].lo)
1550 pScrn->monitor->hsync[0].lo = Mode->HSync;
1551 if (Mode->HSync > pScrn->monitor->hsync[0].hi)
1552 pScrn->monitor->hsync[0].hi = Mode->HSync;
1553 if (Mode->VRefresh < pScrn->monitor->vrefresh[0].lo)
1554 pScrn->monitor->vrefresh[0].lo = Mode->VRefresh;
1555 if (Mode->VRefresh > pScrn->monitor->vrefresh[0].hi)
1556 pScrn->monitor->vrefresh[0].hi = Mode->VRefresh;
1558 pScrn->monitor->nHsync = 1;
1559 pScrn->monitor->nVrefresh = 1;
1564 if (pNv->randr12_enable) {
1565 pScrn->displayWidth = NVGetVideoPitch(pScrn, pScrn->depth);
1568 * xf86ValidateModes will check that the mode HTotal and VTotal values
1569 * don't exceed the chipset's limit if pScrn->maxHValue and
1570 * pScrn->maxVValue are set. Since our NVValidMode() already takes
1571 * care of this, we don't worry about setting them here.
1573 i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
1574 pScrn->display->modes, clockRanges,
1575 NULL, 256, max_width,
1576 512, 128, max_height,
1577 pScrn->display->virtualX,
1578 pScrn->display->virtualY,
1579 pNv->VRAMPhysicalSize / 2,
1580 LOOKUP_BEST_REFRESH);
1583 NVPreInitFail("\n");
1586 /* Prune the modes marked as invalid */
1587 xf86PruneDriverModes(pScrn);
1590 * Set the CRTC parameters for all of the modes based on the type
1591 * of mode, and the chipset's interlace requirements.
1593 * Calling this is required if the mode->Crtc* values are used by the
1594 * driver and if the driver doesn't provide code to set them. They
1595 * are not pre-initialised at all.
1597 xf86SetCrtcForModes(pScrn, 0);
1600 if (pScrn->modes == NULL) {
1601 NVPreInitFail("No valid modes found\n");
1604 /* Set the current mode to the first in the list */
1605 pScrn->currentMode = pScrn->modes;
1607 /* Print the list of modes being used */
1608 xf86PrintModes(pScrn);
1610 /* Set display resolution */
1611 xf86SetDpi(pScrn, 0, 0);
1615 * XXX This should be taken into account in some way in the mode valdation
1619 if (xf86LoadSubModule(pScrn, "fb") == NULL) {
1620 NVPreInitFail("\n");
1623 xf86LoaderReqSymLists(fbSymbols, NULL);
1625 /* Load EXA if needed */
1626 if (!pNv->NoAccel) {
1627 if (!xf86LoadSubModule(pScrn, "exa")) {
1628 NVPreInitFail("\n");
1630 xf86LoaderReqSymLists(exaSymbols, NULL);
1633 /* Load ramdac if needed */
1634 if (pNv->HWCursor) {
1635 if (!xf86LoadSubModule(pScrn, "ramdac")) {
1636 NVPreInitFail("\n");
1638 xf86LoaderReqSymLists(ramdacSymbols, NULL);
1641 /* Load shadowfb if needed */
1642 if (pNv->ShadowFB) {
1643 if (!xf86LoadSubModule(pScrn, "shadowfb")) {
1644 NVPreInitFail("\n");
1646 xf86LoaderReqSymLists(shadowSymbols, NULL);
1649 pNv->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
1650 pNv->CurrentLayout.depth = pScrn->depth;
1651 pNv->CurrentLayout.displayWidth = pScrn->displayWidth;
1652 pNv->CurrentLayout.weight.red = pScrn->weight.red;
1653 pNv->CurrentLayout.weight.green = pScrn->weight.green;
1654 pNv->CurrentLayout.weight.blue = pScrn->weight.blue;
1655 pNv->CurrentLayout.mode = pScrn->currentMode;
1657 xf86FreeInt10(pNv->pInt10);
1665 * Map the framebuffer and MMIO memory.
1669 NVMapMem(ScrnInfoPtr pScrn)
1671 NVPtr pNv = NVPTR(pScrn);
1672 int gart_scratch_size;
1675 nouveau_device_get_param(pNv->dev, NOUVEAU_GETPARAM_FB_SIZE, &res);
1677 nouveau_device_get_param(pNv->dev, NOUVEAU_GETPARAM_FB_PHYSICAL, &res);
1678 pNv->VRAMPhysical=res;
1679 nouveau_device_get_param(pNv->dev, NOUVEAU_GETPARAM_AGP_SIZE, &res);
1682 #if !NOUVEAU_EXA_PIXMAPS
1683 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN,
1684 0, pNv->VRAMPhysicalSize / 2, &pNv->FB)) {
1685 ErrorF("Failed to allocate memory for framebuffer!\n");
1688 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1689 "Allocated %dMiB VRAM for framebuffer + offscreen pixmaps\n",
1690 (unsigned int)(pNv->FB->size >> 20));
1694 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1695 "AGPGART: %dMiB available\n",
1696 (unsigned int)(pNv->AGPSize >> 20));
1697 if (pNv->AGPSize > (16*1024*1024))
1698 gart_scratch_size = 16*1024*1024;
1700 gart_scratch_size = pNv->AGPSize;
1702 gart_scratch_size = (4 << 20) - (1 << 18) ;
1703 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1704 "GART: PCI DMA - using %dKiB\n",
1705 gart_scratch_size >> 10);
1709 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_GART | NOUVEAU_BO_PIN, 0,
1710 gart_scratch_size, &pNv->GART)) {
1711 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1712 "Unable to allocate GART memory\n");
1716 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1717 "GART: Allocated %dMiB as a scratch buffer\n",
1718 (unsigned int)(pNv->GART->size >> 20));
1721 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN, 0,
1722 64 * 1024, &pNv->Cursor)) {
1723 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1724 "Failed to allocate memory for hardware cursor\n");
1728 if (pNv->randr12_enable) {
1729 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN, 0,
1730 64 * 1024, &pNv->Cursor2)) {
1731 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1732 "Failed to allocate memory for hardware cursor\n");
1737 if (pNv->Architecture >= NV_ARCH_50) {
1738 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN,
1739 0, 0x1000, &pNv->CLUT)) {
1740 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1741 "Failed to allocate memory for CLUT\n");
1746 if ((pNv->FB && nouveau_bo_map(pNv->FB, NOUVEAU_BO_RDWR)) ||
1747 (pNv->GART && nouveau_bo_map(pNv->GART, NOUVEAU_BO_RDWR)) ||
1748 (pNv->CLUT && nouveau_bo_map(pNv->CLUT, NOUVEAU_BO_RDWR)) ||
1749 nouveau_bo_map(pNv->Cursor, NOUVEAU_BO_RDWR) ||
1750 (pNv->randr12_enable && nouveau_bo_map(pNv->Cursor2, NOUVEAU_BO_RDWR))) {
1751 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1752 "Failed to map pinned buffers\n");
1760 * Unmap the framebuffer and MMIO memory.
1764 NVUnmapMem(ScrnInfoPtr pScrn)
1766 NVPtr pNv = NVPTR(pScrn);
1768 nouveau_bo_del(&pNv->FB);
1769 nouveau_bo_del(&pNv->GART);
1770 nouveau_bo_del(&pNv->Cursor);
1771 if (pNv->randr12_enable) {
1772 nouveau_bo_del(&pNv->Cursor2);
1774 nouveau_bo_del(&pNv->CLUT);
1781 * Initialise a new mode.
1785 NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
1787 vgaHWPtr hwp = VGAHWPTR(pScrn);
1789 NVPtr pNv = NVPTR(pScrn);
1792 /* Initialise the ModeReg values */
1793 if (!vgaHWInit(pScrn, mode))
1795 pScrn->vtSema = TRUE;
1797 vgaReg = &hwp->ModeReg;
1798 nvReg = &pNv->ModeReg;
1800 if(!NVDACInit(pScrn, mode))
1803 NVLockUnlock(pNv, 0);
1805 nvWriteVGA(pNv, NV_VGA_CRTCX_OWNER, nvReg->crtcOwner);
1806 NVLockUnlock(pNv, 0);
1809 /* Program the registers */
1810 vgaHWProtect(pScrn, TRUE);
1812 NVDACRestore(pScrn, vgaReg, nvReg, FALSE);
1814 #if X_BYTE_ORDER == X_BIG_ENDIAN
1815 /* turn on LFB swapping */
1819 tmp = nvReadVGA(pNv, NV_VGA_CRTCX_SWAPPING);
1821 nvWriteVGA(pNv, NV_VGA_CRTCX_SWAPPING, tmp);
1826 NVResetGraphics(pScrn);
1828 vgaHWProtect(pScrn, FALSE);
1830 pNv->CurrentLayout.mode = mode;
1835 #define NV_MODE_PRIVATE_ID 0x4F37ED65
1836 #define NV_MODE_PRIVATE_SIZE 2
1839 * Match a private mode flag in a special function.
1840 * I don't want ugly casting all over the code.
1843 NVMatchModePrivate(DisplayModePtr mode, uint32_t flags)
1849 if (mode->PrivSize != NV_MODE_PRIVATE_SIZE)
1851 if (mode->Private[0] != NV_MODE_PRIVATE_ID)
1854 if (mode->Private[1] & flags)
1861 NVRestoreConsole(xf86OutputPtr output, DisplayModePtr mode)
1866 xf86CrtcPtr crtc = output->crtc;
1867 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
1869 ScrnInfoPtr pScrn = crtc->scrn;
1870 NVPtr pNv = NVPTR(pScrn);
1871 RIVA_HW_STATE *state = &pNv->ModeReg;
1872 NVCrtcRegPtr regp = &state->crtc_reg[nv_crtc->head];
1878 xf86SetModeCrtc(mode, INTERLACE_HALVE_V);
1879 DisplayModePtr adjusted_mode = xf86DuplicateMode(mode);
1881 /* Sequence mimics a normal modeset. */
1882 output->funcs->dpms(output, DPMSModeOff);
1883 crtc->funcs->dpms(crtc, DPMSModeOff);
1884 need_unlock = crtc->funcs->lock(crtc);
1885 output->funcs->mode_fixup(output, mode, adjusted_mode);
1886 crtc->funcs->mode_fixup(crtc, mode, adjusted_mode);
1887 output->funcs->prepare(output);
1888 crtc->funcs->prepare(crtc);
1889 /* Always use offset (0,0). */
1890 crtc->funcs->mode_set(crtc, mode, adjusted_mode, 0, 0);
1891 output->funcs->mode_set(output, mode, adjusted_mode);
1892 crtc->funcs->commit(crtc);
1893 output->funcs->commit(output);
1895 crtc->funcs->unlock(crtc);
1896 /* Always turn on outputs afterwards. */
1897 output->funcs->dpms(output, DPMSModeOn);
1898 crtc->funcs->dpms(crtc, DPMSModeOn);
1900 if (pNv->NVArch >= 0x17 && pNv->twoHeads)
1901 for (i = 0; i < 0x10; i++)
1902 NVWriteVGACR5758(pNv, nv_crtc->head, i, regp->CR58[i]);
1905 xfree(adjusted_mode);
1908 #define MODEPREFIX(name) NULL, NULL, name, 0,M_T_DRIVER
1909 #define MODESUFFIX 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0
1911 /* hblankstart: 648, hblankend: 792, vblankstart: 407, vblankend: 442 for 640x400 */
1912 static DisplayModeRec VGAModes[2] = {
1913 { MODEPREFIX("640x400"), 28320, /*25175,*/ 640, 680, 776, 800, 0, 400, 412, 414, 449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 640x400 */
1914 { MODEPREFIX("720x400"), 28320, 720, 738, 846, 900, 0, 400, 412, 414, 449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 720x400@70Hz */
1918 * Restore the initial (text) mode.
1921 NVRestore(ScrnInfoPtr pScrn)
1923 vgaHWPtr hwp = VGAHWPTR(pScrn);
1924 vgaRegPtr vgaReg = &hwp->SavedReg;
1925 NVPtr pNv = NVPTR(pScrn);
1926 NVRegPtr nvReg = &pNv->SavedReg;
1928 if (pNv->randr12_enable) {
1929 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
1930 RIVA_HW_STATE *state = &pNv->ModeReg;
1933 /* Let's wipe some state regs */
1942 state->crosswired = FALSE;
1943 state->db1_ratio[0] = FALSE;
1944 state->db1_ratio[1] = FALSE;
1946 if (pNv->new_restore) { /* new style restore. */
1947 for (i = 0; i < xf86_config->num_crtc; i++) {
1948 NVCrtcLockUnlock(xf86_config->crtc[i], 0);
1951 /* Reset some values according to stored console value, to avoid confusion later on. */
1952 /* Otherwise we end up with corrupted terminals. */
1953 for (i = 0; i < xf86_config->num_crtc; i++) {
1954 NVCrtcPrivatePtr nv_crtc = xf86_config->crtc[i]->driver_private;
1955 uint8_t pixelDepth = pNv->console_mode[nv_crtc->head].depth/8;
1956 /* restore PIXEL value */
1957 uint32_t pixel = NVReadVgaCrtc(xf86_config->crtc[i], NV_VGA_CRTCX_PIXEL) & ~(0xF);
1958 pixel |= (pixelDepth > 2) ? 3 : pixelDepth;
1959 NVWriteVgaCrtc(xf86_config->crtc[i], NV_VGA_CRTCX_PIXEL, pixel);
1960 /* restore HDisplay and VDisplay */
1961 NVWriteVGA(pNv, nv_crtc->head, NV_VGA_CRTCX_HDISPE, (pNv->console_mode[nv_crtc->head].x_res)/8 - 1);
1962 NVWriteVGA(pNv, nv_crtc->head, NV_VGA_CRTCX_VDISPE, (pNv->console_mode[nv_crtc->head].y_res) - 1);
1964 NVWriteVGA(pNv, nv_crtc->head, NV_VGA_CRTCX_52, pNv->misc_info.crtc_reg_52[nv_crtc->head]);
1965 /* restore crtc base */
1966 nvWriteCRTC(pNv, nv_crtc->head, NV_CRTC_START, pNv->console_mode[nv_crtc->head].fb_start);
1967 /* Restore general control */
1968 nvWriteRAMDAC(pNv, nv_crtc->head, NV_RAMDAC_GENERAL_CONTROL, pNv->misc_info.ramdac_general_control[nv_crtc->head]);
1971 /* Restore outputs when enabled. */
1972 for (i = 0; i < xf86_config->num_output; i++) {
1973 xf86OutputPtr output = xf86_config->output[i];
1974 if (!xf86_config->output[i]->crtc) /* not enabled? */
1977 NVOutputPrivatePtr nv_output = output->driver_private;
1979 DisplayModePtr mode = NULL;
1980 DisplayModePtr good_mode = NULL;
1981 NVConsoleMode *console = &pNv->console_mode[i];
1982 DisplayModePtr modes = output->probed_modes;
1983 if (!modes) /* no modes means no restore */
1986 if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS)
1989 if (console->vga_mode) {
1990 /* We support 640x400 and 720x400 vga modes. */
1991 if (console->x_res == 720)
1992 good_mode = &VGAModes[1];
1994 good_mode = &VGAModes[0];
1995 if (!good_mode) /* No suitable mode found. */
1998 NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
1999 uint32_t old_clock = nv_get_clock_from_crtc(pScrn, nv_crtc->head);
2000 uint32_t clock_diff = 0xFFFFFFFF;
2001 for (mode = modes; mode != NULL; mode = mode->next) {
2002 /* We only have the first 8 bits of y_res - 1. */
2003 /* And it's sometimes bogus. */
2004 if (is_fp || !console->enabled) { /* digital outputs are run at their native clock */
2005 if (mode->HDisplay == console->x_res) {
2006 if (!good_mode) /* Pick any match, in case we don't find a 60.0 Hz mode. */
2008 /* Pick a 60.0 Hz mode if there is one. */
2009 if (mode->VRefresh > 59.95 && mode->VRefresh < 60.05) {
2015 if (mode->HDisplay == console->x_res) {
2016 int temp_diff = mode->Clock - old_clock;
2019 if (temp_diff < clock_diff) { /* converge on the closest mode */
2020 clock_diff = temp_diff;
2026 if (!good_mode) /* No suitable mode found. */
2030 mode = xf86DuplicateMode(good_mode);
2032 INT32 *nv_mode = xnfcalloc(sizeof(INT32)*NV_MODE_PRIVATE_SIZE, 1);
2034 /* A semi-unique identifier to avoid using other privates. */
2035 nv_mode[0] = NV_MODE_PRIVATE_ID;
2037 if (console->vga_mode)
2038 nv_mode[1] |= NV_MODE_VGA;
2040 nv_mode[1] |= NV_MODE_CONSOLE;
2042 mode->Private = nv_mode;
2043 mode->PrivSize = NV_MODE_PRIVATE_SIZE;
2045 uint8_t scale_backup = nv_output->scaling_mode;
2046 if (nv_output->type == OUTPUT_LVDS || nv_output->type == OUTPUT_TMDS)
2047 nv_output->scaling_mode = SCALE_FULLSCREEN;
2049 NVRestoreConsole(output, mode);
2051 /* Restore value, so we reenter X properly. */
2052 nv_output->scaling_mode = scale_backup;
2054 xfree(mode->Private);
2058 NVWriteVGA(pNv, 0, NV_VGA_CRTCX_OWNER, pNv->vtOWNER);
2060 /* Lock the crtc's. */
2061 for (i = 0; i < xf86_config->num_crtc; i++) {
2062 NVCrtcLockUnlock(xf86_config->crtc[i], 1);
2065 /* Let's clean our slate once again, so we always rewrite vpll's upon returning to X. */
2074 state->crosswired = FALSE;
2075 state->db1_ratio[0] = FALSE;
2076 state->db1_ratio[1] = FALSE;
2078 for (i = 0; i < xf86_config->num_crtc; i++) {
2079 NVCrtcLockUnlock(xf86_config->crtc[i], 0);
2082 /* Some aspects of an output needs to be restore before the crtc. */
2083 /* In my case this has to do with the mode that i get at very low resolutions. */
2084 /* If i do this at the end, it will not be restored properly */
2085 for (i = 0; i < xf86_config->num_output; i++) {
2086 NVOutputPrivatePtr nv_output2 = xf86_config->output[i]->driver_private;
2087 NVOutputRegPtr regp = &nvReg->dac_reg[nv_output2->preferred_output];
2088 Bool crosswired = regp->TMDS[0x4] & (1 << 3);
2089 /* Let's guess the bios state ;-) */
2090 if (nv_output2->type == OUTPUT_TMDS)
2091 ErrorF("Restoring TMDS timings, before restoring anything else\n");
2092 if (nv_output2->type == OUTPUT_LVDS)
2093 ErrorF("Restoring LVDS timings, before restoring anything else\n");
2094 if (nv_output2->type == OUTPUT_TMDS || nv_output2->type == OUTPUT_LVDS) {
2095 uint32_t clock = nv_calc_tmds_clock_from_pll(xf86_config->output[i]);
2096 nv_set_tmds_registers(xf86_config->output[i], clock, TRUE, crosswired);
2100 /* This needs to happen before the crtc restore happens. */
2101 for (i = 0; i < xf86_config->num_output; i++) {
2102 NVOutputPrivatePtr nv_output = xf86_config->output[i]->driver_private;
2103 /* Select the default output resource for consistent restore. */
2104 if (ffs(pNv->dcb_table.entry[nv_output->dcb_entry].or) & OUTPUT_1) {
2105 nv_output->output_resource = 1;
2107 nv_output->output_resource = 0;
2111 for (i = 0; i < xf86_config->num_crtc; i++) {
2112 NVCrtcPrivatePtr nv_crtc = xf86_config->crtc[i]->driver_private;
2113 /* Restore this, so it doesn't mess with restore. */
2114 pNv->fp_regs_owner[nv_crtc->head] = nv_crtc->head;
2117 for (i = 0; i < xf86_config->num_crtc; i++) {
2118 xf86_config->crtc[i]->funcs->restore(xf86_config->crtc[i]);
2121 for (i = 0; i < xf86_config->num_output; i++) {
2122 xf86_config->output[i]->funcs->restore(xf86_config->
2126 for (i = 0; i < xf86_config->num_crtc; i++) {
2127 NVCrtcLockUnlock(xf86_config->crtc[i], 1);
2131 NVLockUnlock(pNv, 0);
2134 nvWriteVGA(pNv, NV_VGA_CRTCX_OWNER, pNv->crtc_active[1] * 0x3);
2135 NVLockUnlock(pNv, 0);
2138 /* Only restore text mode fonts/text for the primary card */
2139 vgaHWProtect(pScrn, TRUE);
2140 NVDACRestore(pScrn, vgaReg, nvReg, pNv->Primary);
2142 nvWriteVGA(pNv, NV_VGA_CRTCX_OWNER, pNv->vtOWNER);
2144 vgaHWProtect(pScrn, FALSE);
2149 NVLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
2150 LOCO * colors, VisualPtr pVisual)
2152 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
2155 CARD16 lut_r[256], lut_g[256], lut_b[256];
2157 for (c = 0; c < xf86_config->num_crtc; c++) {
2158 xf86CrtcPtr crtc = xf86_config->crtc[c];
2160 if (crtc->enabled == 0)
2163 /* code borrowed from intel driver */
2164 switch (pScrn->depth) {
2166 for (i = 0; i < numColors; i++) {
2168 for (j = 0; j < 8; j++) {
2169 lut_r[index * 8 + j] = colors[index].red << 8;
2170 lut_g[index * 8 + j] = colors[index].green << 8;
2171 lut_b[index * 8 + j] = colors[index].blue << 8;
2175 for (i = 0; i < numColors; i++) {
2179 for (j = 0; j < 8; j++) {
2180 lut_r[index * 8 + j] = colors[index].red << 8;
2181 lut_b[index * 8 + j] = colors[index].blue << 8;
2185 for (j = 0; j < 4; j++) {
2186 lut_g[index * 4 + j] = colors[index].green << 8;
2190 for (i = 0; i < numColors; i++) {
2192 lut_r[index] = colors[index].red << 8;
2193 lut_g[index] = colors[index].green << 8;
2194 lut_b[index] = colors[index].blue << 8;
2199 /* Make the change through RandR */
2200 RRCrtcGammaSet(crtc->randr_crtc, lut_r, lut_g, lut_b);
2204 #define DEPTH_SHIFT(val, w) ((val << (8 - w)) | (val >> ((w << 1) - 8)))
2205 #define COLOR(c) (unsigned int)(0x3fff * ((c)/255.0))
2207 NV50LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
2208 LOCO * colors, VisualPtr pVisual)
2210 NVPtr pNv = NVPTR(pScrn);
2213 unsigned short red, green, blue, unused;
2214 } *lut = (void *) pNv->CLUT->map;
2216 switch (pScrn->depth) {
2218 for (i = 0; i < numColors; i++) {
2220 lut[DEPTH_SHIFT(index, 5)].red =
2221 COLOR(colors[index].red);
2222 lut[DEPTH_SHIFT(index, 5)].green =
2223 COLOR(colors[index].green);
2224 lut[DEPTH_SHIFT(index, 5)].blue =
2225 COLOR(colors[index].blue);
2229 for (i = 0; i < numColors; i++) {
2231 lut[DEPTH_SHIFT(index, 6)].green =
2232 COLOR(colors[index].green);
2234 lut[DEPTH_SHIFT(index, 5)].red =
2235 COLOR(colors[index].red);
2236 lut[DEPTH_SHIFT(index, 5)].blue =
2237 COLOR(colors[index].blue);
2242 for (i = 0; i < numColors; i++) {
2244 lut[index].red = COLOR(colors[index].red);
2245 lut[index].green = COLOR(colors[index].green);
2246 lut[index].blue = COLOR(colors[index].blue);
2253 static void NVBacklightEnable(NVPtr pNv, Bool on)
2255 /* This is done differently on each laptop. Here we
2256 define the ones we know for sure. */
2258 #if defined(__powerpc__)
2259 if((pNv->Chipset == 0x10DE0179) ||
2260 (pNv->Chipset == 0x10DE0189) ||
2261 (pNv->Chipset == 0x10DE0329))
2263 /* NV17,18,34 Apple iMac, iBook, PowerBook */
2264 CARD32 tmp_pmc, tmp_pcrt;
2265 tmp_pmc = nvReadMC(pNv, 0x10F0) & 0x7FFFFFFF;
2266 tmp_pcrt = nvReadCRTC0(pNv, NV_CRTC_081C) & 0xFFFFFFFC;
2268 tmp_pmc |= (1 << 31);
2271 nvWriteMC(pNv, 0x10F0, tmp_pmc);
2272 nvWriteCRTC0(pNv, NV_CRTC_081C, tmp_pcrt);
2277 if(pNv->twoHeads && ((pNv->Chipset & 0x0ff0) != CHIPSET_NV11)) {
2278 nvWriteMC(pNv, 0x130C, on ? 3 : 7);
2283 fpcontrol = nvReadCurRAMDAC(pNv, 0x848) & 0xCfffffCC;
2285 /* cut the TMDS output */
2286 if(on) fpcontrol |= pNv->fpSyncs;
2287 else fpcontrol |= 0x20000022;
2289 nvWriteCurRAMDAC(pNv, 0x0848, fpcontrol);
2294 NVDPMSSetLCD(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
2296 NVPtr pNv = NVPTR(pScrn);
2298 if (!pScrn->vtSema) return;
2300 vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
2302 switch (PowerManagementMode) {
2303 case DPMSModeStandby: /* HSync: Off, VSync: On */
2304 case DPMSModeSuspend: /* HSync: On, VSync: Off */
2305 case DPMSModeOff: /* HSync: Off, VSync: Off */
2306 NVBacklightEnable(pNv, 0);
2308 case DPMSModeOn: /* HSync: On, VSync: On */
2309 NVBacklightEnable(pNv, 1);
2317 NVDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags)
2319 unsigned char crtc1A;
2320 vgaHWPtr hwp = VGAHWPTR(pScrn);
2322 if (!pScrn->vtSema) return;
2324 crtc1A = hwp->readCrtc(hwp, 0x1A) & ~0xC0;
2326 switch (PowerManagementMode) {
2327 case DPMSModeStandby: /* HSync: Off, VSync: On */
2330 case DPMSModeSuspend: /* HSync: On, VSync: Off */
2333 case DPMSModeOff: /* HSync: Off, VSync: Off */
2336 case DPMSModeOn: /* HSync: On, VSync: On */
2341 /* vgaHWDPMSSet will merely cut the dac output */
2342 vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
2344 hwp->writeCrtc(hwp, 0x1A, crtc1A);
2350 /* This gets called at the start of each server generation */
2353 NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
2360 unsigned char *FBStart;
2361 int width, height, displayWidth, shadowHeight, i;
2364 * First get the ScrnInfoRec
2366 pScrn = xf86Screens[pScreen->myNum];
2368 hwp = VGAHWPTR(pScrn);
2371 /* Map the VGA memory when the primary video */
2373 hwp->MapSize = 0x10000;
2374 if (!vgaHWMapMem(pScrn))
2378 /* First init DRI/DRM */
2379 if (!NVDRIScreenInit(pScrn))
2382 /* Allocate and map memory areas we need */
2383 if (!NVMapMem(pScrn))
2386 if (!pNv->NoAccel) {
2387 /* Init DRM - Alloc FIFO */
2388 if (!NVInitDma(pScrn))
2391 /* setup graphics objects */
2392 if (!NVAccelCommonInit(pScrn))
2396 #if NOUVEAU_EXA_PIXMAPS
2397 if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_PIN,
2398 0, NOUVEAU_ALIGN(pScrn->virtualX, 64) * NOUVEAU_ALIGN(pScrn->virtualY, 64) *
2399 (pScrn->bitsPerPixel >> 3), &pNv->FB)) {
2400 ErrorF("Failed to allocate memory for screen pixmap.\n");
2405 if (!pNv->randr12_enable) {
2406 /* Save the current state */
2408 /* Initialise the first mode */
2409 if (!NVModeInit(pScrn, pScrn->currentMode))
2412 /* Darken the screen for aesthetic reasons and set the viewport */
2413 NVSaveScreen(pScreen, SCREEN_SAVER_ON);
2414 pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
2416 pScrn->memPhysBase = pNv->VRAMPhysical;
2417 pScrn->fbOffset = 0;
2419 /* Gather some misc info before the randr stuff kicks in */
2420 if (pNv->Architecture >= NV_ARCH_10) {
2421 pNv->misc_info.crtc_reg_52[0] = NVReadVGA0(pNv, NV_VGA_CRTCX_52);
2422 pNv->misc_info.crtc_reg_52[1] = NVReadVGA1(pNv, NV_VGA_CRTCX_52);
2424 if (pNv->Architecture == NV_ARCH_40) {
2425 pNv->misc_info.ramdac_0_reg_580 = nvReadRAMDAC(pNv, 0, NV_RAMDAC_580);
2426 pNv->misc_info.reg_c040 = nvReadMC(pNv, 0xc040);
2428 pNv->misc_info.ramdac_general_control[0] = nvReadRAMDAC(pNv, 0, NV_RAMDAC_GENERAL_CONTROL);
2429 pNv->misc_info.ramdac_general_control[1] = nvReadRAMDAC(pNv, 1, NV_RAMDAC_GENERAL_CONTROL);
2430 pNv->misc_info.ramdac_0_pllsel = nvReadRAMDAC(pNv, 0, NV_RAMDAC_PLL_SELECT);
2431 pNv->misc_info.sel_clk = nvReadRAMDAC(pNv, 0, NV_RAMDAC_SEL_CLK);
2432 if (pNv->twoHeads) {
2433 pNv->misc_info.output[0] = nvReadRAMDAC(pNv, 0, NV_RAMDAC_OUTPUT);
2434 pNv->misc_info.output[1] = nvReadRAMDAC(pNv, 1, NV_RAMDAC_OUTPUT);
2437 for (i = 0; i <= pNv->twoHeads; i++) {
2438 if (NVReadVGA(pNv, i, NV_VGA_CRTCX_PIXEL) & 0xf) { /* framebuffer mode */
2439 pNv->console_mode[i].vga_mode = FALSE;
2440 uint8_t var = NVReadVGA(pNv, i, NV_VGA_CRTCX_PIXEL) & 0xf;
2441 Bool filled = (nvReadRAMDAC(pNv, i, NV_RAMDAC_GENERAL_CONTROL) & 0x1000);
2445 pNv->console_mode[i].depth = 32;
2447 pNv->console_mode[i].depth = 24;
2448 /* This is pitch related. */
2449 pNv->console_mode[i].bpp = 32;
2453 pNv->console_mode[i].depth = 16;
2455 pNv->console_mode[i].depth = 15;
2456 /* This is pitch related. */
2457 pNv->console_mode[i].bpp = 16;
2460 /* 8bit mode is always filled? */
2461 pNv->console_mode[i].depth = 8;
2462 /* This is pitch related. */
2463 pNv->console_mode[i].bpp = 8;
2467 } else { /* vga mode */
2468 pNv->console_mode[i].vga_mode = TRUE;
2469 pNv->console_mode[i].bpp = 4;
2470 pNv->console_mode[i].depth = 4;
2473 pNv->console_mode[i].x_res = (NVReadVGA(pNv, i, NV_VGA_CRTCX_HDISPE) + 1) * 8;
2474 pNv->console_mode[i].y_res = (NVReadVGA(pNv, i, NV_VGA_CRTCX_VDISPE) + 1); /* NV_VGA_CRTCX_VDISPE only contains the lower 8 bits. */
2476 pNv->console_mode[i].fb_start = nvReadCRTC(pNv, i, NV_CRTC_START);
2478 pNv->console_mode[i].enabled = FALSE;
2480 ErrorF("CRTC %d: Console mode: %dx%d depth: %d bpp: %d\n", i, pNv->console_mode[i].x_res, pNv->console_mode[i].y_res, pNv->console_mode[i].depth, pNv->console_mode[i].bpp);
2483 /* Check if crtc's were enabled. */
2484 if (pNv->misc_info.ramdac_0_pllsel & NV_RAMDAC_PLL_SELECT_PLL_SOURCE_VPLL) {
2485 pNv->console_mode[0].enabled = TRUE;
2486 ErrorF("CRTC 0 was enabled.\n");
2489 if (pNv->misc_info.ramdac_0_pllsel & NV_RAMDAC_PLL_SELECT_PLL_SOURCE_VPLL2) {
2490 pNv->console_mode[1].enabled = TRUE;
2491 ErrorF("CRTC 1 was enabled.\n");
2494 if (!NVEnterVT(scrnIndex, 0))
2496 NVSaveScreen(pScreen, SCREEN_SAVER_ON);
2501 * The next step is to setup the screen's visuals, and initialise the
2502 * framebuffer code. In cases where the framebuffer's default
2503 * choices for things like visual layouts and bits per RGB are OK,
2504 * this may be as simple as calling the framebuffer's ScreenInit()
2505 * function. If not, the visuals will need to be setup before calling
2506 * a fb ScreenInit() function and fixed up after.
2508 * For most PC hardware at depths >= 8, the defaults that fb uses
2509 * are not appropriate. In this driver, we fixup the visuals after.
2513 * Reset the visual list.
2515 miClearVisualTypes();
2517 /* Setup the visuals we support. */
2519 if (!miSetVisualTypes(pScrn->depth,
2520 miGetDefaultVisualMask(pScrn->depth), 8,
2521 pScrn->defaultVisual))
2523 if (!miSetPixmapDepths ())
2527 * Call the framebuffer layer's ScreenInit function, and fill in other
2531 width = pScrn->virtualX;
2532 height = pScrn->virtualY;
2533 displayWidth = pScrn->displayWidth;
2536 height = pScrn->virtualX;
2537 width = pScrn->virtualY;
2540 /* If RandR rotation is enabled, leave enough space in the
2541 * framebuffer for us to rotate the screen dimensions without
2542 * changing the pitch.
2544 if(pNv->RandRRotation) {
2545 shadowHeight = max(width, height);
2547 shadowHeight = height;
2550 if (pNv->ShadowFB) {
2551 pNv->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width);
2552 pNv->ShadowPtr = xalloc(pNv->ShadowPitch * shadowHeight);
2553 displayWidth = pNv->ShadowPitch / (pScrn->bitsPerPixel >> 3);
2554 FBStart = pNv->ShadowPtr;
2556 pNv->ShadowPtr = NULL;
2557 FBStart = pNv->FB->map;
2560 switch (pScrn->bitsPerPixel) {
2564 ret = fbScreenInit(pScreen, FBStart, width, height,
2565 pScrn->xDpi, pScrn->yDpi,
2566 displayWidth, pScrn->bitsPerPixel);
2569 xf86DrvMsg(scrnIndex, X_ERROR,
2570 "Internal error: invalid bpp (%d) in NVScreenInit\n",
2571 pScrn->bitsPerPixel);
2578 if (pScrn->bitsPerPixel > 8) {
2579 /* Fixup RGB ordering */
2580 visual = pScreen->visuals + pScreen->numVisuals;
2581 while (--visual >= pScreen->visuals) {
2582 if ((visual->class | DynamicClass) == DirectColor) {
2583 visual->offsetRed = pScrn->offset.red;
2584 visual->offsetGreen = pScrn->offset.green;
2585 visual->offsetBlue = pScrn->offset.blue;
2586 visual->redMask = pScrn->mask.red;
2587 visual->greenMask = pScrn->mask.green;
2588 visual->blueMask = pScrn->mask.blue;
2593 fbPictureInit (pScreen, 0, 0);
2595 xf86SetBlackWhitePixels(pScreen);
2597 if (!pNv->NoAccel) {
2599 NVResetGraphics(pScrn);
2602 miInitializeBackingStore(pScreen);
2603 xf86SetBackingStore(pScreen);
2604 xf86SetSilkenMouse(pScreen);
2606 /* Finish DRI init */
2607 NVDRIFinishScreenInit(pScrn);
2610 * Initialize software cursor.
2611 * Must precede creation of the default colormap.
2613 miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
2616 * Initialize HW cursor layer.
2617 * Must follow software cursor initialization.
2619 if (pNv->HWCursor) {
2620 if (pNv->Architecture < NV_ARCH_50 && !pNv->randr12_enable)
2621 ret = NVCursorInit(pScreen);
2622 else if (pNv->Architecture < NV_ARCH_50 && pNv->randr12_enable)
2623 ret = NVCursorInitRandr12(pScreen);
2625 ret = NV50CursorInit(pScreen);
2628 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
2629 "Hardware cursor initialization failed\n");
2630 pNv->HWCursor = FALSE;
2634 if (pNv->randr12_enable) {
2635 xf86DPMSInit(pScreen, xf86DPMSSet, 0);
2637 if (!xf86CrtcScreenInit(pScreen))
2640 pNv->PointerMoved = pScrn->PointerMoved;
2641 pScrn->PointerMoved = NVPointerMoved;
2644 /* Initialise default colourmap */
2645 if (!miCreateDefColormap(pScreen))
2649 * Initialize colormap layer.
2650 * Must follow initialization of the default colormap
2652 if (!pNv->randr12_enable) {
2653 if(!xf86HandleColormaps(pScreen, 256, 8, NVDACLoadPalette,
2654 NULL, CMAP_RELOAD_ON_MODE_SWITCH | CMAP_PALETTED_TRUECOLOR))
2657 if (pNv->Architecture < NV_ARCH_50) {
2658 if (!xf86HandleColormaps(pScreen, 256, 8, NVLoadPalette,
2660 CMAP_RELOAD_ON_MODE_SWITCH |
2661 CMAP_PALETTED_TRUECOLOR))
2664 if (!xf86HandleColormaps(pScreen, 256, 8, NV50LoadPalette,
2665 NULL, CMAP_PALETTED_TRUECOLOR))
2671 RefreshAreaFuncPtr refreshArea = NVRefreshArea;
2673 if (pNv->Rotate || pNv->RandRRotation) {
2674 pNv->PointerMoved = pScrn->PointerMoved;
2676 pScrn->PointerMoved = NVPointerMoved;
2678 switch(pScrn->bitsPerPixel) {
2679 case 8: refreshArea = NVRefreshArea8; break;
2680 case 16: refreshArea = NVRefreshArea16; break;
2681 case 32: refreshArea = NVRefreshArea32; break;
2683 if(!pNv->RandRRotation) {
2685 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
2686 "Driver rotation enabled, RandR disabled\n");
2690 ShadowFBInit(pScreen, refreshArea);
2693 if (!pNv->randr12_enable) {
2694 if(pNv->FlatPanel) {
2695 xf86DPMSInit(pScreen, NVDPMSSetLCD, 0);
2697 xf86DPMSInit(pScreen, NVDPMSSet, 0);
2701 pScrn->memPhysBase = pNv->VRAMPhysical;
2702 pScrn->fbOffset = 0;
2704 if (pNv->Rotate == 0 && !pNv->RandRRotation)
2705 NVInitVideo(pScreen);
2707 pScreen->SaveScreen = NVSaveScreen;
2709 /* Wrap the current CloseScreen function */
2710 pNv->CloseScreen = pScreen->CloseScreen;
2711 pScreen->CloseScreen = NVCloseScreen;
2713 pNv->BlockHandler = pScreen->BlockHandler;
2714 pScreen->BlockHandler = NVBlockHandler;
2716 /* Install our DriverFunc. We have to do it this way instead of using the
2717 * HaveDriverFuncs argument to xf86AddDriver, because InitOutput clobbers
2720 if (!pNv->randr12_enable)
2721 pScrn->DriverFunc = NVDriverFunc;
2723 /* Report any unused options (only for the first generation) */
2724 if (serverGeneration == 1) {
2725 xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
2732 NVSaveScreen(ScreenPtr pScreen, int mode)
2734 ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
2735 NVPtr pNv = NVPTR(pScrn);
2737 Bool on = xf86IsUnblank(mode);
2739 if (pNv->randr12_enable) {
2740 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
2741 if (pScrn->vtSema && pNv->Architecture < NV_ARCH_50) {
2742 for (i = 0; i < xf86_config->num_crtc; i++) {
2744 if (xf86_config->crtc[i]->enabled) {
2745 NVCrtcBlankScreen(xf86_config->crtc[i],
2754 return vgaHWSaveScreen(pScreen, mode);
2758 NVSave(ScrnInfoPtr pScrn)
2760 NVPtr pNv = NVPTR(pScrn);
2761 NVRegPtr nvReg = &pNv->SavedReg;
2762 vgaHWPtr pVga = VGAHWPTR(pScrn);
2763 vgaRegPtr vgaReg = &pVga->SavedReg;
2765 if (pNv->randr12_enable) {
2766 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
2767 int vgaflags = VGA_SR_CMAP | VGA_SR_MODE;
2770 for (i = 0; i < xf86_config->num_crtc; i++) {
2771 xf86_config->crtc[i]->funcs->save(xf86_config->crtc[i]);
2774 for (i = 0; i < xf86_config->num_output; i++) {
2775 xf86_config->output[i]->funcs->save(xf86_config->
2781 vgaflags |= VGA_SR_FONTS;
2783 vgaHWSave(pScrn, vgaReg, vgaflags);
2785 NVLockUnlock(pNv, 0);
2787 nvWriteVGA(pNv, NV_VGA_CRTCX_OWNER, pNv->crtc_active[1] * 0x3);
2788 NVLockUnlock(pNv, 0);
2791 NVDACSave(pScrn, vgaReg, nvReg, pNv->Primary);
2796 NVRandRGetInfo(ScrnInfoPtr pScrn, Rotation *rotations)
2798 NVPtr pNv = NVPTR(pScrn);
2800 if(pNv->RandRRotation)
2801 *rotations = RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_270;
2803 *rotations = RR_Rotate_0;
2809 NVRandRSetConfig(ScrnInfoPtr pScrn, xorgRRConfig *config)
2811 NVPtr pNv = NVPTR(pScrn);
2813 switch(config->rotation) {
2816 pScrn->PointerMoved = pNv->PointerMoved;
2821 pScrn->PointerMoved = NVPointerMoved;
2826 pScrn->PointerMoved = NVPointerMoved;
2830 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
2831 "Unexpected rotation in NVRandRSetConfig!\n");
2833 pScrn->PointerMoved = pNv->PointerMoved;
2841 NVDriverFunc(ScrnInfoPtr pScrn, xorgDriverFuncOp op, pointer data)
2845 return NVRandRGetInfo(pScrn, (Rotation*)data);
2847 return NVRandRSetConfig(pScrn, (xorgRRConfig*)data);