git.oblomov.eu Git - nouveau/blob - src/nv_output.c

   1 /*
   2  * Copyright 2006 Dave Airlie
   3  * Copyright 2007 Maarten Maathuis
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * this code uses ideas taken from the NVIDIA nv driver - the nvidia license
  26  * decleration is at the bottom of this file as it is rather ugly
  27  */
  28
  29 #ifdef HAVE_CONFIG_H
  30 #include "config.h"
  31 #endif
  32
  33 #include "xf86.h"
  34 #include "os.h"
  35 #include "mibank.h"
  36 #include "globals.h"
  37 #include "xf86.h"
  38 #include "xf86Priv.h"
  39 #include "xf86DDC.h"
  40 #include "mipointer.h"
  41 #include "windowstr.h"
  42 #include <randrstr.h>
  43 #include <X11/extensions/render.h>
  44 #include "X11/Xatom.h"
  45
  46 #include "xf86Crtc.h"
  47 #include "nv_include.h"
  48
  49 const char *OutputType[] = {
  50     "None",
  51     "VGA",
  52     "DVI",
  53     "LVDS",
  54     "S-video",
  55     "Composite",
  56 };
  57
  58 const char *MonTypeName[7] = {
  59     "AUTO",
  60     "NONE",
  61     "CRT",
  62     "LVDS",
  63     "TMDS",
  64     "CTV",
  65     "STV"
  66 };
  67
  68 /*
  69  * TMDS registers are indirect 8 bit registers.
  70  * Reading is straightforward, writing a bit odd.
  71  * Reading: Write adress (+write protect bit, do not forget this), then read value.
  72  * Writing: Write adress (+write protect bit), write value, write adress again and write it again (+write protect bit).
  73  */
  74
  75 void NVWriteTMDS(NVPtr pNv, int ramdac, CARD32 tmds_reg, CARD32 val)
  76 {
  77         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL,
  78                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
  79
  80         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA, val & 0xff);
  81
  82         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL, tmds_reg & 0xff);
  83         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL,
  84                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
  85 }
  86
  87 CARD8 NVReadTMDS(NVPtr pNv, int ramdac, CARD32 tmds_reg)
  88 {
  89         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL,
  90                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
  91
  92         return (nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA) & 0xff);
  93 }
  94
  95 /* Two register sets exist, this one is only used for dual link dvi/lvds */
  96
  97 void NVWriteTMDS2(NVPtr pNv, int ramdac, CARD32 tmds_reg, CARD32 val)
  98 {
  99         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2,
 100                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_2_WRITE_DISABLE);
 101
 102         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA_2, val & 0xff);
 103
 104         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2, tmds_reg & 0xff);
 105         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2,
 106                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_2_WRITE_DISABLE);
 107 }
 108
 109 CARD8 NVReadTMDS2(NVPtr pNv, int ramdac, CARD32 tmds_reg)
 110 {
 111         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2,
 112                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_2_WRITE_DISABLE);
 113
 114         return (nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA_2) & 0xff);
 115 }
 116
 117 void NVOutputWriteTMDS(xf86OutputPtr output, CARD32 tmds_reg, CARD32 val)
 118 {
 119         NVOutputPrivatePtr nv_output = output->driver_private;
 120         ScrnInfoPtr     pScrn = output->scrn;
 121         NVPtr pNv = NVPTR(pScrn);
 122
 123         /* We must write to the "bus" of the output */
 124         NVWriteTMDS(pNv, nv_output->preferred_output, tmds_reg, val);
 125 }
 126
 127 CARD8 NVOutputReadTMDS(xf86OutputPtr output, CARD32 tmds_reg)
 128 {
 129         NVOutputPrivatePtr nv_output = output->driver_private;
 130         ScrnInfoPtr     pScrn = output->scrn;
 131         NVPtr pNv = NVPTR(pScrn);
 132
 133         /* We must read from the "bus" of the output */
 134         return NVReadTMDS(pNv, nv_output->preferred_output, tmds_reg);
 135 }
 136
 137 void NVOutputWriteTMDS2(xf86OutputPtr output, CARD32 tmds_reg, CARD32 val)
 138 {
 139         NVOutputPrivatePtr nv_output = output->driver_private;
 140         ScrnInfoPtr     pScrn = output->scrn;
 141         NVPtr pNv = NVPTR(pScrn);
 142
 143         /* We must write to the "bus" of the output */
 144         NVWriteTMDS2(pNv, nv_output->preferred_output, tmds_reg, val);
 145 }
 146
 147 CARD8 NVOutputReadTMDS2(xf86OutputPtr output, CARD32 tmds_reg)
 148 {
 149         NVOutputPrivatePtr nv_output = output->driver_private;
 150         ScrnInfoPtr     pScrn = output->scrn;
 151         NVPtr pNv = NVPTR(pScrn);
 152
 153         /* We must read from the "bus" of the output */
 154         return NVReadTMDS2(pNv, nv_output->preferred_output, tmds_reg);
 155 }
 156
 157 /* These functions now write into the output, instead of a specific ramdac */
 158
 159 void NVOutputWriteRAMDAC(xf86OutputPtr output, CARD32 ramdac_reg, CARD32 val)
 160 {
 161     NVOutputPrivatePtr nv_output = output->driver_private;
 162     ScrnInfoPtr pScrn = output->scrn;
 163     NVPtr pNv = NVPTR(pScrn);
 164
 165     nvWriteRAMDAC(pNv, nv_output->preferred_output, ramdac_reg, val);
 166 }
 167
 168 CARD32 NVOutputReadRAMDAC(xf86OutputPtr output, CARD32 ramdac_reg)
 169 {
 170     NVOutputPrivatePtr nv_output = output->driver_private;
 171     ScrnInfoPtr pScrn = output->scrn;
 172     NVPtr pNv = NVPTR(pScrn);
 173
 174     return nvReadRAMDAC(pNv, nv_output->preferred_output, ramdac_reg);
 175 }
 176
 177 static void dpms_update_output_ramdac(xf86OutputPtr output, int mode)
 178 {
 179         NVOutputPrivatePtr nv_output = output->driver_private;
 180         ScrnInfoPtr pScrn = output->scrn;
 181         NVPtr pNv = NVPTR(pScrn);
 182         xf86CrtcPtr crtc = output->crtc;
 183         NVCrtcPrivatePtr nv_crtc = NULL;
 184         if (crtc) nv_crtc = crtc->driver_private;
 185
 186         /* We may be going for modesetting, so we must reset our output binding */
 187         if (mode == DPMSModeOff) {
 188                 if (crtc) {
 189                         NVWriteVGACR5758(pNv, nv_crtc->head, 0, 0x7f);
 190                         NVWriteVGACR5758(pNv, nv_crtc->head, 2, 0);
 191                 }
 192                 return;
 193         }
 194
 195         /* The previous call was not a modeset, but a normal dpms call */
 196         if (crtc) {
 197                 NVWriteVGACR5758(pNv, nv_crtc->head, 0, pNv->dcb_table.entry[nv_output->dcb_entry].type);
 198                 NVWriteVGACR5758(pNv, nv_crtc->head, 2, pNv->dcb_table.entry[nv_output->dcb_entry].or);
 199         }
 200 }
 201
 202 static void
 203 nv_lvds_output_dpms(xf86OutputPtr output, int mode)
 204 {
 205         NVOutputPrivatePtr nv_output = output->driver_private;
 206         NVPtr pNv = NVPTR(output->scrn);
 207         NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
 208
 209         ErrorF("nv_lvds_output_dpms is called with mode %d\n", mode);
 210
 211         dpms_update_output_ramdac(output, mode);
 212
 213         if (!pNv->dcb_table.entry[nv_output->dcb_entry].lvdsconf.use_power_scripts)
 214                 return;
 215
 216         switch (mode) {
 217         case DPMSModeStandby:
 218         case DPMSModeSuspend:
 219                 call_lvds_script(output->scrn, nv_crtc->head, nv_output->dcb_entry, LVDS_BACKLIGHT_OFF);
 220                 break;
 221         case DPMSModeOff:
 222                 call_lvds_script(output->scrn, nv_crtc->head, nv_output->dcb_entry, LVDS_PANEL_OFF);
 223                 break;
 224         case DPMSModeOn:
 225                 call_lvds_script(output->scrn, nv_crtc->head, nv_output->dcb_entry, LVDS_PANEL_ON);
 226         default:
 227                 break;
 228         }
 229 }
 230
 231 static void
 232 nv_analog_output_dpms(xf86OutputPtr output, int mode)
 233 {
 234         xf86CrtcPtr crtc = output->crtc;
 235
 236         ErrorF("nv_analog_output_dpms is called with mode %d\n", mode);
 237
 238         dpms_update_output_ramdac(output, mode);
 239
 240         if (crtc) {
 241                 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
 242
 243                 ErrorF("nv_analog_output_dpms is called for CRTC %d with mode %d\n", nv_crtc->crtc, mode);
 244         }
 245 }
 246
 247 static void
 248 nv_tmds_output_dpms(xf86OutputPtr output, int mode)
 249 {
 250         xf86CrtcPtr crtc = output->crtc;
 251         NVOutputPrivatePtr nv_output = output->driver_private;
 252         NVPtr pNv = NVPTR(output->scrn);
 253
 254         ErrorF("nv_tmds_output_dpms is called with mode %d\n", mode);
 255
 256         dpms_update_output_ramdac(output, mode);
 257
 258         /* Are we assigned a ramdac already?, else we will be activated during mode set */
 259         if (crtc) {
 260                 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
 261
 262                 ErrorF("nv_tmds_output_dpms is called for CRTC %d with mode %d\n", nv_crtc->crtc, mode);
 263
 264                 CARD32 fpcontrol = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_FP_CONTROL);
 265                 switch(mode) {
 266                         case DPMSModeStandby:
 267                         case DPMSModeSuspend:
 268                         case DPMSModeOff:
 269                                 /* cut the TMDS output */
 270                                 fpcontrol |= 0x20000022;
 271                                 break;
 272                         case DPMSModeOn:
 273                                 /* disable cutting the TMDS output */
 274                                 fpcontrol &= ~0x20000022;
 275                                 break;
 276                 }
 277                 nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_FP_CONTROL, fpcontrol);
 278         }
 279 }
 280
 281 /* This sequence is an optimized/shortened version of what the blob does */
 282 /* 0x40 and 0x43 are dual link dvi/lvds related, so don't touch them for now */
 283 uint32_t tmds_regs_nv40[] = { 0x04, 0x05, 0x2f, 0x30, 0x31, 0x32, 0x33, /* 0x40, 0x43,*/ 0x00, 0x01, 0x02, 0x2e, 0x2f, 0x3a, 0x2b };
 284 uint32_t tmds_regs_nv30[] = { 0x04, 0x05, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x29, 0x2a, 0x00, 0x01, 0x02, 0x2e, 0x2f, 0x3a, 0x2b };
 285
 286 #define TMDS_REGS(index) ( tmds_regs(pNv, index) )
 287
 288 uint32_t tmds_regs(NVPtr pNv, int i)
 289 {
 290         if (pNv->Architecture == NV_ARCH_40) {
 291                 return tmds_regs_nv40[i];
 292         } else {
 293                 return tmds_regs_nv30[i];
 294         }
 295 }
 296
 297 #define TMDS_SIZE ( tmds_size(pNv) )
 298
 299 uint32_t tmds_size(NVPtr pNv)
 300 {
 301         if (pNv->Architecture == NV_ARCH_40) {
 302                 return(sizeof(tmds_regs_nv40)/sizeof(tmds_regs_nv40[0]));
 303         } else {
 304                 return(sizeof(tmds_regs_nv30)/sizeof(tmds_regs_nv30[0]));
 305         }
 306 }
 307
 308 /* Does anyone know the precise purpose of this second register set? */
 309 uint32_t tmds2_regs_nv40[] = { 0x2b };
 310 uint32_t tmds2_regs_nv30[] = { 0x2b };
 311
 312 #define TMDS2_REGS(index) ( tmds2_regs(pNv, index) )
 313
 314 uint32_t tmds2_regs(NVPtr pNv, int i)
 315 {
 316         if (pNv->Architecture == NV_ARCH_40) {
 317                 return tmds2_regs_nv40[i];
 318         } else {
 319                 return tmds2_regs_nv30[i];
 320         }
 321 }
 322
 323 #define TMDS2_SIZE ( tmds2_size(pNv) )
 324
 325 uint32_t tmds2_size(NVPtr pNv)
 326 {
 327         if (pNv->Architecture == NV_ARCH_40) {
 328                 return(sizeof(tmds2_regs_nv40)/sizeof(tmds2_regs_nv40[0]));
 329         } else {
 330                 return(sizeof(tmds2_regs_nv30)/sizeof(tmds2_regs_nv30[0]));
 331         }
 332 }
 333
 334 void nv_output_save_state_ext(xf86OutputPtr output, RIVA_HW_STATE *state)
 335 {
 336         NVOutputPrivatePtr nv_output = output->driver_private;
 337         NVOutputRegPtr regp;
 338         int i;
 339
 340         regp = &state->dac_reg[nv_output->preferred_output];
 341
 342         regp->output = NVOutputReadRAMDAC(output, NV_RAMDAC_OUTPUT);
 343
 344         /* Store the registers in case we need them again for something (like data for VT restore) */
 345         for (i = 0; i < 0xFF; i++) {
 346                 regp->TMDS[i] = NVOutputReadTMDS(output, i);
 347         }
 348
 349         for (i = 0; i < 0xFF; i++) {
 350                 regp->TMDS2[i] = NVOutputReadTMDS2(output, i);
 351         }
 352 }
 353
 354 void nv_output_load_state_ext(xf86OutputPtr output, RIVA_HW_STATE *state, Bool override)
 355 {
 356         NVOutputPrivatePtr nv_output = output->driver_private;
 357         NVOutputRegPtr regp;
 358
 359         regp = &state->dac_reg[nv_output->preferred_output];
 360
 361         /* This exists purely for proper text mode restore */
 362         if (override) NVOutputWriteRAMDAC(output, NV_RAMDAC_OUTPUT, regp->output);
 363 }
 364
 365 /* NOTE: Don't rely on this data for anything other than restoring VT's */
 366
 367 static void
 368 nv_output_save (xf86OutputPtr output)
 369 {
 370         ScrnInfoPtr     pScrn = output->scrn;
 371         NVPtr pNv = NVPTR(pScrn);
 372         RIVA_HW_STATE *state;
 373
 374         ErrorF("nv_output_save is called\n");
 375         state = &pNv->SavedReg;
 376
 377         /* Due to strange mapping of outputs we could have swapped analog and digital */
 378         /* So we force save all the registers */
 379         nv_output_save_state_ext(output, state);
 380 }
 381
 382 uint32_t nv_calc_tmds_clock_from_pll(xf86OutputPtr output)
 383 {
 384         ScrnInfoPtr pScrn = output->scrn;
 385         NVPtr pNv = NVPTR(pScrn);
 386         RIVA_HW_STATE *state;
 387         NVOutputRegPtr regp;
 388         NVOutputPrivatePtr nv_output = output->driver_private;
 389
 390         state = &pNv->SavedReg;
 391         /* Registers are stored by their preferred ramdac */
 392         regp = &state->dac_reg[nv_output->preferred_output];
 393
 394         /* Only do it once for a dvi-d/dvi-a pair */
 395         Bool swapped_clock = FALSE;
 396         Bool vpllb_disabled = FALSE;
 397         /* Bit3 swaps crtc (clocks are bound to crtc) and output */
 398         if (regp->TMDS[0x4] & (1 << 3)) {
 399                 swapped_clock = TRUE;
 400         }
 401
 402         uint8_t vpll_num = swapped_clock ^ nv_output->preferred_output;
 403
 404         uint32_t vplla = 0;
 405         uint32_t vpllb = 0;
 406
 407         /* For the moment the syntax is the same for NV40 and earlier */
 408         if (pNv->Architecture == NV_ARCH_40) {
 409                 vplla = vpll_num ? state->vpll2_a : state->vpll1_a;
 410                 vpllb = vpll_num ? state->vpll2_b : state->vpll1_b;
 411         } else {
 412                 vplla = vpll_num ? state->vpll2 : state->vpll;
 413                 if (pNv->twoStagePLL)
 414                         vpllb = vpll_num ? state->vpll2B : state->vpllB;
 415         }
 416
 417         if (!pNv->twoStagePLL)
 418                 vpllb_disabled = TRUE;
 419
 420         /* This is the dummy value nvidia sets when vpll is disabled */
 421         if ((vpllb & 0xFFFF) == 0x11F)
 422                 vpllb_disabled = TRUE;
 423
 424         uint8_t m1, m2, n1, n2, p;
 425
 426         m1 = vplla & 0xFF;
 427         n1 = (vplla >> 8) & 0xFF;
 428         p = (vplla >> 16) & 0x7;
 429
 430         if (vpllb_disabled) {
 431                 m2 = 1;
 432                 n2 = 1;
 433         } else {
 434                 m2 = vpllb & 0xFF;
 435                 n2 = (vpllb >> 8) & 0xFF;
 436         }
 437
 438         uint32_t clock = ((pNv->CrystalFreqKHz * n1 * n2)/(m1 * m2)) >> p;
 439         ErrorF("The original bios clock seems to have been %d kHz\n", clock);
 440         return clock;
 441 }
 442
 443 void nv_set_tmds_registers(xf86OutputPtr output, uint32_t clock, Bool override, Bool crosswired)
 444 {
 445         ScrnInfoPtr pScrn = output->scrn;
 446         NVPtr pNv = NVPTR(pScrn);
 447         NVOutputPrivatePtr nv_output = output->driver_private;
 448         xf86CrtcPtr crtc = output->crtc;
 449         /* We have no crtc, so what are we supposed to do now? */
 450         /* This can only happen during VT restore */
 451         if (crtc && !override) {
 452                 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
 453                 /*
 454                  * Resetting all registers is a bad idea, it seems to work fine without it.
 455                  */
 456                 run_tmds_table(pScrn, &pNv->VBIOS, nv_output->dcb_entry, nv_crtc->head, clock/10);
 457         } else {
 458                 /*
 459                  * We have no crtc, but we do know what output we are and if we were crosswired.
 460                  * We can determine our crtc from this.
 461                  */
 462                 run_tmds_table(pScrn, &pNv->VBIOS, nv_output->dcb_entry, nv_output->preferred_output ^ crosswired, clock/10);
 463         }
 464 }
 465
 466 static void
 467 nv_output_restore (xf86OutputPtr output)
 468 {
 469         ScrnInfoPtr pScrn = output->scrn;
 470         NVPtr pNv = NVPTR(pScrn);
 471         RIVA_HW_STATE *state;
 472         NVOutputPrivatePtr nv_output = output->driver_private;
 473         NVOutputRegPtr regp;
 474         ErrorF("nv_output_restore is called\n");
 475
 476         state = &pNv->SavedReg;
 477         regp = &state->dac_reg[nv_output->preferred_output];
 478
 479         /* Due to strange mapping of outputs we could have swapped analog and digital */
 480         /* So we force load all the registers */
 481         nv_output_load_state_ext(output, state, TRUE);
 482 }
 483
 484 static int
 485 nv_output_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
 486 {
 487         if (pMode->Flags & V_DBLSCAN)
 488                 return MODE_NO_DBLESCAN;
 489
 490         if (pMode->Clock > 400000 || pMode->Clock < 25000)
 491                 return MODE_CLOCK_RANGE;
 492
 493         return MODE_OK;
 494 }
 495
 496
 497 static Bool
 498 nv_output_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
 499                      DisplayModePtr adjusted_mode)
 500 {
 501         ErrorF("nv_output_mode_fixup is called\n");
 502
 503         return TRUE;
 504 }
 505
 506 static void
 507 nv_output_mode_set_regs(xf86OutputPtr output, DisplayModePtr mode, DisplayModePtr adjusted_mode)
 508 {
 509         NVOutputPrivatePtr nv_output = output->driver_private;
 510         ScrnInfoPtr pScrn = output->scrn;
 511         //RIVA_HW_STATE *state;
 512         //NVOutputRegPtr regp, savep;
 513         Bool is_fp = FALSE;
 514         xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
 515         int i;
 516
 517         /* It's getting quiet here, not removing function just yet, we may still need it */
 518
 519         //state = &pNv->ModeReg;
 520         //regp = &state->dac_reg[nv_output->preferred_output];
 521
 522         if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS)
 523                 is_fp = TRUE;
 524
 525         if (output->crtc) {
 526                 NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
 527                 int two_crt = FALSE;
 528                 int two_mon = FALSE;
 529
 530                 for (i = 0; i < config->num_output; i++) {
 531                         NVOutputPrivatePtr nv_output2 = config->output[i]->driver_private;
 532
 533                         /* is it this output ?? */
 534                         if (config->output[i] == output)
 535                                 continue;
 536
 537                         /* it the output connected */
 538                         if (config->output[i]->crtc == NULL)
 539                                 continue;
 540
 541                         two_mon = TRUE;
 542                         if ((nv_output2->type == OUTPUT_ANALOG) && (nv_output->type == OUTPUT_ANALOG)) {
 543                                 two_crt = TRUE;
 544                         }
 545                 }
 546
 547                 ErrorF("%d: crtc %d output %d twocrt %d twomon %d\n", is_fp, nv_crtc->crtc, nv_output->preferred_output, two_crt, two_mon);
 548         }
 549 }
 550
 551 static Bool
 552 nv_have_duallink(ScrnInfoPtr    pScrn)
 553 {
 554         xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
 555         NVPtr pNv = NVPTR(pScrn);
 556         int i;
 557
 558         for (i = 0; i < xf86_config->num_output; i++) {
 559                 xf86OutputPtr output = xf86_config->output[i];
 560                 NVOutputPrivatePtr nv_output = output->driver_private;
 561                 if (pNv->dcb_table.entry[nv_output->dcb_entry].duallink_possible)
 562                         return TRUE;
 563         }
 564
 565         return FALSE;
 566 }
 567
 568 static void
 569 nv_output_mode_set_routing(xf86OutputPtr output)
 570 {
 571         NVOutputPrivatePtr nv_output = output->driver_private;
 572         xf86CrtcPtr crtc = output->crtc;
 573         NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
 574         ScrnInfoPtr     pScrn = output->scrn;
 575         NVPtr pNv = NVPTR(pScrn);
 576         Bool is_fp = FALSE;
 577
 578         uint32_t output_reg[2];
 579
 580         if ((nv_output->type == OUTPUT_LVDS) || (nv_output->type == OUTPUT_TMDS)) {
 581                 is_fp = TRUE;
 582         }
 583
 584         if (pNv->Architecture == NV_ARCH_40) {
 585                 /* NV4x cards have strange ways of dealing with dualhead */
 586                 /* Also see reg594 in nv_crtc.c */
 587                 output_reg[0] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
 588                 /* This seems to be restricted to dual link outputs */
 589                 if (nv_have_duallink(pScrn))
 590                         output_reg[1] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
 591         } else {
 592                 /* This is for simplicity */
 593                 output_reg[0] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
 594                 output_reg[1] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
 595         }
 596
 597         /* The analog outputs on NV2x seem fixed to a crtc */
 598         if (pNv->Architecture >= NV_ARCH_30) {
 599                 /* Only one can be on crtc1 */
 600                 if (nv_crtc->head == 1) {
 601                         output_reg[nv_output->preferred_output] |= NV_RAMDAC_OUTPUT_SELECT_CRTC1;
 602                 } else {
 603                         output_reg[(~nv_output->preferred_output) & 1] |= NV_RAMDAC_OUTPUT_SELECT_CRTC1;
 604                 }
 605         }
 606
 607         /* The registers can't be considered seperately on most cards */
 608         nvWriteRAMDAC(pNv, 0, NV_RAMDAC_OUTPUT, output_reg[0]);
 609         nvWriteRAMDAC(pNv, 1, NV_RAMDAC_OUTPUT, output_reg[1]);
 610
 611         /* This could use refinement for flatpanels, but it should work this way */
 612         if (pNv->NVArch < 0x44) {
 613                 nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, 0xf0000000);
 614                 if (pNv->Architecture == NV_ARCH_40)
 615                         nvWriteRAMDAC(pNv, 0, NV_RAMDAC_670, 0xf0000000);
 616         } else {
 617                 nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, 0x00100000);
 618                 nvWriteRAMDAC(pNv, 0, NV_RAMDAC_670, 0x00100000);
 619         }
 620 }
 621
 622 static void
 623 nv_output_mode_set(xf86OutputPtr output, DisplayModePtr mode,
 624                    DisplayModePtr adjusted_mode)
 625 {
 626         ScrnInfoPtr pScrn = output->scrn;
 627         NVPtr pNv = NVPTR(pScrn);
 628         NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
 629         NVOutputPrivatePtr nv_output = output->driver_private;
 630         RIVA_HW_STATE *state;
 631
 632         ErrorF("nv_output_mode_set is called\n");
 633
 634         state = &pNv->ModeReg;
 635
 636         nv_output_mode_set_regs(output, mode, adjusted_mode);
 637         nv_output_load_state_ext(output, state, FALSE);
 638         if (nv_output->type == OUTPUT_TMDS)
 639                 nv_set_tmds_registers(output, adjusted_mode->Clock, FALSE, FALSE);
 640         if (nv_output->type == OUTPUT_LVDS)
 641                 call_lvds_script(pScrn, nv_crtc->head, nv_output->dcb_entry, LVDS_RESET);
 642
 643         nv_output_mode_set_routing(output);
 644 }
 645
 646 static xf86MonPtr
 647 nv_get_edid(xf86OutputPtr output)
 648 {
 649         /* no use for shared DDC output */
 650         NVOutputPrivatePtr nv_output = output->driver_private;
 651         xf86MonPtr ddc_mon;
 652
 653         if (nv_output->pDDCBus == NULL)
 654                 return NULL;
 655
 656         ddc_mon = xf86OutputGetEDID(output, nv_output->pDDCBus);
 657         if (!ddc_mon)
 658                 return NULL;
 659
 660         if (ddc_mon->features.input_type && (nv_output->type == OUTPUT_ANALOG))
 661                 goto invalid;
 662
 663         if ((!ddc_mon->features.input_type) && (nv_output->type == OUTPUT_TMDS ||
 664                                 nv_output->type == OUTPUT_LVDS))
 665                 goto invalid;
 666
 667         return ddc_mon;
 668
 669 invalid:
 670         xfree(ddc_mon);
 671         return NULL;
 672 }
 673
 674 static Bool
 675 nv_ddc_detect(xf86OutputPtr output)
 676 {
 677         xf86MonPtr m = nv_get_edid(output);
 678
 679         if (m == NULL)
 680                 return FALSE;
 681
 682         xfree(m);
 683         return TRUE;
 684 }
 685
 686 static Bool
 687 nv_crt_load_detect(xf86OutputPtr output)
 688 {
 689         ScrnInfoPtr pScrn = output->scrn;
 690         NVOutputPrivatePtr nv_output = output->driver_private;
 691         NVPtr pNv = NVPTR(pScrn);
 692         CARD32 reg_output, reg_test_ctrl, temp;
 693         Bool present = FALSE;
 694
 695         /* For some reason we get false positives on output 1, maybe due tv-out? */
 696         if (nv_output->preferred_output == 1) {
 697                 return FALSE;
 698         }
 699
 700         if (nv_output->pDDCBus != NULL) {
 701                 xf86MonPtr ddc_mon = xf86OutputGetEDID(output, nv_output->pDDCBus);
 702                 /* Is there a digital flatpanel on this channel? */
 703                 if (ddc_mon && ddc_mon->features.input_type) {
 704                         return FALSE;
 705                 }
 706         }
 707
 708         reg_output = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT);
 709         reg_test_ctrl = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL);
 710
 711         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, (reg_test_ctrl & ~0x00010000));
 712
 713         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT, (reg_output & 0x0000FEEE));
 714         usleep(1000);
 715
 716         temp = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT);
 717         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT, temp | 1);
 718
 719         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_DATA, 0x94050140);
 720         temp = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL);
 721         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, temp | 0x1000);
 722
 723         usleep(1000);
 724
 725         present = (nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL) & (1 << 28)) ? TRUE : FALSE;
 726
 727         temp = NVOutputReadRAMDAC(output, NV_RAMDAC_TEST_CONTROL);
 728         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, temp & 0x000EFFF);
 729
 730         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT, reg_output);
 731         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, reg_test_ctrl);
 732
 733         if (present) {
 734                 ErrorF("A crt was detected on output %d with no ddc support\n", nv_output->preferred_output);
 735                 return TRUE;
 736         }
 737
 738         return FALSE;
 739 }
 740
 741 static xf86OutputStatus
 742 nv_tmds_output_detect(xf86OutputPtr output)
 743 {
 744         ErrorF("nv_tmds_output_detect is called\n");
 745
 746         if (nv_ddc_detect(output))
 747                 return XF86OutputStatusConnected;
 748
 749         return XF86OutputStatusDisconnected;
 750 }
 751
 752
 753 static xf86OutputStatus
 754 nv_analog_output_detect(xf86OutputPtr output)
 755 {
 756         ErrorF("nv_analog_output_detect is called\n");
 757
 758         if (nv_ddc_detect(output))
 759                 return XF86OutputStatusConnected;
 760
 761         if (nv_crt_load_detect(output))
 762                 return XF86OutputStatusConnected;
 763
 764         return XF86OutputStatusDisconnected;
 765 }
 766
 767 static DisplayModePtr
 768 nv_output_get_modes(xf86OutputPtr output)
 769 {
 770         NVOutputPrivatePtr nv_output = output->driver_private;
 771         xf86MonPtr ddc_mon;
 772         DisplayModePtr ddc_modes;
 773
 774         ErrorF("nv_output_get_modes is called\n");
 775
 776         ddc_mon = nv_get_edid(output);
 777
 778         xf86OutputSetEDID(output, ddc_mon);
 779
 780         if (ddc_mon == NULL)
 781                 return NULL;
 782
 783         ddc_modes = xf86OutputGetEDIDModes (output);
 784
 785         if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS) {
 786                 int i;
 787                 DisplayModePtr mode;
 788
 789                 for (i = 0; i < 4; i++) {
 790                         /* We only look at detailed timings atm */
 791                         if (ddc_mon->det_mon[i].type != DT)
 792                                 continue;
 793                         /* Selecting only based on width ok? */
 794                         if (ddc_mon->det_mon[i].section.d_timings.h_active > nv_output->fpWidth) {
 795                                 nv_output->fpWidth = ddc_mon->det_mon[i].section.d_timings.h_active;
 796                                 nv_output->fpHeight = ddc_mon->det_mon[i].section.d_timings.v_active;
 797                         }
 798                 }
 799
 800                 /* Add a native resolution mode that is preferred */
 801                 /* Reduced blanking should be fine on DVI monitor */
 802                 nv_output->native_mode = xf86CVTMode(nv_output->fpWidth, nv_output->fpHeight, 60.0, TRUE, FALSE);
 803                 nv_output->native_mode->type = M_T_DRIVER | M_T_PREFERRED;
 804                 /* We want the new mode to be preferred */
 805                 for (mode = ddc_modes; mode != NULL; mode = mode->next) {
 806                         if (mode->type & M_T_PREFERRED) {
 807                                 mode->type &= ~M_T_PREFERRED;
 808                         }
 809                 }
 810                 ddc_modes = xf86ModesAdd(ddc_modes, nv_output->native_mode);
 811         }
 812
 813         return ddc_modes;
 814 }
 815
 816 static void
 817 nv_output_destroy (xf86OutputPtr output)
 818 {
 819         ErrorF("nv_output_destroy is called\n");
 820         if (output->driver_private)
 821                 xfree (output->driver_private);
 822 }
 823
 824 static void
 825 nv_output_prepare(xf86OutputPtr output)
 826 {
 827         ErrorF("nv_output_prepare is called\n");
 828         NVOutputPrivatePtr nv_output = output->driver_private;
 829         ScrnInfoPtr pScrn = output->scrn;
 830         xf86CrtcPtr crtc = output->crtc;
 831         NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
 832         NVPtr pNv = NVPTR(pScrn);
 833
 834         output->funcs->dpms(output, DPMSModeOff);
 835
 836         /* Set our output type and output routing possibilities to the right registers */
 837         NVWriteVGACR5758(pNv, nv_crtc->head, 0, pNv->dcb_table.entry[nv_output->dcb_entry].type);
 838         NVWriteVGACR5758(pNv, nv_crtc->head, 2, pNv->dcb_table.entry[nv_output->dcb_entry].or);
 839 }
 840
 841 static void
 842 nv_output_commit(xf86OutputPtr output)
 843 {
 844         ErrorF("nv_output_commit is called\n");
 845
 846         output->funcs->dpms(output, DPMSModeOn);
 847 }
 848
 849 static const xf86OutputFuncsRec nv_analog_output_funcs = {
 850     .dpms = nv_analog_output_dpms,
 851     .save = nv_output_save,
 852     .restore = nv_output_restore,
 853     .mode_valid = nv_output_mode_valid,
 854     .mode_fixup = nv_output_mode_fixup,
 855     .mode_set = nv_output_mode_set,
 856     .detect = nv_analog_output_detect,
 857     .get_modes = nv_output_get_modes,
 858     .destroy = nv_output_destroy,
 859     .prepare = nv_output_prepare,
 860     .commit = nv_output_commit,
 861 };
 862
 863 #ifdef RANDR_12_INTERFACE
 864 /*
 865  * Several scaling modes exist, let the user choose.
 866  */
 867 #define SCALING_MODE_NAME "SCALING_MODE"
 868 #define NUM_SCALING_METHODS 4
 869 static char *scaling_mode_names[] = {
 870         "panel",
 871         "fullscreen",
 872         "aspect",
 873         "noscale",
 874 };
 875 static Atom scaling_mode_atom;
 876
 877 #define SCALING_MODE(_name) (nv_scaling_mode_lookup(_name, strlen(_name)))
 878
 879 static int
 880 nv_scaling_mode_lookup(char *name, int size)
 881 {
 882         int i, len;
 883
 884         for (i = 0; i < NUM_SCALING_METHODS; i++) {
 885                 /* We're getting non-terminated strings */
 886                 len = strlen(scaling_mode_names[i]);
 887                 if (len == size && !strncmp(name, scaling_mode_names[i], size))
 888                         return i;
 889         }
 890
 891         return -1;
 892 }
 893
 894 static void
 895 nv_tmds_create_resources(xf86OutputPtr output)
 896 {
 897         NVOutputPrivatePtr nv_output = output->driver_private;
 898         ScrnInfoPtr pScrn = output->scrn;
 899         int error;
 900
 901         /*
 902          * Setup scaling mode property.
 903          */
 904         scaling_mode_atom = MakeAtom(SCALING_MODE_NAME, sizeof(SCALING_MODE_NAME) - 1, TRUE);
 905
 906         error = RRConfigureOutputProperty(output->randr_output,
 907                                         scaling_mode_atom, TRUE, FALSE, FALSE,
 908                                         0, NULL);
 909
 910         if (error != 0) {
 911                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 912                         "RRConfigureOutputProperty error, %d\n", error);
 913         }
 914
 915         error = RRChangeOutputProperty(output->randr_output, scaling_mode_atom,
 916                                         XA_STRING, 8, PropModeReplace,
 917                                         strlen(scaling_mode_names[nv_output->scaling_mode]),
 918                                         scaling_mode_names[nv_output->scaling_mode],
 919                                         FALSE, TRUE);
 920
 921         if (error != 0) {
 922                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 923                         "Failed to set scaling mode, %d\n", error);
 924         }
 925 }
 926
 927 static Bool
 928 nv_tmds_set_property(xf86OutputPtr output, Atom property,
 929                                 RRPropertyValuePtr value)
 930 {
 931         NVOutputPrivatePtr nv_output = output->driver_private;
 932
 933         if (property == scaling_mode_atom) {
 934                 int32_t ret;
 935                 char *name = NULL;
 936
 937                 if (value->type != XA_STRING || value->format != 8)
 938                         return FALSE;
 939
 940                 name = (char *) value->data;
 941
 942                 /* Match a string to a scaling mode */
 943                 ret = nv_scaling_mode_lookup(name, value->size);
 944                 if (ret < 0)
 945                         return FALSE;
 946
 947                 nv_output->scaling_mode = ret;
 948                 return TRUE;
 949         }
 950
 951         return TRUE;
 952 }
 953
 954 #endif /* RANDR_12_INTERFACE */
 955
 956 static const xf86OutputFuncsRec nv_tmds_output_funcs = {
 957         .dpms = nv_tmds_output_dpms,
 958         .save = nv_output_save,
 959         .restore = nv_output_restore,
 960         .mode_valid = nv_output_mode_valid,
 961         .mode_fixup = nv_output_mode_fixup,
 962         .mode_set = nv_output_mode_set,
 963         .detect = nv_tmds_output_detect,
 964         .get_modes = nv_output_get_modes,
 965         .destroy = nv_output_destroy,
 966         .prepare = nv_output_prepare,
 967         .commit = nv_output_commit,
 968 #ifdef RANDR_12_INTERFACE
 969         .create_resources = nv_tmds_create_resources,
 970         .set_property = nv_tmds_set_property,
 971 #endif /* RANDR_12_INTERFACE */
 972 };
 973
 974 static int nv_lvds_output_mode_valid
 975 (xf86OutputPtr output, DisplayModePtr pMode)
 976 {
 977         NVOutputPrivatePtr nv_output = output->driver_private;
 978
 979         /* No modes > panel's native res */
 980         if (pMode->HDisplay > nv_output->fpWidth || pMode->VDisplay > nv_output->fpHeight)
 981                 return MODE_PANEL;
 982
 983         return nv_output_mode_valid(output, pMode);
 984 }
 985
 986 static xf86OutputStatus
 987 nv_lvds_output_detect(xf86OutputPtr output)
 988 {
 989         ScrnInfoPtr pScrn = output->scrn;
 990         NVPtr pNv = NVPTR(pScrn);
 991         NVOutputPrivatePtr nv_output = output->driver_private;
 992
 993         if (pNv->dcb_table.entry[nv_output->dcb_entry].lvdsconf.use_straps_for_mode &&
 994             pNv->VBIOS.fp.native_mode)
 995                 return XF86OutputStatusConnected;
 996         if (nv_ddc_detect(output))
 997                 return XF86OutputStatusConnected;
 998
 999         return XF86OutputStatusDisconnected;
1000 }
1001
1002 static DisplayModePtr
1003 nv_lvds_output_get_modes(xf86OutputPtr output)
1004 {
1005         ScrnInfoPtr pScrn = output->scrn;
1006         NVPtr pNv = NVPTR(pScrn);
1007         NVOutputPrivatePtr nv_output = output->driver_private;
1008         DisplayModePtr modes;
1009
1010         if ((modes = nv_output_get_modes(output)))
1011                 return modes;
1012
1013         /* it is possible to set up a mode from what we can read from the
1014          * RAMDAC registers, but if we can't read the BIOS table correctly
1015          * we might as well give up */
1016         if (!pNv->dcb_table.entry[nv_output->dcb_entry].lvdsconf.use_straps_for_mode ||
1017             (pNv->VBIOS.fp.native_mode == NULL))
1018                 return NULL;
1019
1020         nv_output->fpWidth = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_HDISP_END) + 1;
1021         nv_output->fpHeight = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_VDISP_END) + 1;
1022         nv_output->fpSyncs = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_CONTROL) & 0x30000033;
1023
1024         if (pNv->VBIOS.fp.native_mode->HDisplay != nv_output->fpWidth ||
1025                 pNv->VBIOS.fp.native_mode->VDisplay != nv_output->fpHeight) {
1026                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1027                         "Panel size mismatch; ignoring RAMDAC\n");
1028                 nv_output->fpWidth = pNv->VBIOS.fp.native_mode->HDisplay;
1029                 nv_output->fpHeight = pNv->VBIOS.fp.native_mode->VDisplay;
1030         }
1031
1032         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Panel size is %u x %u\n",
1033                 nv_output->fpWidth, nv_output->fpHeight);
1034
1035         nv_output->native_mode = xf86DuplicateMode(pNv->VBIOS.fp.native_mode);
1036
1037         return xf86DuplicateMode(pNv->VBIOS.fp.native_mode);
1038 }
1039
1040 static const xf86OutputFuncsRec nv_lvds_output_funcs = {
1041         .dpms = nv_lvds_output_dpms,
1042         .save = nv_output_save,
1043         .restore = nv_output_restore,
1044         .mode_valid = nv_lvds_output_mode_valid,
1045         .mode_fixup = nv_output_mode_fixup,
1046         .mode_set = nv_output_mode_set,
1047         .detect = nv_lvds_output_detect,
1048         .get_modes = nv_lvds_output_get_modes,
1049         .destroy = nv_output_destroy,
1050         .prepare = nv_output_prepare,
1051         .commit = nv_output_commit,
1052 };
1053
1054 static void nv_add_analog_output(ScrnInfoPtr pScrn, int dcb_entry, Bool dvi_pair)
1055 {
1056         NVPtr pNv = NVPTR(pScrn);
1057         xf86OutputPtr       output;
1058         NVOutputPrivatePtr    nv_output;
1059         char outputname[20];
1060         Bool create_output = TRUE;
1061         int i2c_index = pNv->dcb_table.entry[dcb_entry].i2c_index;
1062
1063         /* DVI have an analog connector and a digital one, differentiate between that and a normal vga */
1064         if (dvi_pair) {
1065                 sprintf(outputname, "DVI-A-%d", pNv->dvi_a_count);
1066                 pNv->dvi_a_count++;
1067         } else {
1068                 sprintf(outputname, "VGA-%d", pNv->vga_count);
1069                 pNv->vga_count++;
1070         }
1071
1072         nv_output = xnfcalloc (sizeof (NVOutputPrivateRec), 1);
1073         if (!nv_output) {
1074                 return;
1075         }
1076
1077         nv_output->dcb_entry = dcb_entry;
1078
1079         if (pNv->dcb_table.i2c_read[i2c_index] && pNv->pI2CBus[i2c_index] == NULL)
1080                 NV_I2CInit(pScrn, &pNv->pI2CBus[i2c_index], pNv->dcb_table.i2c_read[i2c_index], xstrdup(outputname));
1081
1082         nv_output->type = OUTPUT_ANALOG;
1083
1084         /* output route:
1085          * bit0: OUTPUT_0 valid
1086          * bit1: OUTPUT_1 valid
1087          * So lowest order has highest priority.
1088          * Below is guesswork:
1089          * bit2: All outputs valid
1090          */
1091         nv_output->valid_ramdac = ffs(pNv->dcb_table.entry[dcb_entry].or);
1092
1093         nv_output->bus = pNv->dcb_table.entry[dcb_entry].bus;
1094
1095         if (!create_output) {
1096                 xfree(nv_output);
1097                 return;
1098         }
1099
1100         /* Delay creation of output until we actually know we want it */
1101         output = xf86OutputCreate (pScrn, &nv_analog_output_funcs, outputname);
1102         if (!output)
1103                 return;
1104
1105         output->driver_private = nv_output;
1106
1107         nv_output->pDDCBus = pNv->pI2CBus[i2c_index];
1108
1109         /* This also facilitates proper output routing for dvi */
1110         /* See sel_clk assignment in nv_crtc.c */
1111         if (nv_output->valid_ramdac & OUTPUT_1) {
1112                 nv_output->preferred_output = 1;
1113         } else {
1114                 nv_output->preferred_output = 0;
1115         }
1116
1117         output->possible_crtcs = pNv->dcb_table.entry[dcb_entry].heads;
1118
1119         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Adding output %s\n", outputname);
1120 }
1121
1122 static void nv_add_digital_output(ScrnInfoPtr pScrn, int dcb_entry, int lvds)
1123 {
1124         NVPtr pNv = NVPTR(pScrn);
1125         xf86OutputPtr       output;
1126         NVOutputPrivatePtr    nv_output;
1127         char outputname[20];
1128         Bool create_output = TRUE;
1129         int i2c_index = pNv->dcb_table.entry[dcb_entry].i2c_index;
1130
1131         if (lvds) {
1132                 sprintf(outputname, "LVDS-%d", pNv->lvds_count);
1133                 pNv->lvds_count++;
1134         } else {
1135                 sprintf(outputname, "DVI-D-%d", pNv->dvi_d_count);
1136                 pNv->dvi_d_count++;
1137         }
1138
1139         nv_output = xnfcalloc (sizeof (NVOutputPrivateRec), 1);
1140
1141         if (!nv_output) {
1142                 return;
1143         }
1144
1145         nv_output->dcb_entry = dcb_entry;
1146
1147         if (pNv->dcb_table.i2c_read[i2c_index] && pNv->pI2CBus[i2c_index] == NULL)
1148                 NV_I2CInit(pScrn, &pNv->pI2CBus[i2c_index], pNv->dcb_table.i2c_read[i2c_index], xstrdup(outputname));
1149
1150         nv_output->pDDCBus = pNv->pI2CBus[i2c_index];
1151
1152         /* output route:
1153          * bit0: OUTPUT_0 valid
1154          * bit1: OUTPUT_1 valid
1155          * So lowest order has highest priority.
1156          * Below is guesswork:
1157          * bit2: All outputs valid
1158          */
1159         nv_output->valid_ramdac = ffs(pNv->dcb_table.entry[dcb_entry].or);
1160
1161         nv_output->bus = pNv->dcb_table.entry[dcb_entry].bus;
1162
1163         if (lvds) {
1164                 nv_output->type = OUTPUT_LVDS;
1165                 /* comment below two lines to test LVDS under RandR12.
1166                  * If your screen "blooms" or "bleeds" (i.e. has a developing
1167                  * white / psychedelic pattern) then KILL X IMMEDIATELY
1168                  * (ctrl+alt+backspace) & if the effect continues reset power */
1169                 ErrorF("Output refused because we don't accept LVDS at the moment.\n");
1170                 create_output = FALSE;
1171         } else {
1172                 nv_output->type = OUTPUT_TMDS;
1173         }
1174
1175         if (!create_output) {
1176                 xfree(nv_output);
1177                 return;
1178         }
1179
1180         /* Delay creation of output until we are certain is desirable */
1181         if (lvds)
1182                 output = xf86OutputCreate (pScrn, &nv_lvds_output_funcs, outputname);
1183         else
1184                 output = xf86OutputCreate (pScrn, &nv_tmds_output_funcs, outputname);
1185         if (!output)
1186                 return;
1187
1188         output->driver_private = nv_output;
1189
1190         /* This also facilitates proper output routing for dvi */
1191         /* See sel_clk assignment in nv_crtc.c */
1192         if (nv_output->valid_ramdac & OUTPUT_1) {
1193                 nv_output->preferred_output = 1;
1194         } else {
1195                 nv_output->preferred_output = 0;
1196         }
1197
1198         if (pNv->fpScaler || lvds) { /* GPU Scaling */
1199                 char *name = (char *)xf86GetOptValString(pNv->Options, OPTION_SCALING_MODE);
1200                 /* lvds must always use gpu scaling */
1201                 if (name && (!lvds || (SCALING_MODE(name) != SCALING_MODE("panel")))) {
1202                         nv_output->scaling_mode = SCALING_MODE(name);
1203                 } else {
1204                         nv_output->scaling_mode = SCALING_MODE("aspect");
1205                 }
1206         } else { /* Panel scaling */
1207                 nv_output->scaling_mode = SCALING_MODE("panel");
1208         }
1209
1210         output->possible_crtcs = pNv->dcb_table.entry[dcb_entry].heads;
1211
1212         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Adding output %s\n", outputname);
1213 }
1214
1215 void NvDCBSetupOutputs(ScrnInfoPtr pScrn)
1216 {
1217         NVPtr pNv = NVPTR(pScrn);
1218         int i, type, i2c_count[0xf];
1219
1220         memset(i2c_count, 0, sizeof(i2c_count));
1221         for (i = 0 ; i < pNv->dcb_table.entries; i++)
1222                 i2c_count[pNv->dcb_table.entry[i].i2c_index]++;
1223
1224         /* we setup the outputs up from the BIOS table */
1225         for (i = 0 ; i < pNv->dcb_table.entries; i++) {
1226                 type = pNv->dcb_table.entry[i].type;
1227                 if (type > 3) {
1228                         xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "DCB type %d not known\n", type);
1229                         continue;
1230                 }
1231
1232                 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DCB entry %d: type: %d, i2c_index: %d, heads: %d, bus: %d, or: %d\n", i, type, pNv->dcb_table.entry[i].i2c_index, pNv->dcb_table.entry[i].heads, pNv->dcb_table.entry[i].bus, pNv->dcb_table.entry[i].or);
1233
1234                 switch(type) {
1235                 case OUTPUT_ANALOG:
1236                         nv_add_analog_output(pScrn, i, (i2c_count[pNv->dcb_table.entry[i].i2c_index] > 1));
1237                         break;
1238                 case OUTPUT_TMDS:
1239                         nv_add_digital_output(pScrn, i, 0);
1240                         break;
1241                 case OUTPUT_LVDS:
1242                         nv_add_digital_output(pScrn, i, 1);
1243                         break;
1244                 default:
1245                         break;
1246                 }
1247         }
1248 }
1249
1250 void NvSetupOutputs(ScrnInfoPtr pScrn)
1251 {
1252         NVPtr pNv = NVPTR(pScrn);
1253
1254         pNv->Television = FALSE;
1255
1256         memset(pNv->pI2CBus, 0, sizeof(pNv->pI2CBus));
1257         NvDCBSetupOutputs(pScrn);
1258 }
1259
1260 /*************************************************************************** \
1261 |*                                                                           *|
1262 |*       Copyright 1993-2003 NVIDIA, Corporation.  All rights reserved.      *|
1263 |*                                                                           *|
1264 |*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|
1265 |*     international laws.  Users and possessors of this source code are     *|
1266 |*     hereby granted a nonexclusive,  royalty-free copyright license to     *|
1267 |*     use this code in individual and commercial software.                  *|
1268 |*                                                                           *|
1269 |*     Any use of this source code must include,  in the user documenta-     *|
1270 |*     tion and  internal comments to the code,  notices to the end user     *|
1271 |*     as follows:                                                           *|
1272 |*                                                                           *|
1273 |*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
1274 |*                                                                           *|
1275 |*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|
1276 |*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|
1277 |*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|
1278 |*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|
1279 |*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|
1280 |*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|
1281 |*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|
1282 |*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|
1283 |*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|
1284 |*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|
1285 |*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|
1286 |*                                                                           *|
1287 |*     U.S. Government  End  Users.   This source code  is a "commercial     *|
1288 |*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|
1289 |*     consisting  of "commercial  computer  software"  and  "commercial     *|
1290 |*     computer  software  documentation,"  as such  terms  are  used in     *|
1291 |*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|
1292 |*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|
1293 |*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|
1294 |*     all U.S. Government End Users  acquire the source code  with only     *|
1295 |*     those rights set forth herein.                                        *|
1296 |*                                                                           *|
1297  \***************************************************************************/