git.oblomov.eu Git - nouveau/blob - src/nv40_exa.c

   1 /*
   2  * Copyright 2007 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "nv_include.h"
  24 #include "nv30_shaders.h"
  25
  26 typedef struct nv_pict_surface_format {
  27         int      pict_fmt;
  28         uint32_t card_fmt;
  29 } nv_pict_surface_format_t;
  30
  31 typedef struct nv_pict_texture_format {
  32         int      pict_fmt;
  33         uint32_t card_fmt;
  34         uint32_t card_swz;
  35 } nv_pict_texture_format_t;
  36
  37 typedef struct nv_pict_op {
  38         Bool     src_alpha;
  39         Bool     dst_alpha;
  40         uint32_t src_card_op;
  41         uint32_t dst_card_op;
  42 } nv_pict_op_t;
  43
  44 typedef struct nv40_exa_state {
  45         Bool have_mask;
  46
  47         struct {
  48                 PictTransformPtr transform;
  49                 float width;
  50                 float height;
  51         } unit[2];
  52 } nv40_exa_state_t;
  53 static nv40_exa_state_t exa_state;
  54 #define NV40EXA_STATE nv40_exa_state_t *state = &exa_state
  55
  56 static nv_pict_surface_format_t
  57 NV40SurfaceFormat[] = {
  58         { PICT_a8r8g8b8 , NV40TCL_RT_FORMAT_COLOR_A8R8G8B8 },
  59         { PICT_x8r8g8b8 , NV40TCL_RT_FORMAT_COLOR_X8R8G8B8 },
  60         { PICT_r5g6b5   , NV40TCL_RT_FORMAT_COLOR_R5G6B5   },
  61         { PICT_a8       , NV40TCL_RT_FORMAT_COLOR_B8       },
  62         { -1, ~0 }
  63 };
  64
  65 static nv_pict_surface_format_t *
  66 NV40_GetPictSurfaceFormat(int format)
  67 {
  68         int i = 0;
  69
  70         while (NV40SurfaceFormat[i].pict_fmt != -1) {
  71                 if (NV40SurfaceFormat[i].pict_fmt == format)
  72                         return &NV40SurfaceFormat[i];
  73                 i++;
  74         }
  75
  76         return NULL;
  77 }
  78
  79 enum {
  80         NV40EXA_FPID_PASS_COL0 = 0,
  81         NV40EXA_FPID_PASS_TEX0 = 1,
  82         NV40EXA_FPID_COMPOSITE_MASK = 2,
  83         NV40EXA_FPID_COMPOSITE_MASK_SA_CA = 3,
  84         NV40EXA_FPID_COMPOSITE_MASK_CA = 4,
  85         NV40EXA_FPID_MAX = 5
  86 } NV40EXA_FPID;
  87
  88 static nv_shader_t *nv40_fp_map[NV40EXA_FPID_MAX] = {
  89         &nv30_fp_pass_col0,
  90         &nv30_fp_pass_tex0,
  91         &nv30_fp_composite_mask,
  92         &nv30_fp_composite_mask_sa_ca,
  93         &nv30_fp_composite_mask_ca
  94 };
  95
  96 static nv_shader_t *nv40_fp_map_a8[NV40EXA_FPID_MAX];
  97
  98 static void
  99 NV40EXAHackupA8Shaders(ScrnInfoPtr pScrn)
 100 {
 101         int s;
 102
 103         for (s = 0; s < NV40EXA_FPID_MAX; s++) {
 104                 nv_shader_t *def, *a8;
 105
 106                 def = nv40_fp_map[s];
 107                 a8 = xcalloc(1, sizeof(nv_shader_t));
 108                 a8->card_priv.NV30FP.num_regs = def->card_priv.NV30FP.num_regs;
 109                 a8->size = def->size + 4;
 110                 memcpy(a8->data, def->data, def->size * sizeof(uint32_t));
 111                 nv40_fp_map_a8[s] = a8;
 112
 113                 a8->data[a8->size - 8 + 0] &= ~0x00000081;
 114                 a8->data[a8->size - 4 + 0]  = 0x01401e81;
 115                 a8->data[a8->size - 4 + 1]  = 0x1c9dfe00;
 116                 a8->data[a8->size - 4 + 2]  = 0x0001c800;
 117                 a8->data[a8->size - 4 + 3]  = 0x0001c800;
 118         }
 119 }
 120
 121 #define _(r,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w)                        \
 122   {                                                                            \
 123   PICT_##r, NV40TCL_TEX_FORMAT_FORMAT_##tf,                                    \
 124   NV40TCL_TEX_SWIZZLE_S0_X_##ts0x | NV40TCL_TEX_SWIZZLE_S0_Y_##ts0y |          \
 125   NV40TCL_TEX_SWIZZLE_S0_Z_##ts0z | NV40TCL_TEX_SWIZZLE_S0_W_##ts0w |          \
 126   NV40TCL_TEX_SWIZZLE_S1_X_##ts1x | NV40TCL_TEX_SWIZZLE_S1_Y_##ts1y |          \
 127   NV40TCL_TEX_SWIZZLE_S1_Z_##ts1z | NV40TCL_TEX_SWIZZLE_S1_W_##ts1w,           \
 128   }
 129 static nv_pict_texture_format_t
 130 NV40TextureFormat[] = {
 131         _(a8r8g8b8, A8R8G8B8,   S1,   S1,   S1,   S1, X, Y, Z, W),
 132         _(x8r8g8b8, A8R8G8B8,   S1,   S1,   S1,  ONE, X, Y, Z, W),
 133         _(x8b8g8r8, A8R8G8B8,   S1,   S1,   S1,  ONE, Z, Y, X, W),
 134         _(a1r5g5b5, A1R5G5B5,   S1,   S1,   S1,   S1, X, Y, Z, W),
 135         _(x1r5g5b5, A1R5G5B5,   S1,   S1,   S1,  ONE, X, Y, Z, W),
 136         _(  r5g6b5,   R5G6B5,   S1,   S1,   S1,   S1, X, Y, Z, W),
 137         _(      a8,       L8, ZERO, ZERO, ZERO,   S1, X, X, X, X),
 138         { -1, ~0, ~0 }
 139 };
 140 #undef _
 141
 142 static nv_pict_texture_format_t *
 143 NV40_GetPictTextureFormat(int format)
 144 {
 145         int i = 0;
 146
 147         while (NV40TextureFormat[i].pict_fmt != -1) {
 148                 if (NV40TextureFormat[i].pict_fmt == format)
 149                         return &NV40TextureFormat[i];
 150                 i++;
 151         }
 152
 153         return NULL;
 154 }
 155
 156 #define SF(bf) (NV40TCL_BLEND_FUNC_SRC_RGB_##bf |                              \
 157                 NV40TCL_BLEND_FUNC_SRC_ALPHA_##bf)
 158 #define DF(bf) (NV40TCL_BLEND_FUNC_DST_RGB_##bf |                              \
 159                 NV40TCL_BLEND_FUNC_DST_ALPHA_##bf)
 160 static nv_pict_op_t
 161 NV40PictOp[] = {
 162 /* Clear       */ { 0, 0, SF(               ZERO), DF(               ZERO) },
 163 /* Src         */ { 0, 0, SF(                ONE), DF(               ZERO) },
 164 /* Dst         */ { 0, 0, SF(               ZERO), DF(                ONE) },
 165 /* Over        */ { 1, 0, SF(                ONE), DF(ONE_MINUS_SRC_ALPHA) },
 166 /* OverReverse */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF(                ONE) },
 167 /* In          */ { 0, 1, SF(          DST_ALPHA), DF(               ZERO) },
 168 /* InReverse   */ { 1, 0, SF(               ZERO), DF(          SRC_ALPHA) },
 169 /* Out         */ { 0, 1, SF(ONE_MINUS_DST_ALPHA), DF(               ZERO) },
 170 /* OutReverse  */ { 1, 0, SF(               ZERO), DF(ONE_MINUS_SRC_ALPHA) },
 171 /* Atop        */ { 1, 1, SF(          DST_ALPHA), DF(ONE_MINUS_SRC_ALPHA) },
 172 /* AtopReverse */ { 1, 1, SF(ONE_MINUS_DST_ALPHA), DF(          SRC_ALPHA) },
 173 /* Xor         */ { 1, 1, SF(ONE_MINUS_DST_ALPHA), DF(ONE_MINUS_SRC_ALPHA) },
 174 /* Add         */ { 0, 0, SF(                ONE), DF(                ONE) }
 175 };
 176
 177 static nv_pict_op_t *
 178 NV40_GetPictOpRec(int op)
 179 {
 180         if (op >= PictOpSaturate)
 181                 return NULL;
 182         return &NV40PictOp[op];
 183 }
 184
 185 #if 0
 186 #define FALLBACK(fmt,args...) do {                                      \
 187         ErrorF("FALLBACK %s:%d> " fmt, __func__, __LINE__, ##args);     \
 188         return FALSE;                                                   \
 189 } while(0)
 190 #else
 191 #define FALLBACK(fmt,args...) do { \
 192         return FALSE;              \
 193 } while(0)
 194 #endif
 195
 196 static void
 197 NV40_SetupBlend(ScrnInfoPtr pScrn, nv_pict_op_t *blend,
 198                 PictFormatShort dest_format, Bool component_alpha)
 199 {
 200         NVPtr pNv = NVPTR(pScrn);
 201         uint32_t sblend, dblend;
 202
 203         sblend = blend->src_card_op;
 204         dblend = blend->dst_card_op;
 205
 206         if (blend->dst_alpha) {
 207                 if (!PICT_FORMAT_A(dest_format)) {
 208                         if (sblend == SF(DST_ALPHA)) {
 209                                 sblend = SF(ONE);
 210                         } else if (sblend == SF(ONE_MINUS_DST_ALPHA)) {
 211                                 sblend = SF(ZERO);
 212                         }
 213                 } else if (dest_format == PICT_a8) {
 214                         if (sblend == SF(DST_ALPHA)) {
 215                                 sblend = SF(DST_COLOR);
 216                         } else if (sblend == SF(ONE_MINUS_DST_ALPHA)) {
 217                                 sblend = SF(ONE_MINUS_DST_COLOR);
 218                         }
 219                 }
 220         }
 221
 222         if (blend->src_alpha && (component_alpha || dest_format == PICT_a8)) {
 223                 if (dblend == DF(SRC_ALPHA)) {
 224                         dblend = DF(SRC_COLOR);
 225                 } else if (dblend == DF(ONE_MINUS_SRC_ALPHA)) {
 226                         dblend = DF(ONE_MINUS_SRC_COLOR);
 227                 }
 228         }
 229
 230         if (sblend == SF(ONE) && dblend == DF(ZERO)) {
 231                 BEGIN_RING(Nv3D, NV40TCL_BLEND_ENABLE, 1);
 232                 OUT_RING  (0);
 233         } else {
 234                 BEGIN_RING(Nv3D, NV40TCL_BLEND_ENABLE, 5);
 235                 OUT_RING  (1);
 236                 OUT_RING  (sblend);
 237                 OUT_RING  (dblend);
 238                 OUT_RING  (0x00000000);
 239                 OUT_RING  (NV40TCL_BLEND_EQUATION_ALPHA_FUNC_ADD |
 240                            NV40TCL_BLEND_EQUATION_RGB_FUNC_ADD);
 241         }
 242 }
 243
 244 static Bool
 245 NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
 246 {
 247         NVPtr pNv = NVPTR(pScrn);
 248         nv_pict_texture_format_t *fmt;
 249         NV40EXA_STATE;
 250
 251         fmt = NV40_GetPictTextureFormat(pPict->format);
 252         if (!fmt)
 253                 return FALSE;
 254
 255         BEGIN_RING(Nv3D, NV40TCL_TEX_OFFSET(unit), 8);
 256         OUT_PIXMAPl(pPix, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD);
 257         OUT_PIXMAPd(pPix, fmt->card_fmt | NV40TCL_TEX_FORMAT_LINEAR |
 258                     NV40TCL_TEX_FORMAT_DIMS_2D | NV40TCL_TEX_FORMAT_NO_BORDER |
 259                     (0x8000) | (1 << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT),
 260                     NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD,
 261                     NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
 262         if (pPict->repeat) {
 263                 switch(pPict->repeatType) {
 264                         case RepeatPad:
 265                                 OUT_RING (NV40TCL_TEX_WRAP_S_CLAMP |
 266                                 NV40TCL_TEX_WRAP_T_CLAMP |
 267                                 NV40TCL_TEX_WRAP_R_CLAMP);
 268                                 break;
 269                         case RepeatReflect:
 270                                 OUT_RING  (NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT |
 271                                 NV40TCL_TEX_WRAP_T_MIRRORED_REPEAT |
 272                                 NV40TCL_TEX_WRAP_R_MIRRORED_REPEAT);
 273                                 break;
 274                         case RepeatNormal:
 275                         default:
 276                                 OUT_RING  (NV40TCL_TEX_WRAP_S_REPEAT |
 277                                 NV40TCL_TEX_WRAP_T_REPEAT |
 278                                 NV40TCL_TEX_WRAP_R_REPEAT);
 279                                 break;
 280                 }
 281         } else {
 282                 OUT_RING  (NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER |
 283                                 NV40TCL_TEX_WRAP_T_CLAMP_TO_BORDER |
 284                                 NV40TCL_TEX_WRAP_R_CLAMP_TO_BORDER);
 285         }
 286         OUT_RING  (NV40TCL_TEX_ENABLE_ENABLE);
 287         OUT_RING  (fmt->card_swz);
 288         if (pPict->filter == PictFilterBilinear) {
 289                 OUT_RING  (NV40TCL_TEX_FILTER_MIN_LINEAR |
 290                            NV40TCL_TEX_FILTER_MAG_LINEAR |
 291                            0x3fd6);
 292         } else {
 293                 OUT_RING  (NV40TCL_TEX_FILTER_MIN_NEAREST |
 294                            NV40TCL_TEX_FILTER_MAG_NEAREST |
 295                            0x3fd6);
 296         }
 297         OUT_RING  ((pPix->drawable.width << 16) | pPix->drawable.height);
 298         OUT_RING  (0); /* border ARGB */
 299         BEGIN_RING(Nv3D, NV40TCL_TEX_SIZE1(unit), 1);
 300         OUT_RING  ((1 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) |
 301                    (uint32_t)exaGetPixmapPitch(pPix));
 302
 303         state->unit[unit].width         = (float)pPix->drawable.width;
 304         state->unit[unit].height        = (float)pPix->drawable.height;
 305         state->unit[unit].transform     = pPict->transform;
 306
 307         return TRUE;
 308 }
 309
 310 static Bool
 311 NV40_SetupSurface(ScrnInfoPtr pScrn, PixmapPtr pPix, PictFormatShort format)
 312 {
 313         NVPtr pNv = NVPTR(pScrn);
 314         nv_pict_surface_format_t *fmt;
 315
 316         fmt = NV40_GetPictSurfaceFormat(format);
 317         if (!fmt) {
 318                 ErrorF("AIII no format\n");
 319                 return FALSE;
 320         }
 321
 322         BEGIN_RING(Nv3D, NV40TCL_RT_FORMAT, 3);
 323         OUT_RING  (NV40TCL_RT_FORMAT_TYPE_LINEAR |
 324                    NV40TCL_RT_FORMAT_ZETA_Z24S8 |
 325                    fmt->card_fmt);
 326         OUT_RING  (exaGetPixmapPitch(pPix));
 327         OUT_PIXMAPl(pPix, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 328
 329         return TRUE;
 330 }
 331
 332 static Bool
 333 NV40EXACheckCompositeTexture(PicturePtr pPict)
 334 {
 335         nv_pict_texture_format_t *fmt;
 336         int w = pPict->pDrawable->width;
 337         int h = pPict->pDrawable->height;
 338
 339         if ((w > 4096) || (h > 4096))
 340                 FALLBACK("picture too large, %dx%d\n", w, h);
 341
 342         fmt = NV40_GetPictTextureFormat(pPict->format);
 343         if (!fmt)
 344                 FALLBACK("picture format 0x%08x not supported\n",
 345                                 pPict->format);
 346
 347         if (pPict->filter != PictFilterNearest &&
 348             pPict->filter != PictFilterBilinear)
 349                 FALLBACK("filter 0x%x not supported\n", pPict->filter);
 350
 351         return TRUE;
 352 }
 353
 354 Bool
 355 NV40EXACheckComposite(int op, PicturePtr psPict,
 356                               PicturePtr pmPict,
 357                               PicturePtr pdPict)
 358 {
 359         nv_pict_surface_format_t *fmt;
 360         nv_pict_op_t *opr;
 361
 362         opr = NV40_GetPictOpRec(op);
 363         if (!opr)
 364                 FALLBACK("unsupported blend op 0x%x\n", op);
 365
 366         fmt = NV40_GetPictSurfaceFormat(pdPict->format);
 367         if (!fmt)
 368                 FALLBACK("dst picture format 0x%08x not supported\n",
 369                                 pdPict->format);
 370
 371         if (!NV40EXACheckCompositeTexture(psPict))
 372                 FALLBACK("src picture\n");
 373         if (pmPict) {
 374                 if (pmPict->componentAlpha &&
 375                     PICT_FORMAT_RGB(pmPict->format) &&
 376                     opr->src_alpha && opr->src_card_op != SF(ZERO))
 377                         FALLBACK("mask CA + SA\n");
 378                 if (!NV40EXACheckCompositeTexture(pmPict))
 379                         FALLBACK("mask picture\n");
 380         }
 381
 382         return TRUE;
 383 }
 384
 385 Bool
 386 NV40EXAPrepareComposite(int op, PicturePtr psPict,
 387                                 PicturePtr pmPict,
 388                                 PicturePtr pdPict,
 389                                 PixmapPtr  psPix,
 390                                 PixmapPtr  pmPix,
 391                                 PixmapPtr  pdPix)
 392 {
 393         ScrnInfoPtr pScrn = xf86Screens[psPix->drawable.pScreen->myNum];
 394         NVPtr pNv = NVPTR(pScrn);
 395         nv_pict_op_t *blend;
 396         int fpid = NV40EXA_FPID_PASS_COL0;
 397         NV40EXA_STATE;
 398
 399         blend = NV40_GetPictOpRec(op);
 400
 401         NV40_SetupBlend(pScrn, blend, pdPict->format,
 402                         (pmPict && pmPict->componentAlpha &&
 403                          PICT_FORMAT_RGB(pmPict->format)));
 404
 405         NV40_SetupSurface(pScrn, pdPix, pdPict->format);
 406         NV40EXATexture(pScrn, psPix, psPict, 0);
 407
 408         NV40_LoadVtxProg(pScrn, &nv40_vp_exa_render);
 409         if (pmPict) {
 410                 NV40EXATexture(pScrn, pmPix, pmPict, 1);
 411
 412                 if (pmPict->componentAlpha && PICT_FORMAT_RGB(pmPict->format)) {
 413                         if (blend->src_alpha)
 414                                 fpid = NV40EXA_FPID_COMPOSITE_MASK_SA_CA;
 415                         else
 416                                 fpid = NV40EXA_FPID_COMPOSITE_MASK_CA;
 417                 } else {
 418                         fpid = NV40EXA_FPID_COMPOSITE_MASK;
 419                 }
 420
 421                 state->have_mask = TRUE;
 422         } else {
 423                 fpid = NV40EXA_FPID_PASS_TEX0;
 424
 425                 state->have_mask = FALSE;
 426         }
 427
 428         if (pdPict->format == PICT_a8)
 429                 NV40_LoadFragProg(pScrn, nv40_fp_map_a8[fpid]);
 430         else
 431                 NV40_LoadFragProg(pScrn, nv40_fp_map[fpid]);
 432
 433         /* Appears to be some kind of cache flush, needed here at least
 434          * sometimes.. funky text rendering otherwise :)
 435          */
 436         BEGIN_RING(Nv3D, NV40TCL_TEX_CACHE_CTL, 1);
 437         OUT_RING  (2);
 438         BEGIN_RING(Nv3D, NV40TCL_TEX_CACHE_CTL, 1);
 439         OUT_RING  (1);
 440
 441         BEGIN_RING(Nv3D, NV40TCL_BEGIN_END, 1);
 442         OUT_RING  (NV40TCL_BEGIN_END_TRIANGLES);
 443
 444         return TRUE;
 445 }
 446
 447 #define xFixedToFloat(v) \
 448         ((float)xFixedToInt((v)) + ((float)xFixedFrac(v) / 65536.0))
 449
 450 static inline void
 451 NV40EXATransformCoord(PictTransformPtr t, int x, int y, float sx, float sy,
 452                                           float *x_ret, float *y_ret)
 453 {
 454         if (t) {
 455                 PictVector v;
 456                 v.vector[0] = IntToxFixed(x);
 457                 v.vector[1] = IntToxFixed(y);
 458                 v.vector[2] = xFixed1;
 459                 PictureTransformPoint(t, &v);
 460                 *x_ret = xFixedToFloat(v.vector[0]) / sx;
 461                 *y_ret = xFixedToFloat(v.vector[1]) / sy;
 462         } else {
 463                 *x_ret = (float)x / sx;
 464                 *y_ret = (float)y / sy;
 465         }
 466 }
 467
 468 #define CV_OUTm(sx,sy,mx,my,dx,dy) do {                                        \
 469         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2F_X(8), 4);                         \
 470         OUT_RINGf ((sx)); OUT_RINGf ((sy));                                    \
 471         OUT_RINGf ((mx)); OUT_RINGf ((my));                                    \
 472         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2I(0), 1);                           \
 473         OUT_RING  (((dy)<<16)|(dx));                                           \
 474 } while(0)
 475 #define CV_OUT(sx,sy,dx,dy) do {                                               \
 476         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2F_X(8), 2);                         \
 477         OUT_RINGf ((sx)); OUT_RINGf ((sy));                                    \
 478         BEGIN_RING(Nv3D, NV40TCL_VTX_ATTR_2I(0), 1);                           \
 479         OUT_RING  (((dy)<<16)|(dx));                                           \
 480 } while(0)
 481
 482 void
 483 NV40EXAComposite(PixmapPtr pdPix, int srcX , int srcY,
 484                                   int maskX, int maskY,
 485                                   int dstX , int dstY,
 486                                   int width, int height)
 487 {
 488         ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum];
 489         NVPtr pNv = NVPTR(pScrn);
 490         float sX0, sX1, sX2, sY0, sY1, sY2;
 491         float mX0, mX1, mX2, mY0, mY1, mY2;
 492         NV40EXA_STATE;
 493
 494         /* We're drawing a triangle, we need to scissor it to a quad. */
 495         /* The scissors are here for a good reason, we don't get the full image, but just a part. */
 496         /* Handling the cliprects is done for us already. */
 497         BEGIN_RING(Nv3D, NV40TCL_SCISSOR_HORIZ, 2);
 498         OUT_RING  ((width << 16) | dstX);
 499         OUT_RING  ((height << 16) | dstY);
 500
 501         NV40EXATransformCoord(state->unit[0].transform,
 502                                 srcX, srcY - height,
 503                                 state->unit[0].width,
 504                                 state->unit[0].height, &sX0, &sY0);
 505         NV40EXATransformCoord(state->unit[0].transform,
 506                                 srcX, srcY + height,
 507                                 state->unit[0].width,
 508                                 state->unit[0].height, &sX1, &sY1);
 509         NV40EXATransformCoord(state->unit[0].transform,
 510                                 srcX + 2*width, srcY + height,
 511                                 state->unit[0].width,
 512                                 state->unit[0].height, &sX2, &sY2);
 513
 514         if (state->have_mask) {
 515                 NV40EXATransformCoord(state->unit[1].transform,
 516                                         maskX, maskY - height,
 517                                         state->unit[1].width,
 518                                         state->unit[1].height, &mX0, &mY0);
 519                 NV40EXATransformCoord(state->unit[1].transform,
 520                                         maskX, maskY + height,
 521                                         state->unit[1].width,
 522                                         state->unit[1].height, &mX1, &mY1);
 523                 NV40EXATransformCoord(state->unit[1].transform,
 524                                         maskX + 2*width, maskY + height,
 525                                         state->unit[1].width,
 526                                         state->unit[1].height, &mX2, &mY2);
 527
 528                 CV_OUTm(sX0 , sY0 , mX0, mY0, dstX                      ,       dstY - height);
 529                 CV_OUTm(sX1 , sY1 , mX1, mY1, dstX                      ,       dstY + height);
 530                 CV_OUTm(sX2 , sY2 , mX2, mY2, dstX + 2*width    ,       dstY + height);
 531         } else {
 532                 CV_OUT(sX0 , sY0 , dstX                 ,       dstY - height);
 533                 CV_OUT(sX1 , sY1 , dstX                 ,       dstY + height);
 534                 CV_OUT(sX2 , sY2 , dstX + 2*width       ,       dstY + height);
 535         }
 536
 537         FIRE_RING();
 538 }
 539
 540 void
 541 NV40EXADoneComposite(PixmapPtr pdPix)
 542 {
 543         ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum];
 544         NVPtr pNv = NVPTR(pScrn);
 545
 546         BEGIN_RING(Nv3D, NV40TCL_BEGIN_END, 1);
 547         OUT_RING  (NV40TCL_BEGIN_END_STOP);
 548 }
 549
 550 #define NV40TCL_CHIPSET_4X_MASK 0x00000baf
 551 #define NV44TCL_CHIPSET_4X_MASK 0x00005450
 552 Bool
 553 NVAccelInitNV40TCL(ScrnInfoPtr pScrn)
 554 {
 555         NVPtr pNv = NVPTR(pScrn);
 556         uint32_t class = 0, chipset;
 557         int i;
 558
 559         NV40EXAHackupA8Shaders(pScrn);
 560
 561         chipset = (nvReadMC(pNv, NV_PMC_BOOT_0) >> 20) & 0xff;
 562
 563         if ( (chipset & 0xf0) == NV_ARCH_40) {
 564                 chipset &= 0xf;
 565                 if (NV40TCL_CHIPSET_4X_MASK & (1<<chipset))
 566                         class = NV40TCL;
 567                 else if (NV44TCL_CHIPSET_4X_MASK & (1<<chipset))
 568                         class = NV44TCL;
 569                 else {
 570                         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 571                                         "NV40EXA: Unknown chipset NV4%1x\n", chipset);
 572                         return FALSE;
 573                 }
 574         } else if ( (chipset & 0xf0) == 0x60) {
 575                 class = NV44TCL;
 576         } else
 577                 return TRUE;
 578
 579         if (!pNv->Nv3D) {
 580                 if (nouveau_grobj_alloc(pNv->chan, Nv3D, class, &pNv->Nv3D))
 581                         return FALSE;
 582         }
 583
 584         BEGIN_RING(Nv3D, NV40TCL_DMA_NOTIFY, 1);
 585         OUT_RING  (pNv->notify0->handle);
 586         BEGIN_RING(Nv3D, NV40TCL_DMA_TEXTURE0, 2);
 587         OUT_RING  (pNv->chan->vram->handle);
 588         OUT_RING  (pNv->chan->gart->handle);
 589         BEGIN_RING(Nv3D, NV40TCL_DMA_COLOR0, 2);
 590         OUT_RING  (pNv->chan->vram->handle);
 591         OUT_RING  (pNv->chan->vram->handle);
 592
 593         /* voodoo */
 594         BEGIN_RING(Nv3D, 0x1ea4, 3);
 595         OUT_RING  (0x00000010);
 596         OUT_RING  (0x01000100);
 597         OUT_RING  (0xff800006);
 598         BEGIN_RING(Nv3D, 0x1fc4, 1);
 599         OUT_RING  (0x06144321);
 600         BEGIN_RING(Nv3D, 0x1fc8, 2);
 601         OUT_RING  (0xedcba987);
 602         OUT_RING  (0x00000021);
 603         BEGIN_RING(Nv3D, 0x1fd0, 1);
 604         OUT_RING  (0x00171615);
 605         BEGIN_RING(Nv3D, 0x1fd4, 1);
 606         OUT_RING  (0x001b1a19);
 607         BEGIN_RING(Nv3D, 0x1ef8, 1);
 608         OUT_RING  (0x0020ffff);
 609         BEGIN_RING(Nv3D, 0x1d64, 1);
 610         OUT_RING  (0x00d30000);
 611         BEGIN_RING(Nv3D, 0x1e94, 1);
 612         OUT_RING  (0x00000001);
 613
 614         /* This removes the the stair shaped tearing that i get. */
 615         /* Verified on one G70 card that it doesn't cause regressions for people without the problem. */
 616         /* The blob sets this up by default for NV43. */
 617         BEGIN_RING(Nv3D, 0x1450, 1);
 618         OUT_RING  (0x0000000F);
 619
 620         BEGIN_RING(Nv3D, NV40TCL_VIEWPORT_TRANSLATE_X, 8);
 621         OUT_RINGf (0.0);
 622         OUT_RINGf (0.0);
 623         OUT_RINGf (0.0);
 624         OUT_RINGf (0.0);
 625         OUT_RINGf (1.0);
 626         OUT_RINGf (1.0);
 627         OUT_RINGf (1.0);
 628         OUT_RINGf (0.0);
 629
 630         /* default 3D state */
 631         /*XXX: replace with the same state that the DRI emits on startup */
 632         BEGIN_RING(Nv3D, NV40TCL_STENCIL_FRONT_ENABLE, 1);
 633         OUT_RING  (0);
 634         BEGIN_RING(Nv3D, NV40TCL_STENCIL_BACK_ENABLE, 1);
 635         OUT_RING  (0);
 636         BEGIN_RING(Nv3D, NV40TCL_ALPHA_TEST_ENABLE, 1);
 637         OUT_RING  (0);
 638         BEGIN_RING(Nv3D, NV40TCL_DEPTH_WRITE_ENABLE, 2);
 639         OUT_RING  (0);
 640         OUT_RING  (0);
 641         BEGIN_RING(Nv3D, NV40TCL_COLOR_MASK, 1);
 642         OUT_RING  (0x01010101); /* TR,TR,TR,TR */
 643         BEGIN_RING(Nv3D, NV40TCL_CULL_FACE_ENABLE, 1);
 644         OUT_RING  (0);
 645         BEGIN_RING(Nv3D, NV40TCL_BLEND_ENABLE, 1);
 646         OUT_RING  (0);
 647         BEGIN_RING(Nv3D, NV40TCL_COLOR_LOGIC_OP_ENABLE, 2);
 648         OUT_RING  (0);
 649         OUT_RING  (NV40TCL_COLOR_LOGIC_OP_COPY);
 650         BEGIN_RING(Nv3D, NV40TCL_DITHER_ENABLE, 1);
 651         OUT_RING  (0);
 652         BEGIN_RING(Nv3D, NV40TCL_SHADE_MODEL, 1);
 653         OUT_RING  (NV40TCL_SHADE_MODEL_SMOOTH);
 654         BEGIN_RING(Nv3D, NV40TCL_POLYGON_OFFSET_FACTOR,2);
 655         OUT_RINGf (0.0);
 656         OUT_RINGf (0.0);
 657         BEGIN_RING(Nv3D, NV40TCL_POLYGON_MODE_FRONT, 2);
 658         OUT_RING  (NV40TCL_POLYGON_MODE_FRONT_FILL);
 659         OUT_RING  (NV40TCL_POLYGON_MODE_BACK_FILL);
 660         BEGIN_RING(Nv3D, NV40TCL_POLYGON_STIPPLE_PATTERN(0), 0x20);
 661         for (i=0;i<0x20;i++)
 662                 OUT_RING  (0xFFFFFFFF);
 663         for (i=0;i<16;i++) {
 664                 BEGIN_RING(Nv3D, NV40TCL_TEX_ENABLE(i), 1);
 665                 OUT_RING  (0);
 666         }
 667
 668         BEGIN_RING(Nv3D, 0x1d78, 1);
 669         OUT_RING  (0x110);
 670
 671         BEGIN_RING(Nv3D, NV40TCL_RT_ENABLE, 1);
 672         OUT_RING  (NV40TCL_RT_ENABLE_COLOR0);
 673
 674         BEGIN_RING(Nv3D, NV40TCL_RT_HORIZ, 2);
 675         OUT_RING  ((4096 << 16));
 676         OUT_RING  ((4096 << 16));
 677         BEGIN_RING(Nv3D, NV40TCL_SCISSOR_HORIZ, 2);
 678         OUT_RING  ((4096 << 16));
 679         OUT_RING  ((4096 << 16));
 680         BEGIN_RING(Nv3D, NV40TCL_VIEWPORT_HORIZ, 2);
 681         OUT_RING  ((4096 << 16));
 682         OUT_RING  ((4096 << 16));
 683         BEGIN_RING(Nv3D, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
 684         OUT_RING  ((4095 << 16));
 685         OUT_RING  ((4095 << 16));
 686
 687         return TRUE;
 688 }
 689