randr12: Older cards do have switchable CRTC's, i was again wrong.
[nouveau] / src / nv_output.c
1 /*
2  * Copyright 2006 Dave Airlie
3  * Copyright 2007 Maarten Maathuis
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  */
24 /*
25  * this code uses ideas taken from the NVIDIA nv driver - the nvidia license
26  * decleration is at the bottom of this file as it is rather ugly 
27  */
28
29 #ifdef HAVE_CONFIG_H
30 #include "config.h"
31 #endif
32
33 #include "xf86.h"
34 #include "os.h"
35 #include "mibank.h"
36 #include "globals.h"
37 #include "xf86.h"
38 #include "xf86Priv.h"
39 #include "xf86DDC.h"
40 #include "mipointer.h"
41 #include "windowstr.h"
42 #include <randrstr.h>
43 #include <X11/extensions/render.h>
44 #include "X11/Xatom.h"
45
46 #include "xf86Crtc.h"
47 #include "nv_include.h"
48
49 const char *OutputType[] = {
50     "None",
51     "VGA",
52     "DVI",
53     "LVDS",
54     "S-video",
55     "Composite",
56 };
57
58 const char *MonTypeName[7] = {
59     "AUTO",
60     "NONE",
61     "CRT",
62     "LVDS",
63     "TMDS",
64     "CTV",
65     "STV"
66 };
67
68 /* 
69  * TMDS registers are indirect 8 bit registers.
70  * Reading is straightforward, writing a bit odd.
71  * Reading: Write adress (+write protect bit, do not forget this), then read value.
72  * Writing: Write adress (+write protect bit), write value, write adress again and write it again (+write protect bit).
73  */
74
75 void NVWriteTMDS(NVPtr pNv, int ramdac, CARD32 tmds_reg, CARD32 val)
76 {
77         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL, 
78                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
79
80         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA, val & 0xff);
81
82         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL, tmds_reg & 0xff);
83         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL, 
84                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
85 }
86
87 CARD8 NVReadTMDS(NVPtr pNv, int ramdac, CARD32 tmds_reg)
88 {
89         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL, 
90                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
91
92         return (nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA) & 0xff);
93 }
94
95 /* Two register sets exist, this one is only used for dual link dvi/lvds */
96
97 void NVWriteTMDS2(NVPtr pNv, int ramdac, CARD32 tmds_reg, CARD32 val)
98 {
99         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2, 
100                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_2_WRITE_DISABLE);
101
102         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA_2, val & 0xff);
103
104         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2, tmds_reg & 0xff);
105         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2, 
106                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_2_WRITE_DISABLE);
107 }
108
109 CARD8 NVReadTMDS2(NVPtr pNv, int ramdac, CARD32 tmds_reg)
110 {
111         nvWriteRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_CONTROL_2, 
112                 (tmds_reg & 0xff) | NV_RAMDAC_FP_TMDS_CONTROL_2_WRITE_DISABLE);
113
114         return (nvReadRAMDAC(pNv, ramdac, NV_RAMDAC_FP_TMDS_DATA_2) & 0xff);
115 }
116
117 void NVOutputWriteTMDS(xf86OutputPtr output, CARD32 tmds_reg, CARD32 val)
118 {
119         NVOutputPrivatePtr nv_output = output->driver_private;
120         ScrnInfoPtr     pScrn = output->scrn;
121         NVPtr pNv = NVPTR(pScrn);
122
123         /* We must write to the "bus" of the output */
124         NVWriteTMDS(pNv, nv_output->preferred_output, tmds_reg, val);
125 }
126
127 CARD8 NVOutputReadTMDS(xf86OutputPtr output, CARD32 tmds_reg)
128 {
129         NVOutputPrivatePtr nv_output = output->driver_private;
130         ScrnInfoPtr     pScrn = output->scrn;
131         NVPtr pNv = NVPTR(pScrn);
132
133         /* We must read from the "bus" of the output */
134         return NVReadTMDS(pNv, nv_output->preferred_output, tmds_reg);
135 }
136
137 void NVOutputWriteTMDS2(xf86OutputPtr output, CARD32 tmds_reg, CARD32 val)
138 {
139         NVOutputPrivatePtr nv_output = output->driver_private;
140         ScrnInfoPtr     pScrn = output->scrn;
141         NVPtr pNv = NVPTR(pScrn);
142
143         /* We must write to the "bus" of the output */
144         NVWriteTMDS2(pNv, nv_output->preferred_output, tmds_reg, val);
145 }
146
147 CARD8 NVOutputReadTMDS2(xf86OutputPtr output, CARD32 tmds_reg)
148 {
149         NVOutputPrivatePtr nv_output = output->driver_private;
150         ScrnInfoPtr     pScrn = output->scrn;
151         NVPtr pNv = NVPTR(pScrn);
152
153         /* We must read from the "bus" of the output */
154         return NVReadTMDS2(pNv, nv_output->preferred_output, tmds_reg);
155 }
156
157 /* These functions now write into the output, instead of a specific ramdac */
158
159 void NVOutputWriteRAMDAC(xf86OutputPtr output, CARD32 ramdac_reg, CARD32 val)
160 {
161     NVOutputPrivatePtr nv_output = output->driver_private;
162     ScrnInfoPtr pScrn = output->scrn;
163     NVPtr pNv = NVPTR(pScrn);
164
165     nvWriteRAMDAC(pNv, nv_output->preferred_output, ramdac_reg, val);
166 }
167
168 CARD32 NVOutputReadRAMDAC(xf86OutputPtr output, CARD32 ramdac_reg)
169 {
170     NVOutputPrivatePtr nv_output = output->driver_private;
171     ScrnInfoPtr pScrn = output->scrn;
172     NVPtr pNv = NVPTR(pScrn);
173
174     return nvReadRAMDAC(pNv, nv_output->preferred_output, ramdac_reg);
175 }
176
177 static void dpms_update_output_ramdac(xf86OutputPtr output, int mode)
178 {
179         NVOutputPrivatePtr nv_output = output->driver_private;
180         ScrnInfoPtr pScrn = output->scrn;
181         NVPtr pNv = NVPTR(pScrn);
182         xf86CrtcPtr crtc = output->crtc;
183         if (!crtc)      /* we need nv_crtc, so give up */
184                 return;
185         NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
186
187         /* We may be going for modesetting, so we must reset our output binding */
188         if (mode == DPMSModeOff) {
189                 NVWriteVGACR5758(pNv, nv_crtc->head, 0, 0x7f);
190                 NVWriteVGACR5758(pNv, nv_crtc->head, 2, 0);
191                 return;
192         }
193
194         /* The previous call was not a modeset, but a normal dpms call */
195         NVWriteVGACR5758(pNv, nv_crtc->head, 0, pNv->dcb_table.entry[nv_output->dcb_entry].type);
196         NVWriteVGACR5758(pNv, nv_crtc->head, 2, pNv->dcb_table.entry[nv_output->dcb_entry].or);
197 }
198
199 static void
200 nv_lvds_output_dpms(xf86OutputPtr output, int mode)
201 {
202         NVOutputPrivatePtr nv_output = output->driver_private;
203         NVPtr pNv = NVPTR(output->scrn);
204         xf86CrtcPtr crtc = output->crtc;
205         if (!crtc)      /* we need nv_crtc, so give up */
206                 return;
207         NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
208
209         ErrorF("nv_lvds_output_dpms is called with mode %d\n", mode);
210
211         dpms_update_output_ramdac(output, mode);
212
213         if (!pNv->dcb_table.entry[nv_output->dcb_entry].lvdsconf.use_power_scripts)
214                 return;
215
216         switch (mode) {
217         case DPMSModeStandby:
218         case DPMSModeSuspend:
219                 call_lvds_script(output->scrn, nv_crtc->head, nv_output->dcb_entry, LVDS_BACKLIGHT_OFF, 0);
220                 break;
221         case DPMSModeOff:
222                 call_lvds_script(output->scrn, nv_crtc->head, nv_output->dcb_entry, LVDS_PANEL_OFF, 0);
223                 break;
224         case DPMSModeOn:
225                 call_lvds_script(output->scrn, nv_crtc->head, nv_output->dcb_entry, LVDS_PANEL_ON, 0);
226         default:
227                 break;
228         }
229 }
230
231 static void
232 nv_analog_output_dpms(xf86OutputPtr output, int mode)
233 {
234         xf86CrtcPtr crtc = output->crtc;
235
236         ErrorF("nv_analog_output_dpms is called with mode %d\n", mode);
237
238         dpms_update_output_ramdac(output, mode);
239
240         if (crtc) {
241                 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
242
243                 ErrorF("nv_analog_output_dpms is called for CRTC %d with mode %d\n", nv_crtc->crtc, mode);
244         }
245 }
246
247 static void
248 nv_tmds_output_dpms(xf86OutputPtr output, int mode)
249 {
250         xf86CrtcPtr crtc = output->crtc;
251         NVPtr pNv = NVPTR(output->scrn);
252
253         ErrorF("nv_tmds_output_dpms is called with mode %d\n", mode);
254
255         dpms_update_output_ramdac(output, mode);
256
257         /* Are we assigned a ramdac already?, else we will be activated during mode set */
258         if (crtc) {
259                 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
260
261                 ErrorF("nv_tmds_output_dpms is called for CRTC %d with mode %d\n", nv_crtc->crtc, mode);
262
263                 CARD32 fpcontrol = nvReadRAMDAC(pNv, nv_crtc->head, NV_RAMDAC_FP_CONTROL);
264                 switch(mode) {
265                         case DPMSModeStandby:
266                         case DPMSModeSuspend:
267                         case DPMSModeOff:
268                                 /* cut the TMDS output */           
269                                 fpcontrol |= 0x20000022;
270                                 break;
271                         case DPMSModeOn:
272                                 /* disable cutting the TMDS output */
273                                 fpcontrol &= ~0x20000022;
274                                 break;
275                 }
276                 nvWriteRAMDAC(pNv, nv_crtc->head, NV_RAMDAC_FP_CONTROL, fpcontrol);
277         }
278 }
279
280 void nv_output_save_state_ext(xf86OutputPtr output, RIVA_HW_STATE *state)
281 {
282         NVOutputPrivatePtr nv_output = output->driver_private;
283         NVOutputRegPtr regp;
284         int i;
285
286         regp = &state->dac_reg[nv_output->preferred_output];
287
288         regp->output = NVOutputReadRAMDAC(output, NV_RAMDAC_OUTPUT);
289
290         /* Store the registers in case we need them again for something (like data for VT restore) */
291         for (i = 0; i < 0xFF; i++) {
292                 regp->TMDS[i] = NVOutputReadTMDS(output, i);
293         }
294
295         for (i = 0; i < 0xFF; i++) {
296                 regp->TMDS2[i] = NVOutputReadTMDS2(output, i);
297         }
298 }
299
300 void nv_output_load_state_ext(xf86OutputPtr output, RIVA_HW_STATE *state, Bool override)
301 {
302         NVOutputPrivatePtr nv_output = output->driver_private;
303         NVOutputRegPtr regp;
304
305         regp = &state->dac_reg[nv_output->preferred_output];
306
307         /* This exists purely for proper text mode restore */
308         if (override) NVOutputWriteRAMDAC(output, NV_RAMDAC_OUTPUT, regp->output);
309 }
310
311 /* NOTE: Don't rely on this data for anything other than restoring VT's */
312
313 static void
314 nv_output_save (xf86OutputPtr output)
315 {
316         ScrnInfoPtr     pScrn = output->scrn;
317         NVPtr pNv = NVPTR(pScrn);
318         RIVA_HW_STATE *state;
319
320         ErrorF("nv_output_save is called\n");
321         state = &pNv->SavedReg;
322
323         /* Due to strange mapping of outputs we could have swapped analog and digital */
324         /* So we force save all the registers */
325         nv_output_save_state_ext(output, state);
326 }
327
328 uint32_t nv_calc_tmds_clock_from_pll(xf86OutputPtr output)
329 {
330         ScrnInfoPtr pScrn = output->scrn;
331         NVPtr pNv = NVPTR(pScrn);
332         RIVA_HW_STATE *state;
333         NVOutputRegPtr regp;
334         NVOutputPrivatePtr nv_output = output->driver_private;
335
336         state = &pNv->SavedReg;
337         /* Registers are stored by their preferred ramdac */
338         regp = &state->dac_reg[nv_output->preferred_output];
339
340         /* Only do it once for a dvi-d/dvi-a pair */
341         Bool swapped_clock = FALSE;
342         Bool vpllb_disabled = FALSE;
343         /* Bit3 swaps crtc (clocks are bound to crtc) and output */
344         if (regp->TMDS[0x4] & (1 << 3)) {
345                 swapped_clock = TRUE;
346         }
347
348         uint8_t vpll_num = swapped_clock ^ nv_output->preferred_output;
349
350         uint32_t vplla = 0;
351         uint32_t vpllb = 0;
352
353         /* For the moment the syntax is the same for NV40 and earlier */
354         if (pNv->Architecture == NV_ARCH_40) {
355                 vplla = vpll_num ? state->vpll2_a : state->vpll1_a;
356                 vpllb = vpll_num ? state->vpll2_b : state->vpll1_b;
357         } else {
358                 vplla = vpll_num ? state->vpll2 : state->vpll;
359                 if (pNv->twoStagePLL)
360                         vpllb = vpll_num ? state->vpll2B : state->vpllB;
361         }
362
363         if (!pNv->twoStagePLL)
364                 vpllb_disabled = TRUE;
365
366         /* This is the dummy value nvidia sets when vpll is disabled */
367         if ((vpllb & 0xFFFF) == 0x11F)
368                 vpllb_disabled = TRUE;
369
370         uint8_t m1, m2, n1, n2, p;
371
372         m1 = vplla & 0xFF;
373         n1 = (vplla >> 8) & 0xFF;
374         p = (vplla >> 16) & 0x7;
375
376         if (vpllb_disabled) {
377                 m2 = 1;
378                 n2 = 1;
379         } else {
380                 m2 = vpllb & 0xFF;
381                 n2 = (vpllb >> 8) & 0xFF;
382         }
383
384         uint32_t clock = ((pNv->CrystalFreqKHz * n1 * n2)/(m1 * m2)) >> p;
385         ErrorF("The original bios clock seems to have been %d kHz\n", clock);
386         return clock;
387 }
388
389 void nv_set_tmds_registers(xf86OutputPtr output, uint32_t clock, Bool override, Bool crosswired)
390 {
391         ScrnInfoPtr pScrn = output->scrn;
392         NVOutputPrivatePtr nv_output = output->driver_private;
393         xf86CrtcPtr crtc = output->crtc;
394         /* We have no crtc, so what are we supposed to do now? */
395         /* This can only happen during VT restore */
396         if (crtc && !override) {
397                 NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
398                 /*
399                  * Resetting all registers is a bad idea, it seems to work fine without it.
400                  */
401                 if (nv_output->type == OUTPUT_TMDS)
402                         run_tmds_table(pScrn, nv_output->dcb_entry, nv_crtc->head, clock/10);
403                 else
404                         call_lvds_script(pScrn, nv_crtc->head, nv_output->dcb_entry, LVDS_RESET, clock / 10);
405         } else {
406                 /*
407                  * We have no crtc, but we do know what output we are and if we were crosswired.
408                  * We can determine our crtc from this.
409                  */
410                 if (nv_output->type == OUTPUT_TMDS)
411                         run_tmds_table(pScrn, nv_output->dcb_entry, nv_output->preferred_output ^ crosswired, clock/10);
412                 else {
413                         call_lvds_script(pScrn, nv_output->preferred_output ^ crosswired, nv_output->dcb_entry, LVDS_RESET, clock / 10);
414                         call_lvds_script(pScrn, nv_output->preferred_output ^ crosswired, nv_output->dcb_entry, LVDS_PANEL_ON, 0);
415                 }
416         }
417 }
418
419 static void
420 nv_output_restore (xf86OutputPtr output)
421 {
422         ScrnInfoPtr pScrn = output->scrn;
423         NVPtr pNv = NVPTR(pScrn);
424         RIVA_HW_STATE *state;
425         NVOutputPrivatePtr nv_output = output->driver_private;
426         NVOutputRegPtr regp;
427         ErrorF("nv_output_restore is called\n");
428
429         state = &pNv->SavedReg;
430         regp = &state->dac_reg[nv_output->preferred_output];
431
432         /* Due to strange mapping of outputs we could have swapped analog and digital */
433         /* So we force load all the registers */
434         nv_output_load_state_ext(output, state, TRUE);
435 }
436
437 static int
438 nv_output_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
439 {
440         if (pMode->Flags & V_DBLSCAN)
441                 return MODE_NO_DBLESCAN;
442
443         if (pMode->Clock > 400000 || pMode->Clock < 25000)
444                 return MODE_CLOCK_RANGE;
445
446         return MODE_OK;
447 }
448
449
450 static Bool
451 nv_output_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
452                      DisplayModePtr adjusted_mode)
453 {
454         ErrorF("nv_output_mode_fixup is called\n");
455
456         return TRUE;
457 }
458
459 static void
460 nv_output_mode_set_regs(xf86OutputPtr output, DisplayModePtr mode, DisplayModePtr adjusted_mode)
461 {
462         NVOutputPrivatePtr nv_output = output->driver_private;
463         ScrnInfoPtr pScrn = output->scrn;
464         //RIVA_HW_STATE *state;
465         //NVOutputRegPtr regp, savep;
466         Bool is_fp = FALSE;
467         xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
468         int i;
469
470         /* It's getting quiet here, not removing function just yet, we may still need it */
471
472         //state = &pNv->ModeReg;
473         //regp = &state->dac_reg[nv_output->preferred_output];
474
475         if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS)
476                 is_fp = TRUE;
477
478         if (output->crtc) {
479                 NVCrtcPrivatePtr nv_crtc = output->crtc->driver_private;
480                 int two_crt = FALSE;
481                 int two_mon = FALSE;
482
483                 for (i = 0; i < config->num_output; i++) {
484                         NVOutputPrivatePtr nv_output2 = config->output[i]->driver_private;
485
486                         /* is it this output ?? */
487                         if (config->output[i] == output)
488                                 continue;
489
490                         /* it the output connected */
491                         if (config->output[i]->crtc == NULL)
492                                 continue;
493
494                         two_mon = TRUE;
495                         if ((nv_output2->type == OUTPUT_ANALOG) && (nv_output->type == OUTPUT_ANALOG)) {
496                                 two_crt = TRUE;
497                         }
498                 }
499
500                 ErrorF("%d: crtc %d output %d twocrt %d twomon %d\n", is_fp, nv_crtc->crtc, nv_output->preferred_output, two_crt, two_mon);
501         }
502 }
503
504 static Bool 
505 nv_have_duallink(ScrnInfoPtr    pScrn)
506 {
507         xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
508         NVPtr pNv = NVPTR(pScrn);
509         int i;
510
511         for (i = 0; i < xf86_config->num_output; i++) {
512                 xf86OutputPtr output = xf86_config->output[i];
513                 NVOutputPrivatePtr nv_output = output->driver_private;
514                 if (pNv->dcb_table.entry[nv_output->dcb_entry].duallink_possible)
515                         return TRUE;
516         }
517
518         return FALSE;
519 }
520
521 static void
522 nv_output_mode_set_routing(xf86OutputPtr output)
523 {
524         NVOutputPrivatePtr nv_output = output->driver_private;
525         xf86CrtcPtr crtc = output->crtc;
526         NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
527         ScrnInfoPtr     pScrn = output->scrn;
528         NVPtr pNv = NVPTR(pScrn);
529         Bool is_fp = FALSE;
530
531         uint32_t output_reg[2] = {0, 0};
532
533         if ((nv_output->type == OUTPUT_LVDS) || (nv_output->type == OUTPUT_TMDS)) {
534                 is_fp = TRUE;
535         }
536
537         if (pNv->Architecture == NV_ARCH_40) {
538                 /* NV4x cards have strange ways of dealing with dualhead */
539                 /* Also see reg594 in nv_crtc.c */
540                 output_reg[0] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
541                 /* This seems to be restricted to dual link outputs. */
542                 /* Some cards have secondary outputs with ffs(or) != 3. */
543                 if (nv_have_duallink(pScrn) || pNv->restricted_mode)
544                         output_reg[1] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
545         } else {
546                 /* This is for simplicity */
547                 output_reg[0] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
548                 output_reg[1] = NV_RAMDAC_OUTPUT_DAC_ENABLE;
549         }
550
551         /* Some pre-NV30 cards have switchable crtc's. */
552         if (pNv->switchable_crtc) {
553                 if (pNv->restricted_mode) { /* some NV4A for example */
554                         if (nv_output->preferred_output != nv_crtc->head) {
555                                 output_reg[0] |= NV_RAMDAC_OUTPUT_SELECT_CRTC1;
556                         } else {
557                                 output_reg[1] |= NV_RAMDAC_OUTPUT_SELECT_CRTC1;
558                         }
559                 } else {
560                         output_reg[1] |= NV_RAMDAC_OUTPUT_SELECT_CRTC1;
561                         /* Does this have something to do with outputs that have ffs(or) == 1? */
562                         /* I suspect this bit represents more than just a crtc switch. */
563                         if (nv_crtc->head != nv_output->preferred_output) {
564                                 output_reg[0] |= NV_RAMDAC_OUTPUT_SELECT_CRTC1;
565                         }
566                 }
567         }
568
569         /* The registers can't be considered seperately on most cards */
570         nvWriteRAMDAC(pNv, 0, NV_RAMDAC_OUTPUT, output_reg[0]);
571         nvWriteRAMDAC(pNv, 1, NV_RAMDAC_OUTPUT, output_reg[1]);
572
573         /* This could use refinement for flatpanels, but it should work this way */
574         if (pNv->NVArch < 0x44) {
575                 nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, 0xf0000000);
576                 if (pNv->Architecture == NV_ARCH_40)
577                         nvWriteRAMDAC(pNv, 0, NV_RAMDAC_670, 0xf0000000);
578         } else {
579                 nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, 0x00100000);
580                 nvWriteRAMDAC(pNv, 0, NV_RAMDAC_670, 0x00100000);
581         }
582 }
583
584 static void
585 nv_output_mode_set(xf86OutputPtr output, DisplayModePtr mode,
586                    DisplayModePtr adjusted_mode)
587 {
588         ScrnInfoPtr pScrn = output->scrn;
589         NVPtr pNv = NVPTR(pScrn);
590         NVOutputPrivatePtr nv_output = output->driver_private;
591         RIVA_HW_STATE *state;
592
593         ErrorF("nv_output_mode_set is called\n");
594
595         state = &pNv->ModeReg;
596
597         nv_output_mode_set_regs(output, mode, adjusted_mode);
598         nv_output_load_state_ext(output, state, FALSE);
599         if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS)
600                 nv_set_tmds_registers(output, adjusted_mode->Clock, FALSE, FALSE);
601
602         nv_output_mode_set_routing(output);
603 }
604
605 static xf86MonPtr
606 nv_get_edid(xf86OutputPtr output)
607 {
608         /* no use for shared DDC output */
609         NVOutputPrivatePtr nv_output = output->driver_private;
610         xf86MonPtr ddc_mon;
611
612         if (nv_output->pDDCBus == NULL)
613                 return NULL;
614
615         ddc_mon = xf86OutputGetEDID(output, nv_output->pDDCBus);
616         if (!ddc_mon)
617                 return NULL;
618
619         if (ddc_mon->features.input_type && (nv_output->type == OUTPUT_ANALOG))
620                 goto invalid;
621
622         if ((!ddc_mon->features.input_type) && (nv_output->type == OUTPUT_TMDS ||
623                                 nv_output->type == OUTPUT_LVDS))
624                 goto invalid;
625
626         return ddc_mon;
627
628 invalid:
629         xfree(ddc_mon);
630         return NULL;
631 }
632
633 static Bool
634 nv_ddc_detect(xf86OutputPtr output)
635 {
636         xf86MonPtr m = nv_get_edid(output);
637
638         if (m == NULL)
639                 return FALSE;
640
641         xfree(m);
642         return TRUE;
643 }
644
645 static Bool
646 nv_crt_load_detect(xf86OutputPtr output)
647 {
648         ScrnInfoPtr pScrn = output->scrn;
649         NVOutputPrivatePtr nv_output = output->driver_private;
650         NVPtr pNv = NVPTR(pScrn);
651         CARD32 reg_output, reg_test_ctrl, temp;
652         Bool present = FALSE;
653
654         /* For some reason we get false positives on output 1, maybe due tv-out? */
655         if (nv_output->preferred_output == 1) {
656                 return FALSE;
657         }
658
659         if (nv_output->pDDCBus != NULL) {
660                 xf86MonPtr ddc_mon = xf86OutputGetEDID(output, nv_output->pDDCBus);
661                 /* Is there a digital flatpanel on this channel? */
662                 if (ddc_mon && ddc_mon->features.input_type) {
663                         return FALSE;
664                 }
665         }
666
667         reg_output = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT);
668         reg_test_ctrl = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL);
669
670         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, (reg_test_ctrl & ~0x00010000));
671
672         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT, (reg_output & 0x0000FEEE));
673         usleep(1000);
674
675         temp = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT);
676         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT, temp | 1);
677
678         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_DATA, 0x94050140);
679         temp = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL);
680         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, temp | 0x1000);
681
682         usleep(1000);
683
684         present = (nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL) & (1 << 28)) ? TRUE : FALSE;
685
686         temp = NVOutputReadRAMDAC(output, NV_RAMDAC_TEST_CONTROL);
687         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, temp & 0x000EFFF);
688
689         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_OUTPUT, reg_output);
690         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_TEST_CONTROL, reg_test_ctrl);
691
692         if (present) {
693                 ErrorF("A crt was detected on output %d with no ddc support\n", nv_output->preferred_output);
694                 return TRUE;
695         }
696
697         return FALSE;
698 }
699
700 static xf86OutputStatus
701 nv_tmds_output_detect(xf86OutputPtr output)
702 {
703         ErrorF("nv_tmds_output_detect is called\n");
704
705         if (nv_ddc_detect(output))
706                 return XF86OutputStatusConnected;
707
708         return XF86OutputStatusDisconnected;
709 }
710
711
712 static xf86OutputStatus
713 nv_analog_output_detect(xf86OutputPtr output)
714 {
715         ErrorF("nv_analog_output_detect is called\n");
716
717         if (nv_ddc_detect(output))
718                 return XF86OutputStatusConnected;
719
720         if (nv_crt_load_detect(output))
721                 return XF86OutputStatusConnected;
722
723         return XF86OutputStatusDisconnected;
724 }
725
726 static DisplayModePtr
727 nv_output_get_modes(xf86OutputPtr output)
728 {
729         NVOutputPrivatePtr nv_output = output->driver_private;
730         xf86MonPtr ddc_mon;
731         DisplayModePtr ddc_modes;
732
733         ErrorF("nv_output_get_modes is called\n");
734
735         ddc_mon = nv_get_edid(output);
736
737         xf86OutputSetEDID(output, ddc_mon);
738
739         if (ddc_mon == NULL)
740                 return NULL;
741
742         ddc_modes = xf86OutputGetEDIDModes (output);
743
744         if (nv_output->type == OUTPUT_TMDS || nv_output->type == OUTPUT_LVDS) {
745                 int i;
746                 DisplayModePtr mode;
747
748                 for (i = 0; i < 4; i++) {
749                         /* We only look at detailed timings atm */
750                         if (ddc_mon->det_mon[i].type != DT)
751                                 continue;
752                         /* Selecting only based on width ok? */
753                         if (ddc_mon->det_mon[i].section.d_timings.h_active > nv_output->fpWidth) {
754                                 nv_output->fpWidth = ddc_mon->det_mon[i].section.d_timings.h_active;
755                                 nv_output->fpHeight = ddc_mon->det_mon[i].section.d_timings.v_active;
756                         }
757                 }
758
759                 /* Add a native resolution mode that is preferred */
760                 /* Reduced blanking should be fine on DVI monitor */
761                 nv_output->native_mode = xf86CVTMode(nv_output->fpWidth, nv_output->fpHeight, 60.0, TRUE, FALSE);
762                 nv_output->native_mode->type = M_T_DRIVER | M_T_PREFERRED;
763
764                 if (output->funcs->mode_valid(output, nv_output->native_mode) == MODE_OK) {
765                         /* We want the new mode to be preferred */
766                         for (mode = ddc_modes; mode != NULL; mode = mode->next) {
767                                 if (mode->type & M_T_PREFERRED) {
768                                         mode->type &= ~M_T_PREFERRED;
769                                 }
770                         }
771                         ddc_modes = xf86ModesAdd(ddc_modes, nv_output->native_mode);
772                 } else { /* invalid mode */
773                         nv_output->native_mode = NULL;
774                         for (mode = ddc_modes; mode != NULL; mode = mode->next) {
775                                 if (mode->HDisplay == nv_output->fpWidth &&
776                                         mode->VDisplay == nv_output->fpHeight) {
777
778                                         nv_output->native_mode = mode;
779                                         break;
780                                 }
781                         }
782                         if (!nv_output->native_mode) {
783                                 ErrorF("Really bad stuff happening, CVT mode bad and no other native mode can be found.\n");
784                                 ErrorF("Bailing out\n");
785                                 return NULL;
786                         } else {
787                                 ErrorF("CVT mode was invalid(=bad), but another mode was found\n");
788                         }
789                 }
790         }
791
792         return ddc_modes;
793 }
794
795 static void
796 nv_output_destroy (xf86OutputPtr output)
797 {
798         ErrorF("nv_output_destroy is called\n");
799         if (output->driver_private)
800                 xfree (output->driver_private);
801 }
802
803 static void
804 nv_output_prepare(xf86OutputPtr output)
805 {
806         ErrorF("nv_output_prepare is called\n");
807         NVOutputPrivatePtr nv_output = output->driver_private;
808         ScrnInfoPtr pScrn = output->scrn;
809         xf86CrtcPtr crtc = output->crtc;
810         NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
811         NVPtr pNv = NVPTR(pScrn);
812
813         output->funcs->dpms(output, DPMSModeOff);
814
815         /* Shut down the tmds pll, a short sleep period will happen at crtc prepare. */
816         uint32_t debug0 = nvReadRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_FP_DEBUG_0) | 
817                                                 NV_RAMDAC_FP_DEBUG_0_PWRDOWN_TMDS_PLL;
818         nvWriteRAMDAC(pNv, nv_output->preferred_output, NV_RAMDAC_FP_DEBUG_0, debug0);
819
820         /* Set our output type and output routing possibilities to the right registers */
821         NVWriteVGACR5758(pNv, nv_crtc->head, 0, pNv->dcb_table.entry[nv_output->dcb_entry].type);
822         NVWriteVGACR5758(pNv, nv_crtc->head, 2, pNv->dcb_table.entry[nv_output->dcb_entry].or);
823 }
824
825 static void
826 nv_output_commit(xf86OutputPtr output)
827 {
828         ErrorF("nv_output_commit is called\n");
829
830         output->funcs->dpms(output, DPMSModeOn);
831 }
832
833 static const xf86OutputFuncsRec nv_analog_output_funcs = {
834     .dpms = nv_analog_output_dpms,
835     .save = nv_output_save,
836     .restore = nv_output_restore,
837     .mode_valid = nv_output_mode_valid,
838     .mode_fixup = nv_output_mode_fixup,
839     .mode_set = nv_output_mode_set,
840     .detect = nv_analog_output_detect,
841     .get_modes = nv_output_get_modes,
842     .destroy = nv_output_destroy,
843     .prepare = nv_output_prepare,
844     .commit = nv_output_commit,
845 };
846
847 #ifdef RANDR_12_INTERFACE
848 /*
849  * Several scaling modes exist, let the user choose.
850  */
851 #define SCALING_MODE_NAME "SCALING_MODE"
852 static const struct {
853         char *name;
854         enum scaling_modes mode;
855 } scaling_mode[] = {
856         { "panel", SCALE_PANEL },
857         { "fullscreen", SCALE_FULLSCREEN },
858         { "aspect", SCALE_ASPECT },
859         { "noscale", SCALE_NOSCALE },
860         { NULL, SCALE_INVALID}
861 };
862 static Atom scaling_mode_atom;
863
864 static int
865 nv_scaling_mode_lookup(char *name, int size)
866 {
867         int i;
868
869         /* for when name is zero terminated */
870         if (size < 0)
871                 size = strlen(name);
872
873         for (i = 0; scaling_mode[i].name; i++)
874                 /* We're getting non-terminated strings */
875                 if (strlen(scaling_mode[i].name) >= size &&
876                                 !strncasecmp(name, scaling_mode[i].name, size))
877                         break;
878
879         return scaling_mode[i].mode;
880 }
881
882 static void
883 nv_digital_output_create_resources(xf86OutputPtr output)
884 {
885         NVOutputPrivatePtr nv_output = output->driver_private;
886         ScrnInfoPtr pScrn = output->scrn;
887         int error, i;
888
889         /*
890          * Setup scaling mode property.
891          */
892         scaling_mode_atom = MakeAtom(SCALING_MODE_NAME, sizeof(SCALING_MODE_NAME) - 1, TRUE);
893
894         error = RRConfigureOutputProperty(output->randr_output,
895                                         scaling_mode_atom, TRUE, FALSE, FALSE,
896                                         0, NULL);
897
898         if (error != 0) {
899                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
900                         "RRConfigureOutputProperty error, %d\n", error);
901         }
902
903         char *existing_scale_name = NULL;
904         for (i = 0; scaling_mode[i].name; i++)
905                 if (scaling_mode[i].mode == nv_output->scaling_mode)
906                         existing_scale_name = scaling_mode[i].name;
907
908         error = RRChangeOutputProperty(output->randr_output, scaling_mode_atom,
909                                         XA_STRING, 8, PropModeReplace, 
910                                         strlen(existing_scale_name),
911                                         existing_scale_name, FALSE, TRUE);
912
913         if (error != 0) {
914                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
915                         "Failed to set scaling mode, %d\n", error);
916         }
917 }
918
919 static Bool
920 nv_digital_output_set_property(xf86OutputPtr output, Atom property,
921                                 RRPropertyValuePtr value)
922 {
923         NVOutputPrivatePtr nv_output = output->driver_private;
924
925         if (property == scaling_mode_atom) {
926                 int32_t ret;
927                 char *name = NULL;
928
929                 if (value->type != XA_STRING || value->format != 8)
930                         return FALSE;
931
932                 name = (char *) value->data;
933
934                 /* Match a string to a scaling mode */
935                 ret = nv_scaling_mode_lookup(name, value->size);
936                 if (ret == SCALE_INVALID)
937                         return FALSE;
938
939                 nv_output->scaling_mode = ret;
940                 return TRUE;
941         }
942
943         return TRUE;
944 }
945
946 #endif /* RANDR_12_INTERFACE */
947
948 static int 
949 nv_tmds_output_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
950 {
951         NVOutputPrivatePtr nv_output = output->driver_private;
952
953         /* We can't exceed the native mode.*/
954         if (pMode->HDisplay > nv_output->fpWidth || pMode->VDisplay > nv_output->fpHeight)
955                 return MODE_PANEL;
956
957         return nv_output_mode_valid(output, pMode);
958 }
959
960 static const xf86OutputFuncsRec nv_tmds_output_funcs = {
961         .dpms = nv_tmds_output_dpms,
962         .save = nv_output_save,
963         .restore = nv_output_restore,
964         .mode_valid = nv_tmds_output_mode_valid,
965         .mode_fixup = nv_output_mode_fixup,
966         .mode_set = nv_output_mode_set,
967         .detect = nv_tmds_output_detect,
968         .get_modes = nv_output_get_modes,
969         .destroy = nv_output_destroy,
970         .prepare = nv_output_prepare,
971         .commit = nv_output_commit,
972 #ifdef RANDR_12_INTERFACE
973         .create_resources = nv_digital_output_create_resources,
974         .set_property = nv_digital_output_set_property,
975 #endif /* RANDR_12_INTERFACE */
976 };
977
978 static int nv_lvds_output_mode_valid
979 (xf86OutputPtr output, DisplayModePtr pMode)
980 {
981         NVOutputPrivatePtr nv_output = output->driver_private;
982
983         /* No modes > panel's native res */
984         if (pMode->HDisplay > nv_output->fpWidth || pMode->VDisplay > nv_output->fpHeight)
985                 return MODE_PANEL;
986
987         return nv_output_mode_valid(output, pMode);
988 }
989
990 static xf86OutputStatus
991 nv_lvds_output_detect(xf86OutputPtr output)
992 {
993         ScrnInfoPtr pScrn = output->scrn;
994         NVPtr pNv = NVPTR(pScrn);
995         NVOutputPrivatePtr nv_output = output->driver_private;
996
997         if (pNv->dcb_table.entry[nv_output->dcb_entry].lvdsconf.use_straps_for_mode &&
998             pNv->VBIOS.fp.native_mode)
999                 return XF86OutputStatusConnected;
1000         if (nv_ddc_detect(output))
1001                 return XF86OutputStatusConnected;
1002
1003         return XF86OutputStatusDisconnected;
1004 }
1005
1006 static DisplayModePtr
1007 nv_lvds_output_get_modes(xf86OutputPtr output)
1008 {
1009         ScrnInfoPtr pScrn = output->scrn;
1010         NVPtr pNv = NVPTR(pScrn);
1011         NVOutputPrivatePtr nv_output = output->driver_private;
1012         DisplayModePtr modes;
1013
1014         if ((modes = nv_output_get_modes(output)))
1015                 return modes;
1016
1017         /* it is possible to set up a mode from what we can read from the
1018          * RAMDAC registers, but if we can't read the BIOS table correctly
1019          * we might as well give up */
1020         if (!pNv->dcb_table.entry[nv_output->dcb_entry].lvdsconf.use_straps_for_mode ||
1021             (pNv->VBIOS.fp.native_mode == NULL))
1022                 return NULL;
1023
1024         nv_output->fpWidth = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_HDISP_END) + 1;
1025         nv_output->fpHeight = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_VDISP_END) + 1;
1026         nv_output->fpSyncs = NVOutputReadRAMDAC(output, NV_RAMDAC_FP_CONTROL) & 0x30000033;
1027
1028         if (pNv->VBIOS.fp.native_mode->HDisplay != nv_output->fpWidth ||
1029                 pNv->VBIOS.fp.native_mode->VDisplay != nv_output->fpHeight) {
1030                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1031                         "Panel size mismatch; ignoring RAMDAC\n");
1032                 nv_output->fpWidth = pNv->VBIOS.fp.native_mode->HDisplay;
1033                 nv_output->fpHeight = pNv->VBIOS.fp.native_mode->VDisplay;
1034         }
1035
1036         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Panel size is %u x %u\n",
1037                 nv_output->fpWidth, nv_output->fpHeight);
1038
1039         nv_output->native_mode = xf86DuplicateMode(pNv->VBIOS.fp.native_mode);
1040
1041         return xf86DuplicateMode(pNv->VBIOS.fp.native_mode);
1042 }
1043
1044 static const xf86OutputFuncsRec nv_lvds_output_funcs = {
1045         .dpms = nv_lvds_output_dpms,
1046         .save = nv_output_save,
1047         .restore = nv_output_restore,
1048         .mode_valid = nv_lvds_output_mode_valid,
1049         .mode_fixup = nv_output_mode_fixup,
1050         .mode_set = nv_output_mode_set,
1051         .detect = nv_lvds_output_detect,
1052         .get_modes = nv_lvds_output_get_modes,
1053         .destroy = nv_output_destroy,
1054         .prepare = nv_output_prepare,
1055         .commit = nv_output_commit,
1056 #ifdef RANDR_12_INTERFACE
1057         .create_resources = nv_digital_output_create_resources,
1058         .set_property = nv_digital_output_set_property,
1059 #endif /* RANDR_12_INTERFACE */
1060 };
1061
1062 static void nv_add_analog_output(ScrnInfoPtr pScrn, int dcb_entry, Bool dvi_pair)
1063 {
1064         NVPtr pNv = NVPTR(pScrn);
1065         xf86OutputPtr       output;
1066         NVOutputPrivatePtr    nv_output;
1067         char outputname[20];
1068         Bool create_output = TRUE;
1069         int i2c_index = pNv->dcb_table.entry[dcb_entry].i2c_index;
1070
1071         /* DVI have an analog connector and a digital one, differentiate between that and a normal vga */
1072         if (dvi_pair) {
1073                 sprintf(outputname, "DVI-A-%d", pNv->dvi_a_count);
1074                 pNv->dvi_a_count++;
1075         } else {
1076                 sprintf(outputname, "VGA-%d", pNv->vga_count);
1077                 pNv->vga_count++;
1078         }
1079
1080         nv_output = xnfcalloc (sizeof (NVOutputPrivateRec), 1);
1081         if (!nv_output) {
1082                 return;
1083         }
1084
1085         nv_output->dcb_entry = dcb_entry;
1086
1087         if (pNv->dcb_table.i2c_read[i2c_index] && pNv->pI2CBus[i2c_index] == NULL)
1088                 NV_I2CInit(pScrn, &pNv->pI2CBus[i2c_index], pNv->dcb_table.i2c_read[i2c_index], xstrdup(outputname));
1089
1090         nv_output->type = OUTPUT_ANALOG;
1091
1092         /* output route:
1093          * bit0: OUTPUT_0 valid
1094          * bit1: OUTPUT_1 valid
1095          * So lowest order has highest priority.
1096          * Below is guesswork:
1097          * bit2: All outputs valid
1098          */
1099         /* This also facilitates proper output routing for dvi */
1100         /* See sel_clk assignment in nv_crtc.c */
1101         if (ffs(pNv->dcb_table.entry[dcb_entry].or) & OUTPUT_1) {
1102                 nv_output->preferred_output = 1;
1103         } else {
1104                 nv_output->preferred_output = 0;
1105         }
1106
1107         nv_output->bus = pNv->dcb_table.entry[dcb_entry].bus;
1108
1109         if (!create_output) {
1110                 xfree(nv_output);
1111                 return;
1112         }
1113
1114         /* Delay creation of output until we actually know we want it */
1115         output = xf86OutputCreate (pScrn, &nv_analog_output_funcs, outputname);
1116         if (!output)
1117                 return;
1118
1119         output->driver_private = nv_output;
1120
1121         nv_output->pDDCBus = pNv->pI2CBus[i2c_index];
1122
1123         if (pNv->switchable_crtc) {
1124                 output->possible_crtcs = pNv->dcb_table.entry[dcb_entry].heads;
1125         } else {
1126                 output->possible_crtcs = (1 << nv_output->preferred_output);
1127         }
1128
1129         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Adding output %s\n", outputname);
1130 }
1131
1132 static void nv_add_digital_output(ScrnInfoPtr pScrn, int dcb_entry, int lvds)
1133 {
1134         NVPtr pNv = NVPTR(pScrn);
1135         xf86OutputPtr       output;
1136         NVOutputPrivatePtr    nv_output;
1137         char outputname[20];
1138         Bool create_output = TRUE;
1139         int i2c_index = pNv->dcb_table.entry[dcb_entry].i2c_index;
1140
1141         if (lvds) {
1142                 sprintf(outputname, "LVDS-%d", pNv->lvds_count);
1143                 pNv->lvds_count++;
1144         } else {
1145                 sprintf(outputname, "DVI-D-%d", pNv->dvi_d_count);
1146                 pNv->dvi_d_count++;
1147         }
1148
1149         nv_output = xnfcalloc (sizeof (NVOutputPrivateRec), 1);
1150
1151         if (!nv_output) {
1152                 return;
1153         }
1154
1155         nv_output->dcb_entry = dcb_entry;
1156
1157         if (pNv->dcb_table.i2c_read[i2c_index] && pNv->pI2CBus[i2c_index] == NULL)
1158                 NV_I2CInit(pScrn, &pNv->pI2CBus[i2c_index], pNv->dcb_table.i2c_read[i2c_index], xstrdup(outputname));
1159
1160         nv_output->pDDCBus = pNv->pI2CBus[i2c_index];
1161
1162         /* output route:
1163          * bit0: OUTPUT_0 valid
1164          * bit1: OUTPUT_1 valid
1165          * So lowest order has highest priority.
1166          * Below is guesswork:
1167          * bit2: All outputs valid
1168          */
1169         /* This also facilitates proper output routing for dvi */
1170         /* See sel_clk assignment in nv_crtc.c */
1171         if (ffs(pNv->dcb_table.entry[dcb_entry].or) & OUTPUT_1) {
1172                 nv_output->preferred_output = 1;
1173         } else {
1174                 nv_output->preferred_output = 0;
1175         }
1176
1177         nv_output->bus = pNv->dcb_table.entry[dcb_entry].bus;
1178
1179         if (lvds) {
1180                 nv_output->type = OUTPUT_LVDS;
1181                 /* comment below two lines to test LVDS under RandR12.
1182                  * If your screen "blooms" or "bleeds" (i.e. has a developing
1183                  * white / psychedelic pattern) then KILL X IMMEDIATELY
1184                  * (ctrl+alt+backspace) & if the effect continues reset power */
1185                 ErrorF("Output refused because we don't accept LVDS at the moment.\n");
1186                 create_output = FALSE;
1187         } else {
1188                 nv_output->type = OUTPUT_TMDS;
1189         }
1190
1191         if (!create_output) {
1192                 xfree(nv_output);
1193                 return;
1194         }
1195
1196         /* Delay creation of output until we are certain is desirable */
1197         if (lvds)
1198                 output = xf86OutputCreate (pScrn, &nv_lvds_output_funcs, outputname);
1199         else
1200                 output = xf86OutputCreate (pScrn, &nv_tmds_output_funcs, outputname);
1201         if (!output)
1202                 return;
1203
1204         output->driver_private = nv_output;
1205
1206         if (pNv->fpScaler) /* GPU Scaling */
1207                 nv_output->scaling_mode = SCALE_ASPECT;
1208         else /* Panel scaling */
1209                 nv_output->scaling_mode = SCALE_PANEL;
1210
1211 #ifdef RANDR_12_INTERFACE
1212         if (xf86GetOptValString(pNv->Options, OPTION_SCALING_MODE)) {
1213                 nv_output->scaling_mode = nv_scaling_mode_lookup(xf86GetOptValString(pNv->Options, OPTION_SCALING_MODE), -1);
1214                 if (nv_output->scaling_mode == SCALE_INVALID)
1215                         nv_output->scaling_mode = SCALE_ASPECT; /* default */
1216         }
1217 #endif /* RANDR_12_INTERFACE */
1218
1219         /* Due to serious problems we have to restrict the crtc's for certain types of outputs. */
1220         /* This is a result of problems with G70 cards that have a dvi with ffs(or) == 1 */
1221         /* Anyone know what the solution for this is? */
1222         if (nv_output->preferred_output == 0) {
1223                 output->possible_crtcs = (1 << 0);
1224         } else {
1225                 if (pNv->switchable_crtc) {
1226                         output->possible_crtcs = pNv->dcb_table.entry[dcb_entry].heads;
1227                 } else {
1228                         output->possible_crtcs = (1 << nv_output->preferred_output);
1229                 }
1230         }
1231
1232         xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Adding output %s\n", outputname);
1233 }
1234
1235 void NvDCBSetupOutputs(ScrnInfoPtr pScrn)
1236 {
1237         NVPtr pNv = NVPTR(pScrn);
1238         int i, type, i2c_count[0xf];
1239
1240         pNv->switchable_crtc = FALSE;
1241         /* I was wrong, again. */
1242         if (pNv->NVArch > 0x11 && pNv->twoHeads)
1243                 pNv->switchable_crtc = TRUE;
1244
1245         memset(i2c_count, 0, sizeof(i2c_count));
1246         for (i = 0 ; i < pNv->dcb_table.entries; i++)
1247                 i2c_count[pNv->dcb_table.entry[i].i2c_index]++;
1248
1249         /* we setup the outputs up from the BIOS table */
1250         for (i = 0 ; i < pNv->dcb_table.entries; i++) {
1251                 type = pNv->dcb_table.entry[i].type;
1252                 if (type > 3) {
1253                         xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "DCB type %d not known\n", type);
1254                         continue;
1255                 }
1256
1257                 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DCB entry %d: type: %d, i2c_index: %d, heads: %d, bus: %d, or: %d\n", i, type, pNv->dcb_table.entry[i].i2c_index, pNv->dcb_table.entry[i].heads, pNv->dcb_table.entry[i].bus, pNv->dcb_table.entry[i].or);
1258
1259                 switch(type) {
1260                 case OUTPUT_ANALOG:
1261                         nv_add_analog_output(pScrn, i, (i2c_count[pNv->dcb_table.entry[i].i2c_index] > 1));
1262                         break;
1263                 case OUTPUT_TMDS:
1264                         nv_add_digital_output(pScrn, i, 0);
1265                         break;
1266                 case OUTPUT_LVDS:
1267                         nv_add_digital_output(pScrn, i, 1);
1268                         break;
1269                 default:
1270                         break;
1271                 }
1272         }
1273 }
1274
1275 void NvSetupOutputs(ScrnInfoPtr pScrn)
1276 {
1277         NVPtr pNv = NVPTR(pScrn);
1278
1279         pNv->Television = FALSE;
1280
1281         memset(pNv->pI2CBus, 0, sizeof(pNv->pI2CBus));
1282         NvDCBSetupOutputs(pScrn);
1283 }
1284
1285 /*************************************************************************** \
1286 |*                                                                           *|
1287 |*       Copyright 1993-2003 NVIDIA, Corporation.  All rights reserved.      *|
1288 |*                                                                           *|
1289 |*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|
1290 |*     international laws.  Users and possessors of this source code are     *|
1291 |*     hereby granted a nonexclusive,  royalty-free copyright license to     *|
1292 |*     use this code in individual and commercial software.                  *|
1293 |*                                                                           *|
1294 |*     Any use of this source code must include,  in the user documenta-     *|
1295 |*     tion and  internal comments to the code,  notices to the end user     *|
1296 |*     as follows:                                                           *|
1297 |*                                                                           *|
1298 |*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
1299 |*                                                                           *|
1300 |*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|
1301 |*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|
1302 |*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|
1303 |*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|
1304 |*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|
1305 |*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|
1306 |*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|
1307 |*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|
1308 |*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|
1309 |*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|
1310 |*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|
1311 |*                                                                           *|
1312 |*     U.S. Government  End  Users.   This source code  is a "commercial     *|
1313 |*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|
1314 |*     consisting  of "commercial  computer  software"  and  "commercial     *|
1315 |*     computer  software  documentation,"  as such  terms  are  used in     *|
1316 |*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|
1317 |*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|
1318 |*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|
1319 |*     all U.S. Government End Users  acquire the source code  with only     *|
1320 |*     those rights set forth herein.                                        *|
1321 |*                                                                           *|
1322  \***************************************************************************/