git.oblomov.eu Git - wine/blob - dlls/kernel32/cpu.c

   1 /*
   2  * What processor?
   3  *
   4  * Copyright 1995,1997 Morten Welinder
   5  * Copyright 1997-1998 Marcus Meissner
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include "config.h"
  23 #include "wine/port.h"
  24
  25 #ifdef HAVE_SYS_PARAM_H
  26 # include <sys/param.h>
  27 #endif
  28 #ifdef HAVE_SYS_SYSCTL_H
  29 # include <sys/sysctl.h>
  30 #endif
  31 #ifdef HAVE_MACHINE_CPU_H
  32 # include <machine/cpu.h>
  33 #endif
  34 #ifdef HAVE_MACH_MACHINE_H
  35 # include <mach/machine.h>
  36 #endif
  37
  38 #include <ctype.h>
  39 #include <string.h>
  40 #include <stdarg.h>
  41 #include <stdio.h>
  42 #include <stdlib.h>
  43 #ifdef HAVE_SYS_TIME_H
  44 # include <sys/time.h>
  45 #endif
  46
  47
  48 #define NONAMELESSUNION
  49 #define NONAMELESSSTRUCT
  50 #include "windef.h"
  51 #include "winbase.h"
  52 #include "winnt.h"
  53 #include "winternl.h"
  54 #include "wine/unicode.h"
  55 #include "wine/debug.h"
  56
  57 WINE_DEFAULT_DEBUG_CHANNEL(reg);
  58
  59 #define AUTH    0x68747541      /* "Auth" */
  60 #define ENTI    0x69746e65      /* "enti" */
  61 #define CAMD    0x444d4163      /* "cAMD" */
  62
  63 /* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
  64  * We are compiled with -fPIC, so we can't clobber ebx.
  65  */
  66 static inline void do_cpuid(unsigned int ax, unsigned int *p)
  67 {
  68 #ifdef __i386__
  69         __asm__("pushl %%ebx\n\t"
  70                 "cpuid\n\t"
  71                 "movl %%ebx, %%esi\n\t"
  72                 "popl %%ebx"
  73                 : "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
  74                 :  "0" (ax));
  75 #endif
  76 }
  77
  78 /* From xf86info havecpuid.c 1.11 */
  79 static inline int have_cpuid(void)
  80 {
  81 #ifdef __i386__
  82         unsigned int f1, f2;
  83         __asm__("pushfl\n\t"
  84                 "pushfl\n\t"
  85                 "popl %0\n\t"
  86                 "movl %0,%1\n\t"
  87                 "xorl %2,%0\n\t"
  88                 "pushl %0\n\t"
  89                 "popfl\n\t"
  90                 "pushfl\n\t"
  91                 "popl %0\n\t"
  92                 "popfl"
  93                 : "=&r" (f1), "=&r" (f2)
  94                 : "ir" (0x00200000));
  95         return ((f1^f2) & 0x00200000) != 0;
  96 #else
  97         return 0;
  98 #endif
  99 }
 100
 101 static BYTE PF[64] = {0,};
 102 static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
 103
 104 static void create_system_registry_keys( const SYSTEM_INFO *info )
 105 {
 106     static const WCHAR SystemW[] = {'M','a','c','h','i','n','e','\\',
 107                                     'H','a','r','d','w','a','r','e','\\',
 108                                     'D','e','s','c','r','i','p','t','i','o','n','\\',
 109                                     'S','y','s','t','e','m',0};
 110     static const WCHAR fpuW[] = {'F','l','o','a','t','i','n','g','P','o','i','n','t','P','r','o','c','e','s','s','o','r',0};
 111     static const WCHAR cpuW[] = {'C','e','n','t','r','a','l','P','r','o','c','e','s','s','o','r',0};
 112     static const WCHAR IdentifierW[] = {'I','d','e','n','t','i','f','i','e','r',0};
 113     static const WCHAR SysidW[] = {'A','T',' ','c','o','m','p','a','t','i','b','l','e',0};
 114     static const WCHAR mhzKeyW[] = {'~','M','H','z',0};
 115     static const WCHAR VendorIdentifierW[] = {'V','e','n','d','o','r','I','d','e','n','t','i','f','i','e','r',0};
 116     static const WCHAR VenidIntelW[] = {'G','e','n','u','i','n','e','I','n','t','e','l',0};
 117     /* static const WCHAR VenidAMDW[] = {'A','u','t','h','e','n','t','i','c','A','M','D',0}; */
 118
 119     unsigned int i;
 120     HANDLE hkey, system_key, cpu_key;
 121     OBJECT_ATTRIBUTES attr;
 122     UNICODE_STRING nameW, valueW;
 123
 124     attr.Length = sizeof(attr);
 125     attr.RootDirectory = 0;
 126     attr.ObjectName = &nameW;
 127     attr.Attributes = 0;
 128     attr.SecurityDescriptor = NULL;
 129     attr.SecurityQualityOfService = NULL;
 130
 131     RtlInitUnicodeString( &nameW, SystemW );
 132     if (NtCreateKey( &system_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
 133
 134     RtlInitUnicodeString( &valueW, IdentifierW );
 135     NtSetValueKey( system_key, &valueW, 0, REG_SZ, SysidW, (strlenW(SysidW)+1) * sizeof(WCHAR) );
 136
 137     attr.RootDirectory = system_key;
 138     RtlInitUnicodeString( &nameW, fpuW );
 139     if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) NtClose( hkey );
 140
 141     RtlInitUnicodeString( &nameW, cpuW );
 142     if (!NtCreateKey( &cpu_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 143     {
 144         for (i = 0; i < info->dwNumberOfProcessors; i++)
 145         {
 146             char num[10], id[60];
 147
 148             attr.RootDirectory = cpu_key;
 149             sprintf( num, "%d", i );
 150             RtlCreateUnicodeStringFromAsciiz( &nameW, num );
 151             if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 152             {
 153                 WCHAR idW[60];
 154                 DWORD cpuMHz = cpuHz / 1000000;
 155
 156                 /*TODO: report 64bit processors properly*/
 157                 RtlInitUnicodeString( &valueW, IdentifierW );
 158                 sprintf( id, "x86 Family %d Model %d Stepping %d",
 159                          info->wProcessorLevel, HIBYTE(info->wProcessorRevision), LOBYTE(info->wProcessorRevision) );
 160
 161                 RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
 162                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
 163
 164                 /*TODO; report amd's properly*/
 165                 RtlInitUnicodeString( &valueW, VendorIdentifierW );
 166                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, VenidIntelW, (strlenW(VenidIntelW)+1) * sizeof(WCHAR) );
 167
 168                 RtlInitUnicodeString( &valueW, mhzKeyW );
 169                 NtSetValueKey( hkey, &valueW, 0, REG_DWORD, &cpuMHz, sizeof(DWORD) );
 170                 NtClose( hkey );
 171             }
 172             RtlFreeUnicodeString( &nameW );
 173         }
 174         NtClose( cpu_key );
 175     }
 176     NtClose( system_key );
 177 }
 178
 179 static void create_env_registry_keys( const SYSTEM_INFO *info )
 180 {
 181     static const WCHAR EnvironW[]  = {'M','a','c','h','i','n','e','\\',
 182                                       'S','y','s','t','e','m','\\',
 183                                       'C','u','r','r','e','n','t','C','o','n','t','r','o','l','S','e','t','\\',
 184                                       'C','o','n','t','r','o','l','\\',
 185                                       'S','e','s','s','i','o','n',' ','M','a','n','a','g','e','r','\\',
 186                                       'E','n','v','i','r','o','n','m','e','n','t',0};
 187     static const WCHAR NumProcW[]  = {'N','U','M','B','E','R','_','O','F','_','P','R','O','C','E','S','S','O','R','S',0};
 188     static const WCHAR ProcArchW[] = {'P','R','O','C','E','S','S','O','R','_','A','R','C','H','I','T','E','C','T','U','R','E',0};
 189     static const WCHAR x86W[]      = {'x','8','6',0};
 190     static const WCHAR ProcIdW[]   = {'P','R','O','C','E','S','S','O','R','_','I','D','E','N','T','I','F','I','E','R',0};
 191     static const WCHAR ProcLvlW[]  = {'P','R','O','C','E','S','S','O','R','_','L','E','V','E','L',0};
 192     static const WCHAR ProcRevW[]  = {'P','R','O','C','E','S','S','O','R','_','R','E','V','I','S','I','O','N',0};
 193
 194     HANDLE env_key;
 195     OBJECT_ATTRIBUTES attr;
 196     UNICODE_STRING nameW, valueW;
 197
 198     char nProc[10],id[60],procLevel[10],rev[10];
 199     WCHAR nProcW[10],idW[60],procLevelW[10],revW[10];
 200
 201     /* Create some keys under HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Control\Session Manager\Environment.
 202      * All these environment variables are processor related and will be read during process initialization and hence
 203      * show up in the environment of that process.
 204      */
 205
 206     attr.Length = sizeof(attr);
 207     attr.RootDirectory = 0;
 208     attr.ObjectName = &nameW;
 209     attr.Attributes = 0;
 210     attr.SecurityDescriptor = NULL;
 211     attr.SecurityQualityOfService = NULL;
 212
 213     RtlInitUnicodeString( &nameW, EnvironW );
 214     if (NtCreateKey( &env_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
 215
 216     sprintf( nProc, "%d", info->dwNumberOfProcessors );
 217     RtlMultiByteToUnicodeN( nProcW, sizeof(nProcW), NULL, nProc, strlen(nProc)+1 );
 218     RtlInitUnicodeString( &valueW, NumProcW );
 219     NtSetValueKey( env_key, &valueW, 0, REG_SZ, nProcW, (strlenW(nProcW)+1)*sizeof(WCHAR) );
 220
 221     /* TODO: currently hardcoded x86, add different processors */
 222     RtlInitUnicodeString( &valueW, ProcArchW );
 223     NtSetValueKey( env_key, &valueW, 0, REG_SZ, x86W, (strlenW(x86W)+1) * sizeof(WCHAR) );
 224
 225     /* TODO: currently hardcoded Intel, add different processors */
 226     sprintf( id, "x86 Family %d Model %d Stepping %d, GenuineIntel",
 227         info->wProcessorLevel, HIBYTE(info->wProcessorRevision), LOBYTE(info->wProcessorRevision) );
 228     RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
 229     RtlInitUnicodeString( &valueW, ProcIdW );
 230     NtSetValueKey( env_key, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
 231
 232     sprintf( procLevel, "%d", info->wProcessorLevel );
 233     RtlMultiByteToUnicodeN( procLevelW, sizeof(procLevelW), NULL, procLevel, strlen(procLevel)+1 );
 234     RtlInitUnicodeString( &valueW, ProcLvlW );
 235     NtSetValueKey( env_key, &valueW, 0, REG_SZ, procLevelW, (strlenW(procLevelW)+1)*sizeof(WCHAR) );
 236
 237     /* Properly report model/stepping */
 238     sprintf( rev, "%04x", info->wProcessorRevision);
 239     RtlMultiByteToUnicodeN( revW, sizeof(revW), NULL, rev, strlen(rev)+1 );
 240     RtlInitUnicodeString( &valueW, ProcRevW );
 241     NtSetValueKey( env_key, &valueW, 0, REG_SZ, revW, (strlenW(revW)+1)*sizeof(WCHAR) );
 242
 243     NtClose( env_key );
 244 }
 245
 246 static inline void get_cpuinfo( SYSTEM_INFO *info )
 247 {
 248     unsigned int regs[4], regs2[4];
 249
 250     if (!have_cpuid()) return;
 251
 252     do_cpuid(0x00000000, regs);  /* get standard cpuid level and vendor name */
 253     if (regs[0]>=0x00000001)   /* Check for supported cpuid version */
 254     {
 255         do_cpuid(0x00000001, regs2); /* get cpu features */
 256         switch ((regs2[0] >> 8) & 0xf)  /* cpu family */
 257         {
 258         case 3:
 259             info->dwProcessorType = PROCESSOR_INTEL_386;
 260             info->wProcessorLevel = 3;
 261             break;
 262         case 4:
 263             info->dwProcessorType = PROCESSOR_INTEL_486;
 264             info->wProcessorLevel = 4;
 265             break;
 266         case 5:
 267             info->dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 268             info->wProcessorLevel = 5;
 269             break;
 270         case 6:
 271         case 15: /* PPro/2/3/4 has same info as P1 */
 272             info->dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 273             info->wProcessorLevel = 6;
 274             break;
 275         default:
 276             FIXME("unknown cpu family %d, please report! (-> setting to 386)\n",
 277                   (regs2[0] >> 8)&0xf);
 278             break;
 279         }
 280         PF[PF_FLOATING_POINT_EMULATED]     = !(regs2[3] & 1);
 281         PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
 282         PF[PF_COMPARE_EXCHANGE_DOUBLE]     = (regs2[3] & (1 << 8 )) >> 8;
 283         PF[PF_MMX_INSTRUCTIONS_AVAILABLE]  = (regs2[3] & (1 << 23)) >> 23;
 284
 285         if (regs[1] == AUTH &&
 286             regs[3] == ENTI &&
 287             regs[2] == CAMD) {
 288             do_cpuid(0x80000000, regs);  /* get vendor cpuid level */
 289             if (regs[0]>=0x80000001) {
 290                 do_cpuid(0x80000001, regs2);  /* get vendor features */
 291                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = (regs2[3] & (1 << 31 )) >> 31;
 292             }
 293         }
 294     }
 295 }
 296
 297 /****************************************************************************
 298  *              QueryPerformanceCounter (KERNEL32.@)
 299  *
 300  * Get the current value of the performance counter.
 301  *
 302  * PARAMS
 303  *  counter [O] Destination for the current counter reading
 304  *
 305  * RETURNS
 306  *  Success: TRUE. counter contains the current reading
 307  *  Failure: FALSE.
 308  *
 309  * SEE ALSO
 310  *  See QueryPerformanceFrequency.
 311  */
 312 BOOL WINAPI QueryPerformanceCounter(PLARGE_INTEGER counter)
 313 {
 314     NtQueryPerformanceCounter( counter, NULL );
 315     return TRUE;
 316 }
 317
 318
 319 /****************************************************************************
 320  *              QueryPerformanceFrequency (KERNEL32.@)
 321  *
 322  * Get the resolution of the performance counter.
 323  *
 324  * PARAMS
 325  *  frequency [O] Destination for the counter resolution
 326  *
 327  * RETURNS
 328  *  Success. TRUE. Frequency contains the resolution of the counter.
 329  *  Failure: FALSE.
 330  *
 331  * SEE ALSO
 332  *  See QueryPerformanceCounter.
 333  */
 334 BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
 335 {
 336     LARGE_INTEGER counter;
 337     NtQueryPerformanceCounter( &counter, frequency );
 338     return TRUE;
 339 }
 340
 341
 342 /***********************************************************************
 343  *                      GetSystemInfo                   [KERNEL32.@]
 344  *
 345  * Get information about the system.
 346  *
 347  * RETURNS
 348  *  Nothing.
 349  *
 350  * NOTES
 351  * On the first call it creates cached values, so it doesn't have to determine
 352  * them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
 353  *
 354  * It creates a registry subhierarchy, looking like:
 355  * "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
 356  * Note that there is a hierarchy for every processor installed, so this
 357  * supports multiprocessor systems. This is done like Win95 does it, I think.
 358  *
 359  * It creates some registry entries in the environment part:
 360  * "\HKLM\System\CurrentControlSet\Control\Session Manager\Environment". These are
 361  * always present. When deleted, Windows will add them again.
 362  *
 363  * It also creates a cached flag array for IsProcessorFeaturePresent().
 364  */
 365 VOID WINAPI GetSystemInfo(
 366         LPSYSTEM_INFO si        /* [out] Destination for system information, may not be NULL */)
 367 {
 368         static int cache = 0;
 369         static SYSTEM_INFO cachedsi;
 370
 371         TRACE("si=0x%p\n", si);
 372         if (cache) {
 373                 *si = cachedsi;
 374                 return;
 375         }
 376         memset(PF,0,sizeof(PF));
 377
 378         /* choose sensible defaults ...
 379          * FIXME: perhaps overridable with precompiler flags?
 380          */
 381         cachedsi.u.s.wProcessorArchitecture     = PROCESSOR_ARCHITECTURE_INTEL;
 382         cachedsi.dwPageSize                     = getpagesize();
 383
 384         /* FIXME: the two entries below should be computed somehow... */
 385         cachedsi.lpMinimumApplicationAddress    = (void *)0x00010000;
 386         cachedsi.lpMaximumApplicationAddress    = (void *)0x7FFEFFFF;
 387         cachedsi.dwActiveProcessorMask          = 0;
 388         cachedsi.dwNumberOfProcessors           = 1;
 389         cachedsi.dwProcessorType                = PROCESSOR_INTEL_PENTIUM;
 390         cachedsi.dwAllocationGranularity        = 0x10000;
 391         cachedsi.wProcessorLevel                = 5; /* 586 */
 392         cachedsi.wProcessorRevision             = 0;
 393
 394         cache = 1; /* even if there is no more info, we now have a cache entry */
 395         *si = cachedsi;
 396
 397         /* Hmm, reasonable processor feature defaults? */
 398
 399 #ifdef linux
 400         {
 401         char line[200];
 402         FILE *f = fopen ("/proc/cpuinfo", "r");
 403
 404         if (!f)
 405                 return;
 406         while (fgets(line,200,f)!=NULL) {
 407                 char    *s,*value;
 408
 409                 /* NOTE: the ':' is the only character we can rely on */
 410                 if (!(value = strchr(line,':')))
 411                         continue;
 412
 413                 /* terminate the valuename */
 414                 s = value - 1;
 415                 while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
 416                 *(s + 1) = '\0';
 417
 418                 /* and strip leading spaces from value */
 419                 value += 1;
 420                 while (*value==' ') value++;
 421                 if ((s=strchr(value,'\n')))
 422                         *s='\0';
 423
 424                 if (!strcasecmp(line,"processor")) {
 425                         /* processor number counts up... */
 426                         unsigned int x;
 427
 428                         if (sscanf(value,"%d",&x))
 429                                 if (x+1>cachedsi.dwNumberOfProcessors)
 430                                         cachedsi.dwNumberOfProcessors=x+1;
 431
 432                         continue;
 433                 }
 434                 if (!strcasecmp(line,"model")) {
 435                         /* First part of wProcessorRevision */
 436                         int     x;
 437
 438                         if (sscanf(value,"%d",&x))
 439                                 cachedsi.wProcessorRevision = cachedsi.wProcessorRevision | (x << 8);
 440
 441                         continue;
 442                 }
 443
 444                 /* 2.1 method */
 445                 if (!strcasecmp(line, "cpu family")) {
 446                         if (isdigit (value[0])) {
 447                                 switch (value[0] - '0') {
 448                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 449                                         cachedsi.wProcessorLevel= 3;
 450                                         break;
 451                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 452                                         cachedsi.wProcessorLevel= 4;
 453                                         break;
 454                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 455                                         cachedsi.wProcessorLevel= 5;
 456                                         break;
 457
 458                                 default:
 459                                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 460                                         cachedsi.wProcessorLevel = atoi(value);
 461                                         break;
 462                                 }
 463                         }
 464                         continue;
 465                 }
 466                 /* old 2.0 method */
 467                 if (!strcasecmp(line, "cpu")) {
 468                         if (    isdigit (value[0]) && value[1] == '8' &&
 469                                 value[2] == '6' && value[3] == 0
 470                         ) {
 471                                 switch (value[0] - '0') {
 472                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 473                                         cachedsi.wProcessorLevel= 3;
 474                                         break;
 475                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 476                                         cachedsi.wProcessorLevel= 4;
 477                                         break;
 478                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 479                                         cachedsi.wProcessorLevel= 5;
 480                                         break;
 481                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 482                                         cachedsi.wProcessorLevel= 6;
 483                                         break;
 484                                 default:
 485                                         FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
 486                                         break;
 487                                 }
 488                         }
 489                         continue;
 490                 }
 491                 if (!strcasecmp(line,"stepping")) {
 492                         /* Second part of wProcessorRevision */
 493                         int     x;
 494
 495                         if (sscanf(value,"%d",&x))
 496                                 cachedsi.wProcessorRevision = cachedsi.wProcessorRevision | x;
 497
 498                         continue;
 499                 }
 500                 if (!strcasecmp(line, "cpu MHz")) {
 501                         double cmz;
 502                         if (sscanf( value, "%lf", &cmz ) == 1) {
 503                                 /* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
 504                                 cpuHz = cmz * 1000 * 1000;
 505                         }
 506                         continue;
 507                 }
 508                 if (!strcasecmp(line,"fdiv_bug")) {
 509                         if (!strncasecmp(value,"yes",3))
 510                                 PF[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
 511
 512                         continue;
 513                 }
 514                 if (!strcasecmp(line,"fpu")) {
 515                         if (!strncasecmp(value,"no",2))
 516                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 517
 518                         continue;
 519                 }
 520                 if (    !strcasecmp(line,"flags")       ||
 521                         !strcasecmp(line,"features")) {
 522                         if (strstr(value,"cx8"))
 523                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 524                         if (strstr(value,"mmx"))
 525                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 526                         if (strstr(value,"tsc"))
 527                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 528                         if (strstr(value,"3dnow"))
 529                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
 530                         /* This will also catch sse2, but we have sse itself
 531                          * if we have sse2, so no problem */
 532                         if (strstr(value,"sse"))
 533                                 PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
 534                         if (strstr(value,"sse2"))
 535                                 PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
 536                         if (strstr(value,"pae"))
 537                                 PF[PF_PAE_ENABLED] = TRUE;
 538
 539                         continue;
 540                 }
 541         }
 542         fclose (f);
 543         }
 544 #elif defined (__NetBSD__)
 545         {
 546              int mib[2];
 547              int value[2];
 548              char model[256];
 549              char *cpuclass;
 550              FILE *f = fopen ("/var/run/dmesg.boot", "r");
 551
 552              /* first deduce as much as possible from the sysctls */
 553              mib[0] = CTL_MACHDEP;
 554 #ifdef CPU_FPU_PRESENT
 555              mib[1] = CPU_FPU_PRESENT;
 556              value[1] = sizeof(int);
 557              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 558                  if (value) PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 559                  else       PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 560 #endif
 561 #ifdef CPU_SSE
 562              mib[1] = CPU_SSE;   /* this should imply MMX */
 563              value[1] = sizeof(int);
 564              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 565                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 566 #endif
 567 #ifdef CPU_SSE2
 568              mib[1] = CPU_SSE2;  /* this should imply MMX */
 569              value[1] = sizeof(int);
 570              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 571                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 572 #endif
 573              mib[0] = CTL_HW;
 574              mib[1] = HW_NCPU;
 575              value[1] = sizeof(int);
 576              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 577                  if (value[0] > cachedsi.dwNumberOfProcessors)
 578                     cachedsi.dwNumberOfProcessors = value[0];
 579              mib[1] = HW_MODEL;
 580              value[1] = 255;
 581              if (sysctl(mib, 2, model, value+1, NULL, 0) >= 0) {
 582                   model[value[1]] = '\0'; /* just in case */
 583                   cpuclass = strstr(model, "-class");
 584                   if (cpuclass != NULL) {
 585                        while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
 586                        if (!strncmp(cpuclass+1, "386", 3)) {
 587                             cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 588                             cachedsi.wProcessorLevel= 3;
 589                        }
 590                        if (!strncmp(cpuclass+1, "486", 3)) {
 591                             cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 592                             cachedsi.wProcessorLevel= 4;
 593                        }
 594                        if (!strncmp(cpuclass+1, "586", 3)) {
 595                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 596                             cachedsi.wProcessorLevel= 5;
 597                        }
 598                        if (!strncmp(cpuclass+1, "686", 3)) {
 599                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 600                             cachedsi.wProcessorLevel= 6;
 601                             /* this should imply MMX */
 602                             PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 603                        }
 604                   }
 605              }
 606
 607              /* it may be worth reading from /var/run/dmesg.boot for
 608                 additional information such as CX8, MMX and TSC
 609                 (however this information should be considered less
 610                  reliable than that from the sysctl calls) */
 611              if (f != NULL)
 612              {
 613                  while (fgets(model, 255, f) != NULL) {
 614                         if (sscanf(model,"cpu%d: features %x<", value, value+1) == 2) {
 615                             /* we could scan the string but it is easier
 616                                to test the bits directly */
 617                             if (value[1] & 0x1)
 618                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 619                             if (value[1] & 0x10)
 620                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 621                             if (value[1] & 0x100)
 622                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 623                             if (value[1] & 0x800000)
 624                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 625
 626                             break;
 627                         }
 628                  }
 629                  fclose(f);
 630              }
 631
 632         }
 633 #elif defined(__FreeBSD__)
 634         {
 635         int ret, num;
 636         unsigned len;
 637
 638         get_cpuinfo( &cachedsi );
 639
 640         /* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
 641         /*len = sizeof(num);
 642           ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
 643           if (!ret)
 644           PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
 645
 646         len = sizeof(num);
 647         ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
 648         if (!ret)
 649                 cachedsi.dwNumberOfProcessors = num;
 650         }
 651 #elif defined(__sun)
 652         {
 653             int num = sysconf( _SC_NPROCESSORS_ONLN );
 654
 655             if (num == -1) num = 1;
 656             get_cpuinfo( &cachedsi );
 657             cachedsi.dwNumberOfProcessors = num;
 658         }
 659 #elif defined (__APPLE__)
 660         {
 661         size_t valSize;
 662         unsigned long long longVal;
 663         int value;
 664         int cputype;
 665         char buffer[256];
 666
 667         valSize = sizeof(int);
 668         if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
 669         {
 670             if (value)
 671                 PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 672             else
 673                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 674         }
 675         valSize = sizeof(int);
 676         if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
 677             cachedsi.dwNumberOfProcessors = value;
 678
 679         valSize = sizeof(int);
 680         if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
 681             cachedsi.dwActiveProcessorMask = (1 << value) - 1;
 682
 683         valSize = sizeof(int);
 684         if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
 685         {
 686             switch (cputype)
 687             {
 688             case CPU_TYPE_POWERPC:
 689                 cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
 690                 valSize = sizeof(int);
 691                 if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
 692                 {
 693                         switch (value)
 694                         {
 695                             case CPU_SUBTYPE_POWERPC_601:
 696                             case CPU_SUBTYPE_POWERPC_602:
 697                                 cachedsi.dwProcessorType = PROCESSOR_PPC_601;
 698                                 cachedsi.wProcessorLevel = 1;
 699                                 break;
 700                             case CPU_SUBTYPE_POWERPC_603:
 701                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 702                                 cachedsi.wProcessorLevel = 3;
 703                                 break;
 704                             case CPU_SUBTYPE_POWERPC_603e:
 705                             case CPU_SUBTYPE_POWERPC_603ev:
 706                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 707                                 cachedsi.wProcessorLevel = 6;
 708                                 break;
 709                             case CPU_SUBTYPE_POWERPC_604:
 710                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 711                                 cachedsi.wProcessorLevel = 4;
 712                                 break;
 713                             case CPU_SUBTYPE_POWERPC_604e:
 714                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 715                                 cachedsi.wProcessorLevel = 9;
 716                                 break;
 717                             case CPU_SUBTYPE_POWERPC_620:
 718                                 cachedsi.dwProcessorType = PROCESSOR_PPC_620;
 719                                 cachedsi.wProcessorLevel = 20;
 720                                 break;
 721                             case CPU_SUBTYPE_POWERPC_750:
 722                             case CPU_SUBTYPE_POWERPC_7400:
 723                             case CPU_SUBTYPE_POWERPC_7450:
 724                                 /* G3/G4 derive from 603 so ... */
 725                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 726                                 cachedsi.wProcessorLevel = 6;
 727                                 break;
 728                             case CPU_SUBTYPE_POWERPC_970:
 729                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 730                                 cachedsi.wProcessorLevel = 9;
 731                                 /* :o) PF[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
 732                                 break;
 733                             default: break;
 734                         }
 735                 }
 736                 break; /* CPU_TYPE_POWERPC */
 737             case CPU_TYPE_I386:
 738                 cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
 739                 valSize = sizeof(int);
 740                 if (sysctlbyname ("machdep.cpu.family", &value, &valSize, NULL, 0) == 0)
 741                 {
 742                     cachedsi.wProcessorLevel = value;
 743                     switch (value)
 744                     {
 745                     case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386; break;
 746                     case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486; break;
 747                     default: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM; break;
 748                     }
 749                 }
 750                 valSize = sizeof(int);
 751                 if (sysctlbyname ("machdep.cpu.model", &value, &valSize, NULL, 0) == 0)
 752                     cachedsi.wProcessorRevision = (value << 8);
 753                 valSize = sizeof(int);
 754                 if (sysctlbyname ("machdep.cpu.stepping", &value, &valSize, NULL, 0) == 0)
 755                     cachedsi.wProcessorRevision |= value;
 756                 valSize = sizeof(buffer);
 757                 if (sysctlbyname ("machdep.cpu.features", buffer, &valSize, NULL, 0) == 0)
 758                 {
 759                     cachedsi.wProcessorRevision |= value;
 760                     if (strstr(buffer,"CX8"))  PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 761                     if (strstr(buffer,"MMX"))   PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 762                     if (strstr(buffer,"TSC"))   PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 763                     if (strstr(buffer,"3DNOW")) PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
 764                     if (strstr(buffer,"SSE"))   PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
 765                     if (strstr(buffer,"SSE2"))  PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
 766                     if (strstr(buffer,"PAE"))   PF[PF_PAE_ENABLED] = TRUE;
 767                 }
 768                 break; /* CPU_TYPE_I386 */
 769             default: break;
 770             } /* switch (cputype) */
 771         }
 772         valSize = sizeof(longVal);
 773         if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
 774             cpuHz = longVal;
 775         }
 776 #else
 777         FIXME("not yet supported on this system\n");
 778 #endif
 779         if (!cachedsi.dwActiveProcessorMask)
 780             cachedsi.dwActiveProcessorMask = (1 << cachedsi.dwNumberOfProcessors) - 1;
 781
 782         *si = cachedsi;
 783
 784         TRACE("<- CPU arch %d, res'd %d, pagesize %d, minappaddr %p, maxappaddr %p,"
 785               " act.cpumask %08x, numcpus %d, CPU type %d, allocgran. %d, CPU level %d, CPU rev %d\n",
 786               si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
 787               si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
 788               si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
 789               si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
 790
 791         create_system_registry_keys( &cachedsi );
 792         create_env_registry_keys( &cachedsi );
 793 }
 794
 795
 796 /***********************************************************************
 797  *                      GetNativeSystemInfo             [KERNEL32.@]
 798  */
 799 VOID WINAPI GetNativeSystemInfo(
 800     LPSYSTEM_INFO si    /* [out] Destination for system information, may not be NULL */)
 801 {
 802     static BOOL reported = FALSE;
 803     if (!reported) {
 804         FIXME("(%p) using GetSystemInfo()\n", si);
 805         reported = TRUE;
 806     } else
 807         TRACE("(%p) using GetSystemInfo()\n", si);
 808     GetSystemInfo(si);
 809 }
 810
 811 /***********************************************************************
 812  *                      IsProcessorFeaturePresent       [KERNEL32.@]
 813  *
 814  * Determine if the cpu supports a given feature.
 815  *
 816  * RETURNS
 817  *  TRUE, If the processor supports feature,
 818  *  FALSE otherwise.
 819  */
 820 BOOL WINAPI IsProcessorFeaturePresent (
 821         DWORD feature   /* [in] Feature number, (PF_ constants from "winnt.h") */)
 822 {
 823   SYSTEM_INFO si;
 824   GetSystemInfo (&si); /* To ensure the information is loaded and cached */
 825
 826   if (feature < 64)
 827     return PF[feature];
 828   else
 829     return FALSE;
 830 }