git.oblomov.eu Git - wine/blob - dlls/kernel/cpu.c

   1 /*
   2  * What processor?
   3  *
   4  * Copyright 1995,1997 Morten Welinder
   5  * Copyright 1997-1998 Marcus Meissner
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include "config.h"
  23 #include "wine/port.h"
  24
  25 #ifdef HAVE_SYS_PARAM_H
  26 # include <sys/param.h>
  27 #endif
  28 #ifdef HAVE_SYS_SYSCTL_H
  29 # include <sys/sysctl.h>
  30 #endif
  31 #ifdef HAVE_MACHINE_CPU_H
  32 # include <machine/cpu.h>
  33 #endif
  34
  35 #include <ctype.h>
  36 #include <string.h>
  37 #include <stdarg.h>
  38 #include <stdio.h>
  39 #include <stdlib.h>
  40 #ifdef HAVE_SYS_TIME_H
  41 # include <sys/time.h>
  42 #endif
  43
  44
  45 #define NONAMELESSUNION
  46 #define NONAMELESSSTRUCT
  47 #include "windef.h"
  48 #include "winbase.h"
  49 #include "winnt.h"
  50 #include "winreg.h"
  51 #include "winternl.h"
  52 #include "winerror.h"
  53 #include "wine/unicode.h"
  54 #include "wine/debug.h"
  55
  56 WINE_DEFAULT_DEBUG_CHANNEL(reg);
  57
  58 #define AUTH    0x68747541      /* "Auth" */
  59 #define ENTI    0x69746e65      /* "enti" */
  60 #define CAMD    0x444d4163      /* "cAMD" */
  61
  62 /* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
  63  * We are compiled with -fPIC, so we can't clobber ebx.
  64  */
  65 static inline void do_cpuid(int ax, int *p)
  66 {
  67 #ifdef __i386__
  68         __asm__("pushl %%ebx\n\t"
  69                 "cpuid\n\t"
  70                 "movl %%ebx, %%esi\n\t"
  71                 "popl %%ebx"
  72                 : "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
  73                 :  "0" (ax));
  74 #endif
  75 }
  76
  77 /* From xf86info havecpuid.c 1.11 */
  78 static inline int have_cpuid(void)
  79 {
  80 #ifdef __i386__
  81         unsigned int f1, f2;
  82         __asm__("pushfl\n\t"
  83                 "pushfl\n\t"
  84                 "popl %0\n\t"
  85                 "movl %0,%1\n\t"
  86                 "xorl %2,%0\n\t"
  87                 "pushl %0\n\t"
  88                 "popfl\n\t"
  89                 "pushfl\n\t"
  90                 "popl %0\n\t"
  91                 "popfl"
  92                 : "=&r" (f1), "=&r" (f2)
  93                 : "ir" (0x00200000));
  94         return ((f1^f2) & 0x00200000) != 0;
  95 #else
  96         return 0;
  97 #endif
  98 }
  99
 100 static BYTE PF[64] = {0,};
 101 static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
 102
 103 static void create_registry_keys( const SYSTEM_INFO *info )
 104 {
 105     static const WCHAR SystemW[] = {'M','a','c','h','i','n','e','\\',
 106                                     'H','a','r','d','w','a','r','e','\\',
 107                                     'D','e','s','c','r','i','p','t','i','o','n','\\',
 108                                     'S','y','s','t','e','m',0};
 109     static const WCHAR fpuW[] = {'F','l','o','a','t','i','n','g','P','o','i','n','t','P','r','o','c','e','s','s','o','r',0};
 110     static const WCHAR cpuW[] = {'C','e','n','t','r','a','l','P','r','o','c','e','s','s','o','r',0};
 111     static const WCHAR IdentifierW[] = {'I','d','e','n','t','i','f','i','e','r',0};
 112     static const WCHAR SysidW[] = {'A','T',' ','c','o','m','p','a','t','i','b','l','e',0};
 113     static const WCHAR mhzKeyW[] = {'~','M','H','z',0};
 114     static const WCHAR VendorIdentifierW[] = {'V','e','n','d','o','r','I','d','e','n','t','i','f','i','e','r',0};
 115     static const WCHAR VenidIntelW[] = {'G','e','n','u','i','n','e','I','n','t','e','l',0};
 116     /* static const WCHAR VenidAMDW[] = {'A','u','t','h','e','n','t','i','c','A','M','D',0}; */
 117
 118     unsigned int i;
 119     HKEY hkey, system_key, cpu_key;
 120     OBJECT_ATTRIBUTES attr;
 121     UNICODE_STRING nameW, valueW;
 122
 123     attr.Length = sizeof(attr);
 124     attr.RootDirectory = 0;
 125     attr.ObjectName = &nameW;
 126     attr.Attributes = 0;
 127     attr.SecurityDescriptor = NULL;
 128     attr.SecurityQualityOfService = NULL;
 129
 130     RtlInitUnicodeString( &nameW, SystemW );
 131     if (NtCreateKey( &system_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
 132
 133     RtlInitUnicodeString( &valueW, IdentifierW );
 134     NtSetValueKey( system_key, &valueW, 0, REG_SZ, SysidW, (strlenW(SysidW)+1) * sizeof(WCHAR) );
 135
 136     attr.RootDirectory = system_key;
 137     RtlInitUnicodeString( &nameW, fpuW );
 138     if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) NtClose( hkey );
 139
 140     RtlInitUnicodeString( &nameW, cpuW );
 141     if (!NtCreateKey( &cpu_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 142     {
 143         for (i = 0; i < info->dwNumberOfProcessors; i++)
 144         {
 145             char num[10], id[20];
 146
 147             attr.RootDirectory = cpu_key;
 148             sprintf( num, "%d", i );
 149             RtlCreateUnicodeStringFromAsciiz( &nameW, num );
 150             if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 151             {
 152                 WCHAR idW[40];
 153                 DWORD cpuMHz = cpuHz / 1000000;
 154
 155                 /*TODO: report 64bit processors properly*/
 156                 RtlInitUnicodeString( &valueW, IdentifierW );
 157                 sprintf( id, "x86 Family %d Model %d Stepping %d",
 158                          info->wProcessorLevel /*model and family are messed up*/, info->wProcessorLevel, info->wProcessorRevision);
 159
 160                 RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
 161                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
 162
 163                 /*TODO; report amd's properly*/
 164                 RtlInitUnicodeString( &valueW, VendorIdentifierW );
 165                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, VenidIntelW, (strlenW(VenidIntelW)+1) * sizeof(WCHAR) );
 166
 167                 RtlInitUnicodeString( &valueW, mhzKeyW );
 168                 NtSetValueKey( hkey, &valueW, 0, REG_DWORD, &cpuMHz, sizeof(DWORD) );
 169                 NtClose( hkey );
 170             }
 171             RtlFreeUnicodeString( &nameW );
 172         }
 173         NtClose( cpu_key );
 174     }
 175     NtClose( system_key );
 176 }
 177
 178 /****************************************************************************
 179  *              QueryPerformanceCounter (KERNEL32.@)
 180  *
 181  * Get the current value of the performance counter.
 182  *
 183  * PARAMS
 184  *  counter [O] Destination for the current counter reading
 185  *
 186  * RETURNS
 187  *  Success: TRUE. counter contains the current reading
 188  *  Failure: FALSE.
 189  *
 190  * SEE ALSO
 191  *  See QueryPerformanceFrequency.
 192  */
 193 BOOL WINAPI QueryPerformanceCounter(PLARGE_INTEGER counter)
 194 {
 195     NtQueryPerformanceCounter( counter, NULL );
 196     return TRUE;
 197 }
 198
 199
 200 /****************************************************************************
 201  *              QueryPerformanceFrequency (KERNEL32.@)
 202  *
 203  * Get the resolution of the performace counter.
 204  *
 205  * PARAMS
 206  *  frequency [O] Destination for the counter resolution
 207  *
 208  * RETURNS
 209  *  Success. TRUE. Frequency contains the resolution of the counter.
 210  *  Failure: FALSE.
 211  *
 212  * SEE ALSO
 213  *  See QueryPerformanceCounter.
 214  */
 215 BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
 216 {
 217     LARGE_INTEGER counter;
 218     NtQueryPerformanceCounter( &counter, frequency );
 219     return TRUE;
 220 }
 221
 222
 223 /***********************************************************************
 224  *                      GetSystemInfo                   [KERNEL32.@]
 225  *
 226  * Get information about the system.
 227  *
 228  * RETURNS
 229  *  Nothing.
 230  *
 231  * NOTES
 232  * On the first call it creates cached values, so it doesn't have to determine
 233  * them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
 234  *
 235  * It creates a registry subhierarchy, looking like:
 236  * "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
 237  * Note that there is a hierarchy for every processor installed, so this
 238  * supports multiprocessor systems. This is done like Win95 does it, I think.
 239  *
 240  * It also creates a cached flag array for IsProcessorFeaturePresent().
 241  */
 242 VOID WINAPI GetSystemInfo(
 243         LPSYSTEM_INFO si        /* [out] Destination for system information, may not be NULL */)
 244 {
 245         static int cache = 0;
 246         static SYSTEM_INFO cachedsi;
 247
 248         TRACE("si=0x%p\n", si);
 249         if (cache) {
 250                 memcpy(si,&cachedsi,sizeof(*si));
 251                 return;
 252         }
 253         memset(PF,0,sizeof(PF));
 254
 255         /* choose sensible defaults ...
 256          * FIXME: perhaps overrideable with precompiler flags?
 257          */
 258         cachedsi.u.s.wProcessorArchitecture     = PROCESSOR_ARCHITECTURE_INTEL;
 259         cachedsi.dwPageSize                     = getpagesize();
 260
 261         /* FIXME: the two entries below should be computed somehow... */
 262         cachedsi.lpMinimumApplicationAddress    = (void *)0x00010000;
 263         cachedsi.lpMaximumApplicationAddress    = (void *)0x7FFFFFFF;
 264         cachedsi.dwActiveProcessorMask          = 1;
 265         cachedsi.dwNumberOfProcessors           = 1;
 266         cachedsi.dwProcessorType                = PROCESSOR_INTEL_PENTIUM;
 267         cachedsi.dwAllocationGranularity        = 0x10000;
 268         cachedsi.wProcessorLevel                = 5; /* 586 */
 269         cachedsi.wProcessorRevision             = 0;
 270
 271         cache = 1; /* even if there is no more info, we now have a cacheentry */
 272         memcpy(si,&cachedsi,sizeof(*si));
 273
 274         /* Hmm, reasonable processor feature defaults? */
 275
 276 #ifdef linux
 277         {
 278         char line[200];
 279         FILE *f = fopen ("/proc/cpuinfo", "r");
 280
 281         if (!f)
 282                 return;
 283         while (fgets(line,200,f)!=NULL) {
 284                 char    *s,*value;
 285
 286                 /* NOTE: the ':' is the only character we can rely on */
 287                 if (!(value = strchr(line,':')))
 288                         continue;
 289
 290                 /* terminate the valuename */
 291                 s = value - 1;
 292                 while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
 293                 *(s + 1) = '\0';
 294
 295                 /* and strip leading spaces from value */
 296                 value += 1;
 297                 while (*value==' ') value++;
 298                 if ((s=strchr(value,'\n')))
 299                         *s='\0';
 300
 301                 /* 2.1 method */
 302                 if (!strcasecmp(line, "cpu family")) {
 303                         if (isdigit (value[0])) {
 304                                 switch (value[0] - '0') {
 305                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 306                                         cachedsi.wProcessorLevel= 3;
 307                                         break;
 308                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 309                                         cachedsi.wProcessorLevel= 4;
 310                                         break;
 311                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 312                                         cachedsi.wProcessorLevel= 5;
 313                                         break;
 314                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 315                                         cachedsi.wProcessorLevel= 6;
 316                                         break;
 317                                 case 1: /* two-figure levels */
 318                                     if (value[1] == '5')
 319                                     {
 320                                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 321                                         cachedsi.wProcessorLevel= 6;
 322                                         break;
 323                                     }
 324                                     /* fall through */
 325                                 default:
 326                                         FIXME("unknown cpu family '%s', please report ! (-> setting to 386)\n", value);
 327                                         break;
 328                                 }
 329                         }
 330                         continue;
 331                 }
 332                 /* old 2.0 method */
 333                 if (!strcasecmp(line, "cpu")) {
 334                         if (    isdigit (value[0]) && value[1] == '8' &&
 335                                 value[2] == '6' && value[3] == 0
 336                         ) {
 337                                 switch (value[0] - '0') {
 338                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 339                                         cachedsi.wProcessorLevel= 3;
 340                                         break;
 341                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 342                                         cachedsi.wProcessorLevel= 4;
 343                                         break;
 344                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 345                                         cachedsi.wProcessorLevel= 5;
 346                                         break;
 347                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 348                                         cachedsi.wProcessorLevel= 6;
 349                                         break;
 350                                 default:
 351                                         FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
 352                                         break;
 353                                 }
 354                         }
 355                         continue;
 356                 }
 357                 if (!strcasecmp(line,"fdiv_bug")) {
 358                         if (!strncasecmp(value,"yes",3))
 359                                 PF[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
 360
 361                         continue;
 362                 }
 363                 if (!strcasecmp(line,"fpu")) {
 364                         if (!strncasecmp(value,"no",2))
 365                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 366
 367                         continue;
 368                 }
 369                 if (!strcasecmp(line,"processor")) {
 370                         /* processor number counts up... */
 371                         unsigned int x;
 372
 373                         if (sscanf(value,"%d",&x))
 374                                 if (x+1>cachedsi.dwNumberOfProcessors)
 375                                         cachedsi.dwNumberOfProcessors=x+1;
 376
 377                         continue;
 378                 }
 379                 if (!strcasecmp(line,"stepping")) {
 380                         int     x;
 381
 382                         if (sscanf(value,"%d",&x))
 383                                 cachedsi.wProcessorRevision = x;
 384
 385                         continue;
 386                 }
 387                 if (!strcasecmp(line, "cpu MHz")) {
 388                         double cmz;
 389                         if (sscanf( value, "%lf", &cmz ) == 1) {
 390                                 /* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
 391                                 cpuHz = cmz * 1000 * 1000;
 392                                 TRACE("CPU speed read as %lld\n", cpuHz);
 393                         }
 394                         continue;
 395                 }
 396                 if (    !strcasecmp(line,"flags")       ||
 397                         !strcasecmp(line,"features")
 398                 ) {
 399                         if (strstr(value,"cx8"))
 400                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 401                         if (strstr(value,"mmx"))
 402                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 403                         if (strstr(value,"tsc"))
 404                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 405                         if (strstr(value,"3dnow"))
 406                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
 407                         /* This will also catch sse2, but we have sse itself
 408                          * if we have sse2, so no problem */
 409                         if (strstr(value,"sse"))
 410                                 PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
 411                         if (strstr(value,"sse2"))
 412                                 PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
 413                         if (strstr(value,"pae"))
 414                                 PF[PF_PAE_ENABLED] = TRUE;
 415
 416                         continue;
 417                 }
 418         }
 419         fclose (f);
 420         }
 421         memcpy(si,&cachedsi,sizeof(*si));
 422 #elif defined (__NetBSD__)
 423         {
 424              int mib[2];
 425              int value[2];
 426              char model[256];
 427              char *cpuclass;
 428              FILE *f = fopen ("/var/run/dmesg.boot", "r");
 429
 430              /* first deduce as much as possible from the sysctls */
 431              mib[0] = CTL_MACHDEP;
 432 #ifdef CPU_FPU_PRESENT
 433              mib[1] = CPU_FPU_PRESENT;
 434              value[1] = sizeof(int);
 435              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 436                  if (value) PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 437                  else       PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 438 #endif
 439 #ifdef CPU_SSE
 440              mib[1] = CPU_SSE;   /* this should imply MMX */
 441              value[1] = sizeof(int);
 442              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 443                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 444 #endif
 445 #ifdef CPU_SSE2
 446              mib[1] = CPU_SSE2;  /* this should imply MMX */
 447              value[1] = sizeof(int);
 448              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 449                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 450 #endif
 451              mib[0] = CTL_HW;
 452              mib[1] = HW_NCPU;
 453              value[1] = sizeof(int);
 454              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 455                  if (value[0] > cachedsi.dwNumberOfProcessors)
 456                     cachedsi.dwNumberOfProcessors = value[0];
 457              mib[1] = HW_MODEL;
 458              value[1] = 255;
 459              if (sysctl(mib, 2, model, value+1, NULL, 0) >= 0) {
 460                   model[value[1]] = '\0'; /* just in case */
 461                   cpuclass = strstr(model, "-class");
 462                   if (cpuclass != NULL) {
 463                        while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
 464                        if (!strncmp(cpuclass+1, "386", 3)) {
 465                             cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 466                             cachedsi.wProcessorLevel= 3;
 467                        }
 468                        if (!strncmp(cpuclass+1, "486", 3)) {
 469                             cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 470                             cachedsi.wProcessorLevel= 4;
 471                        }
 472                        if (!strncmp(cpuclass+1, "586", 3)) {
 473                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 474                             cachedsi.wProcessorLevel= 5;
 475                        }
 476                        if (!strncmp(cpuclass+1, "686", 3)) {
 477                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 478                             cachedsi.wProcessorLevel= 6;
 479                             /* this should imply MMX */
 480                             PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 481                        }
 482                   }
 483              }
 484
 485              /* it may be worth reading from /var/run/dmesg.boot for
 486                 additional information such as CX8, MMX and TSC
 487                 (however this information should be considered less
 488                  reliable than that from the sysctl calls) */
 489              if (f != NULL)
 490              {
 491                  while (fgets(model, 255, f) != NULL) {
 492                         if (sscanf(model,"cpu%d: features %x<", value, value+1) == 2) {
 493                             /* we could scan the string but it is easier
 494                                to test the bits directly */
 495                             if (value[1] & 0x1)
 496                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 497                             if (value[1] & 0x10)
 498                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 499                             if (value[1] & 0x100)
 500                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 501                             if (value[1] & 0x800000)
 502                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 503
 504                             break;
 505                         }
 506                  }
 507                  fclose(f);
 508              }
 509
 510         }
 511         memcpy(si,&cachedsi,sizeof(*si));
 512 #elif defined(__FreeBSD__)
 513         {
 514         unsigned int regs[4], regs2[4];
 515         int ret, len, num;
 516         if (!have_cpuid())
 517                 regs[0] = 0;                    /* No cpuid support -- skip the rest */
 518         else
 519                 do_cpuid(0x00000000, regs);     /* get standard cpuid level and vendor name */
 520         if (regs[0]>=0x00000001) {              /* Check for supported cpuid version */
 521                 do_cpuid(0x00000001, regs2);    /* get cpu features */
 522                 switch ((regs2[0] >> 8)&0xf) {  /* cpu family */
 523                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 524                         cachedsi.wProcessorLevel = 3;
 525                         break;
 526                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 527                         cachedsi.wProcessorLevel = 4;
 528                         break;
 529                 case 5:
 530                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 531                         cachedsi.wProcessorLevel = 5;
 532                         break;
 533                 case 6:
 534                 case 15: /* PPro/2/3/4 has same info as P1 */
 535                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 536                         cachedsi.wProcessorLevel = 6;
 537                         break;
 538                 default:
 539                         FIXME("unknown FreeBSD cpu family %d, please report! (-> setting to 386)\n", \
 540                                 (regs2[0] >> 8)&0xf);
 541                         break;
 542                 }
 543                 PF[PF_FLOATING_POINT_EMULATED]     = !(regs2[3] & 1);
 544                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
 545                 PF[PF_COMPARE_EXCHANGE_DOUBLE]     = (regs2[3] & (1 << 8 )) >> 8;
 546                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE]  = (regs2[3] & (1 << 23)) >> 23;
 547                 /* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
 548                 /*len = sizeof(num);
 549                 ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
 550                 if (!ret)
 551                         PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
 552
 553                 if (regs[1] == AUTH &&
 554                     regs[3] == ENTI &&
 555                     regs[2] == CAMD) {
 556                         do_cpuid(0x80000000, regs);             /* get vendor cpuid level */
 557                         if (regs[0]>=0x80000001) {
 558                                 do_cpuid(0x80000001, regs2);    /* get vendor features */
 559                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] =
 560                                     (regs2[3] & (1 << 31 )) >> 31;
 561                         }
 562                 }
 563         }
 564         len = sizeof(num);
 565         ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
 566         if (!ret)
 567                 cachedsi.dwNumberOfProcessors = num;
 568         }
 569         memcpy(si,&cachedsi,sizeof(*si));
 570 #elif defined (__APPLE__)
 571         {
 572         size_t valSize;
 573         unsigned long long longVal;
 574         int value;
 575         int cputype;
 576
 577         valSize = sizeof(int);
 578         if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
 579         {
 580             if (value)
 581                 PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 582             else
 583                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 584         }
 585         valSize = sizeof(int);
 586         if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
 587         cachedsi.dwNumberOfProcessors = value;
 588
 589         valSize = sizeof(int);
 590         if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
 591             cachedsi.dwActiveProcessorMask = value;
 592
 593         valSize = sizeof(int);
 594         if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
 595         {
 596             valSize = sizeof(int);
 597             if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
 598             {
 599                 switch (cputype)
 600                 {
 601                     case CPU_TYPE_POWERPC:
 602                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
 603                         switch (value)
 604                         {
 605                             case CPU_SUBTYPE_POWERPC_601:
 606                             case CPU_SUBTYPE_POWERPC_602:
 607                                 cachedsi.dwProcessorType = PROCESSOR_PPC_601;
 608                                 cachedsi.wProcessorLevel = 1;
 609                                 break;
 610                             case CPU_SUBTYPE_POWERPC_603:
 611                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 612                                 cachedsi.wProcessorLevel = 3;
 613                                 break;
 614                             case CPU_SUBTYPE_POWERPC_603e:
 615                             case CPU_SUBTYPE_POWERPC_603ev:
 616                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 617                                 cachedsi.wProcessorLevel = 6;
 618                                 break;
 619                             case CPU_SUBTYPE_POWERPC_604:
 620                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 621                                 cachedsi.wProcessorLevel = 4;
 622                                 break;
 623                             case CPU_SUBTYPE_POWERPC_604e:
 624                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 625                                 cachedsi.wProcessorLevel = 9;
 626                                 break;
 627                             case CPU_SUBTYPE_POWERPC_620:
 628                                 cachedsi.dwProcessorType = PROCESSOR_PPC_620;
 629                                 cachedsi.wProcessorLevel = 20;
 630                                 break;
 631                             case CPU_SUBTYPE_POWERPC_750:
 632                             case CPU_SUBTYPE_POWERPC_7400:
 633                             case CPU_SUBTYPE_POWERPC_7450:
 634                                 /* G3/G4 derivate from 603 so ... */
 635                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 636                                 cachedsi.wProcessorLevel = 6;
 637                                 break;
 638                             case CPU_SUBTYPE_POWERPC_970:
 639                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 640                                 cachedsi.wProcessorLevel = 9;
 641                                 /* :o) PF[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
 642                                 break;
 643                             default: break;
 644                         }
 645                         break; /* CPU_TYPE_POWERPC */
 646                     case CPU_TYPE_I386:
 647                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
 648                         switch (value)
 649                         {
 650                             case CPU_SUBTYPE_386:
 651                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 652                                 cachedsi.wProcessorLevel = 3;
 653                                 break;
 654                             case CPU_SUBTYPE_486:
 655                             case CPU_SUBTYPE_486SX:
 656                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 657                                 cachedsi.wProcessorLevel = 4;
 658                                 break;
 659                             case CPU_SUBTYPE_586:
 660                             case CPU_SUBTYPE_PENTPRO:
 661                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 662                                 cachedsi.wProcessorLevel = 5;
 663                                 break;
 664                             case CPU_SUBTYPE_PENTII_M3:
 665                             case CPU_SUBTYPE_PENTII_M5:
 666                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 667                                 cachedsi.wProcessorLevel = 5;
 668                                 /* this should imply MMX */
 669                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 670                                 break;
 671                             default: break;
 672                         }
 673                         break; /* CPU_TYPE_I386 */
 674                     default: break;
 675                 } /* switch (cputype) */
 676             }
 677         }
 678         valSize = sizeof(longVal);
 679         if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
 680             cpuHz = longVal;
 681         }
 682         memcpy(si,&cachedsi,sizeof(*si));
 683 #else
 684         FIXME("not yet supported on this system\n");
 685 #endif
 686         TRACE("<- CPU arch %d, res'd %d, pagesize %ld, minappaddr %p, maxappaddr %p,"
 687               " act.cpumask %08lx, numcpus %ld, CPU type %ld, allocgran. %ld, CPU level %d, CPU rev %d\n",
 688               si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
 689               si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
 690               si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
 691               si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
 692
 693         create_registry_keys( &cachedsi );
 694 }
 695
 696
 697 /***********************************************************************
 698  *                      IsProcessorFeaturePresent       [KERNEL32.@]
 699  *
 700  * Determine if the cpu supports a given feature.
 701  *
 702  * RETURNS
 703  *  TRUE, If the processor supports feature,
 704  *  FALSE otherwise.
 705  */
 706 BOOL WINAPI IsProcessorFeaturePresent (
 707         DWORD feature   /* [in] Feature number, (PF_ constants from "winnt.h") */)
 708 {
 709   SYSTEM_INFO si;
 710   GetSystemInfo (&si); /* To ensure the information is loaded and cached */
 711
 712   if (feature < 64)
 713     return PF[feature];
 714   else
 715     return FALSE;
 716 }