git.oblomov.eu Git - wine/blob - dlls/kernel/cpu.c

   1 /*
   2  * What processor?
   3  *
   4  * Copyright 1995,1997 Morten Welinder
   5  * Copyright 1997-1998 Marcus Meissner
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include "config.h"
  23 #include "wine/port.h"
  24
  25 #ifdef HAVE_SYS_PARAM_H
  26 # include <sys/param.h>
  27 #endif
  28 #ifdef HAVE_SYS_SYSCTL_H
  29 # include <sys/sysctl.h>
  30 #endif
  31 #ifdef HAVE_MACHINE_CPU_H
  32 # include <machine/cpu.h>
  33 #endif
  34
  35 #include <ctype.h>
  36 #include <string.h>
  37 #include <stdarg.h>
  38 #include <stdio.h>
  39 #include <stdlib.h>
  40 #ifdef HAVE_SYS_TIME_H
  41 # include <sys/time.h>
  42 #endif
  43
  44
  45 #define NONAMELESSUNION
  46 #define NONAMELESSSTRUCT
  47 #include "windef.h"
  48 #include "winbase.h"
  49 #include "winnt.h"
  50 #include "winreg.h"
  51 #include "winternl.h"
  52 #include "winerror.h"
  53 #include "wine/unicode.h"
  54 #include "wine/debug.h"
  55
  56 WINE_DEFAULT_DEBUG_CHANNEL(reg);
  57
  58 #define AUTH    0x68747541      /* "Auth" */
  59 #define ENTI    0x69746e65      /* "enti" */
  60 #define CAMD    0x444d4163      /* "cAMD" */
  61
  62 /* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
  63  * We are compiled with -fPIC, so we can't clobber ebx.
  64  */
  65 static inline void do_cpuid(int ax, int *p)
  66 {
  67 #ifdef __i386__
  68         __asm__("pushl %%ebx\n\t"
  69                 "cpuid\n\t"
  70                 "movl %%ebx, %%esi\n\t"
  71                 "popl %%ebx"
  72                 : "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
  73                 :  "0" (ax));
  74 #endif
  75 }
  76
  77 /* From xf86info havecpuid.c 1.11 */
  78 static inline int have_cpuid(void)
  79 {
  80 #ifdef __i386__
  81         unsigned int f1, f2;
  82         __asm__("pushfl\n\t"
  83                 "pushfl\n\t"
  84                 "popl %0\n\t"
  85                 "movl %0,%1\n\t"
  86                 "xorl %2,%0\n\t"
  87                 "pushl %0\n\t"
  88                 "popfl\n\t"
  89                 "pushfl\n\t"
  90                 "popl %0\n\t"
  91                 "popfl"
  92                 : "=&r" (f1), "=&r" (f2)
  93                 : "ir" (0x00200000));
  94         return ((f1^f2) & 0x00200000) != 0;
  95 #else
  96         return 0;
  97 #endif
  98 }
  99
 100 static BYTE PF[64] = {0,};
 101 static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
 102
 103 static void create_registry_keys( const SYSTEM_INFO *info )
 104 {
 105     static const WCHAR SystemW[] = {'M','a','c','h','i','n','e','\\',
 106                                     'H','a','r','d','w','a','r','e','\\',
 107                                     'D','e','s','c','r','i','p','t','i','o','n','\\',
 108                                     'S','y','s','t','e','m',0};
 109     static const WCHAR fpuW[] = {'F','l','o','a','t','i','n','g','P','o','i','n','t','P','r','o','c','e','s','s','o','r',0};
 110     static const WCHAR cpuW[] = {'C','e','n','t','r','a','l','P','r','o','c','e','s','s','o','r',0};
 111     static const WCHAR IdentifierW[] = {'I','d','e','n','t','i','f','i','e','r',0};
 112     static const WCHAR SysidW[] = {'A','T',' ','c','o','m','p','a','t','i','b','l','e',0};
 113     static const WCHAR mhzKeyW[] = {'~','M','H','z',0};
 114     static const WCHAR VendorIdentifierW[] = {'V','e','n','d','o','r','I','d','e','n','t','i','f','i','e','r',0};
 115     static const WCHAR VenidIntelW[] = {'G','e','n','u','i','n','e','I','n','t','e','l',0};
 116     /* static const WCHAR VenidAMDW[] = {'A','u','t','h','e','n','t','i','c','A','M','D',0}; */
 117
 118     unsigned int i;
 119     HKEY hkey, system_key, cpu_key;
 120     OBJECT_ATTRIBUTES attr;
 121     UNICODE_STRING nameW, valueW;
 122
 123     attr.Length = sizeof(attr);
 124     attr.RootDirectory = 0;
 125     attr.ObjectName = &nameW;
 126     attr.Attributes = 0;
 127     attr.SecurityDescriptor = NULL;
 128     attr.SecurityQualityOfService = NULL;
 129
 130     RtlInitUnicodeString( &nameW, SystemW );
 131     if (NtCreateKey( &system_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
 132
 133     RtlInitUnicodeString( &valueW, IdentifierW );
 134     NtSetValueKey( system_key, &valueW, 0, REG_SZ, SysidW, (strlenW(SysidW)+1) * sizeof(WCHAR) );
 135
 136     attr.RootDirectory = system_key;
 137     RtlInitUnicodeString( &nameW, fpuW );
 138     if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) NtClose( hkey );
 139
 140     RtlInitUnicodeString( &nameW, cpuW );
 141     if (!NtCreateKey( &cpu_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 142     {
 143         for (i = 0; i < info->dwNumberOfProcessors; i++)
 144         {
 145             char num[10], id[20];
 146
 147             attr.RootDirectory = cpu_key;
 148             sprintf( num, "%d", i );
 149             RtlCreateUnicodeStringFromAsciiz( &nameW, num );
 150             if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 151             {
 152                 WCHAR idW[40];
 153                 DWORD cpuMHz = cpuHz / 1000000;
 154
 155                 /*TODO: report 64bit processors properly*/
 156                 RtlInitUnicodeString( &valueW, IdentifierW );
 157                 sprintf( id, "x86 Family %d Model %d Stepping %d",
 158                          info->wProcessorLevel /*model and family are messed up*/, info->wProcessorLevel, info->wProcessorRevision);
 159
 160                 RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
 161                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
 162
 163                 /*TODO; report amd's properly*/
 164                 RtlInitUnicodeString( &valueW, VendorIdentifierW );
 165                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, VenidIntelW, (strlenW(VenidIntelW)+1) * sizeof(WCHAR) );
 166
 167                 RtlInitUnicodeString( &valueW, mhzKeyW );
 168                 NtSetValueKey( hkey, &valueW, 0, REG_DWORD, &cpuMHz, sizeof(DWORD) );
 169                 NtClose( hkey );
 170             }
 171             RtlFreeUnicodeString( &nameW );
 172         }
 173         NtClose( cpu_key );
 174     }
 175     NtClose( system_key );
 176 }
 177
 178 /****************************************************************************
 179  *              QueryPerformanceCounter (KERNEL32.@)
 180  *
 181  * Get the current value of the performance counter.
 182  *
 183  * PARAMS
 184  *  counter [O] Destination for the current counter reading
 185  *
 186  * RETURNS
 187  *  Success: TRUE. counter contains the current reading
 188  *  Failure: FALSE.
 189  *
 190  * SEE ALSO
 191  *  See QueryPerformanceFrequency.
 192  */
 193 BOOL WINAPI QueryPerformanceCounter(PLARGE_INTEGER counter)
 194 {
 195     LARGE_INTEGER frequency;
 196     NtQueryPerformanceCounter( counter, &frequency );
 197     return TRUE;
 198 }
 199
 200
 201 /****************************************************************************
 202  *              QueryPerformanceFrequency (KERNEL32.@)
 203  *
 204  * Get the resolution of the performace counter.
 205  *
 206  * PARAMS
 207  *  frequency [O] Destination for the counter resolution
 208  *
 209  * RETURNS
 210  *  Success. TRUE. Frequency contains the resolution of the counter.
 211  *  Failure: FALSE.
 212  *
 213  * SEE ALSO
 214  *  See QueryPerformanceCounter.
 215  */
 216 BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
 217 {
 218     LARGE_INTEGER counter;
 219     NtQueryPerformanceCounter( &counter, frequency );
 220     return TRUE;
 221 }
 222
 223
 224 /***********************************************************************
 225  *                      GetSystemInfo                   [KERNEL32.@]
 226  *
 227  * Get information about the system.
 228  *
 229  * RETURNS
 230  *  Nothing.
 231  *
 232  * NOTES
 233  * On the first call it creates cached values, so it doesn't have to determine
 234  * them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
 235  *
 236  * It creates a registry subhierarchy, looking like:
 237  * "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
 238  * Note that there is a hierarchy for every processor installed, so this
 239  * supports multiprocessor systems. This is done like Win95 does it, I think.
 240  *
 241  * It also creates a cached flag array for IsProcessorFeaturePresent().
 242  */
 243 VOID WINAPI GetSystemInfo(
 244         LPSYSTEM_INFO si        /* [out] Destination for system information, may not be NULL */)
 245 {
 246         static int cache = 0;
 247         static SYSTEM_INFO cachedsi;
 248
 249         TRACE("si=0x%p\n", si);
 250         if (cache) {
 251                 memcpy(si,&cachedsi,sizeof(*si));
 252                 return;
 253         }
 254         memset(PF,0,sizeof(PF));
 255
 256         /* choose sensible defaults ...
 257          * FIXME: perhaps overrideable with precompiler flags?
 258          */
 259         cachedsi.u.s.wProcessorArchitecture     = PROCESSOR_ARCHITECTURE_INTEL;
 260         cachedsi.dwPageSize                     = getpagesize();
 261
 262         /* FIXME: the two entries below should be computed somehow... */
 263         cachedsi.lpMinimumApplicationAddress    = (void *)0x00010000;
 264         cachedsi.lpMaximumApplicationAddress    = (void *)0x7FFFFFFF;
 265         cachedsi.dwActiveProcessorMask          = 1;
 266         cachedsi.dwNumberOfProcessors           = 1;
 267         cachedsi.dwProcessorType                = PROCESSOR_INTEL_PENTIUM;
 268         cachedsi.dwAllocationGranularity        = 0x10000;
 269         cachedsi.wProcessorLevel                = 5; /* 586 */
 270         cachedsi.wProcessorRevision             = 0;
 271
 272         cache = 1; /* even if there is no more info, we now have a cacheentry */
 273         memcpy(si,&cachedsi,sizeof(*si));
 274
 275         /* Hmm, reasonable processor feature defaults? */
 276
 277 #ifdef linux
 278         {
 279         char line[200];
 280         FILE *f = fopen ("/proc/cpuinfo", "r");
 281
 282         if (!f)
 283                 return;
 284         while (fgets(line,200,f)!=NULL) {
 285                 char    *s,*value;
 286
 287                 /* NOTE: the ':' is the only character we can rely on */
 288                 if (!(value = strchr(line,':')))
 289                         continue;
 290
 291                 /* terminate the valuename */
 292                 s = value - 1;
 293                 while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
 294                 *(s + 1) = '\0';
 295
 296                 /* and strip leading spaces from value */
 297                 value += 1;
 298                 while (*value==' ') value++;
 299                 if ((s=strchr(value,'\n')))
 300                         *s='\0';
 301
 302                 /* 2.1 method */
 303                 if (!strcasecmp(line, "cpu family")) {
 304                         if (isdigit (value[0])) {
 305                                 switch (value[0] - '0') {
 306                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 307                                         cachedsi.wProcessorLevel= 3;
 308                                         break;
 309                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 310                                         cachedsi.wProcessorLevel= 4;
 311                                         break;
 312                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 313                                         cachedsi.wProcessorLevel= 5;
 314                                         break;
 315                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 316                                         cachedsi.wProcessorLevel= 6;
 317                                         break;
 318                                 case 1: /* two-figure levels */
 319                                     if (value[1] == '5')
 320                                     {
 321                                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 322                                         cachedsi.wProcessorLevel= 6;
 323                                         break;
 324                                     }
 325                                     /* fall through */
 326                                 default:
 327                                         FIXME("unknown cpu family '%s', please report ! (-> setting to 386)\n", value);
 328                                         break;
 329                                 }
 330                         }
 331                         continue;
 332                 }
 333                 /* old 2.0 method */
 334                 if (!strcasecmp(line, "cpu")) {
 335                         if (    isdigit (value[0]) && value[1] == '8' &&
 336                                 value[2] == '6' && value[3] == 0
 337                         ) {
 338                                 switch (value[0] - '0') {
 339                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 340                                         cachedsi.wProcessorLevel= 3;
 341                                         break;
 342                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 343                                         cachedsi.wProcessorLevel= 4;
 344                                         break;
 345                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 346                                         cachedsi.wProcessorLevel= 5;
 347                                         break;
 348                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 349                                         cachedsi.wProcessorLevel= 6;
 350                                         break;
 351                                 default:
 352                                         FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
 353                                         break;
 354                                 }
 355                         }
 356                         continue;
 357                 }
 358                 if (!strcasecmp(line,"fdiv_bug")) {
 359                         if (!strncasecmp(value,"yes",3))
 360                                 PF[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
 361
 362                         continue;
 363                 }
 364                 if (!strcasecmp(line,"fpu")) {
 365                         if (!strncasecmp(value,"no",2))
 366                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 367
 368                         continue;
 369                 }
 370                 if (!strcasecmp(line,"processor")) {
 371                         /* processor number counts up... */
 372                         unsigned int x;
 373
 374                         if (sscanf(value,"%d",&x))
 375                                 if (x+1>cachedsi.dwNumberOfProcessors)
 376                                         cachedsi.dwNumberOfProcessors=x+1;
 377
 378                         continue;
 379                 }
 380                 if (!strcasecmp(line,"stepping")) {
 381                         int     x;
 382
 383                         if (sscanf(value,"%d",&x))
 384                                 cachedsi.wProcessorRevision = x;
 385
 386                         continue;
 387                 }
 388                 if (!strcasecmp(line, "cpu MHz")) {
 389                         double cmz;
 390                         if (sscanf( value, "%lf", &cmz ) == 1) {
 391                                 /* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
 392                                 cpuHz = cmz * 1000 * 1000;
 393                                 TRACE("CPU speed read as %lld\n", cpuHz);
 394                         }
 395                         continue;
 396                 }
 397                 if (    !strcasecmp(line,"flags")       ||
 398                         !strcasecmp(line,"features")
 399                 ) {
 400                         if (strstr(value,"cx8"))
 401                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 402                         if (strstr(value,"mmx"))
 403                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 404                         if (strstr(value,"tsc"))
 405                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 406                         if (strstr(value,"3dnow"))
 407                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
 408                         /* This will also catch sse2, but we have sse itself
 409                          * if we have sse2, so no problem */
 410                         if (strstr(value,"sse"))
 411                                 PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
 412                         if (strstr(value,"sse2"))
 413                                 PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
 414                         if (strstr(value,"pae"))
 415                                 PF[PF_PAE_ENABLED] = TRUE;
 416
 417                         continue;
 418                 }
 419         }
 420         fclose (f);
 421         }
 422         memcpy(si,&cachedsi,sizeof(*si));
 423 #elif defined (__NetBSD__)
 424         {
 425              int mib[2];
 426              int value[2];
 427              char model[256];
 428              char *cpuclass;
 429              FILE *f = fopen ("/var/run/dmesg.boot", "r");
 430
 431              /* first deduce as much as possible from the sysctls */
 432              mib[0] = CTL_MACHDEP;
 433 #ifdef CPU_FPU_PRESENT
 434              mib[1] = CPU_FPU_PRESENT;
 435              value[1] = sizeof(int);
 436              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 437                  if (value) PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 438                  else       PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 439 #endif
 440 #ifdef CPU_SSE
 441              mib[1] = CPU_SSE;   /* this should imply MMX */
 442              value[1] = sizeof(int);
 443              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 444                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 445 #endif
 446 #ifdef CPU_SSE2
 447              mib[1] = CPU_SSE2;  /* this should imply MMX */
 448              value[1] = sizeof(int);
 449              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 450                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 451 #endif
 452              mib[0] = CTL_HW;
 453              mib[1] = HW_NCPU;
 454              value[1] = sizeof(int);
 455              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 456                  if (value[0] > cachedsi.dwNumberOfProcessors)
 457                     cachedsi.dwNumberOfProcessors = value[0];
 458              mib[1] = HW_MODEL;
 459              value[1] = 255;
 460              if (sysctl(mib, 2, model, value+1, NULL, 0) >= 0) {
 461                   model[value[1]] = '\0'; /* just in case */
 462                   cpuclass = strstr(model, "-class");
 463                   if (cpuclass != NULL) {
 464                        while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
 465                        if (!strncmp(cpuclass+1, "386", 3)) {
 466                             cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 467                             cachedsi.wProcessorLevel= 3;
 468                        }
 469                        if (!strncmp(cpuclass+1, "486", 3)) {
 470                             cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 471                             cachedsi.wProcessorLevel= 4;
 472                        }
 473                        if (!strncmp(cpuclass+1, "586", 3)) {
 474                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 475                             cachedsi.wProcessorLevel= 5;
 476                        }
 477                        if (!strncmp(cpuclass+1, "686", 3)) {
 478                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 479                             cachedsi.wProcessorLevel= 6;
 480                             /* this should imply MMX */
 481                             PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 482                        }
 483                   }
 484              }
 485
 486              /* it may be worth reading from /var/run/dmesg.boot for
 487                 additional information such as CX8, MMX and TSC
 488                 (however this information should be considered less
 489                  reliable than that from the sysctl calls) */
 490              if (f != NULL)
 491              {
 492                  while (fgets(model, 255, f) != NULL) {
 493                         if (sscanf(model,"cpu%d: features %x<", value, value+1) == 2) {
 494                             /* we could scan the string but it is easier
 495                                to test the bits directly */
 496                             if (value[1] & 0x1)
 497                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 498                             if (value[1] & 0x10)
 499                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 500                             if (value[1] & 0x100)
 501                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 502                             if (value[1] & 0x800000)
 503                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 504
 505                             break;
 506                         }
 507                  }
 508                  fclose(f);
 509              }
 510
 511         }
 512         memcpy(si,&cachedsi,sizeof(*si));
 513 #elif defined(__FreeBSD__)
 514         {
 515         unsigned int regs[4], regs2[4];
 516         int ret, len, num;
 517         if (!have_cpuid())
 518                 regs[0] = 0;                    /* No cpuid support -- skip the rest */
 519         else
 520                 do_cpuid(0x00000000, regs);     /* get standard cpuid level and vendor name */
 521         if (regs[0]>=0x00000001) {              /* Check for supported cpuid version */
 522                 do_cpuid(0x00000001, regs2);    /* get cpu features */
 523                 switch ((regs2[0] >> 8)&0xf) {  /* cpu family */
 524                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 525                         cachedsi.wProcessorLevel = 3;
 526                         break;
 527                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 528                         cachedsi.wProcessorLevel = 4;
 529                         break;
 530                 case 5:
 531                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 532                         cachedsi.wProcessorLevel = 5;
 533                         break;
 534                 case 6:
 535                 case 15: /* PPro/2/3/4 has same info as P1 */
 536                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 537                         cachedsi.wProcessorLevel = 6;
 538                         break;
 539                 default:
 540                         FIXME("unknown FreeBSD cpu family %d, please report! (-> setting to 386)\n", \
 541                                 (regs2[0] >> 8)&0xf);
 542                         break;
 543                 }
 544                 PF[PF_FLOATING_POINT_EMULATED]     = !(regs2[3] & 1);
 545                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
 546                 PF[PF_COMPARE_EXCHANGE_DOUBLE]     = (regs2[3] & (1 << 8 )) >> 8;
 547                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE]  = (regs2[3] & (1 << 23)) >> 23;
 548                 /* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
 549                 /*len = sizeof(num);
 550                 ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
 551                 if (!ret)
 552                         PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
 553
 554                 if (regs[1] == AUTH &&
 555                     regs[3] == ENTI &&
 556                     regs[2] == CAMD) {
 557                         do_cpuid(0x80000000, regs);             /* get vendor cpuid level */
 558                         if (regs[0]>=0x80000001) {
 559                                 do_cpuid(0x80000001, regs2);    /* get vendor features */
 560                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] =
 561                                     (regs2[3] & (1 << 31 )) >> 31;
 562                         }
 563                 }
 564         }
 565         len = sizeof(num);
 566         ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
 567         if (!ret)
 568                 cachedsi.dwNumberOfProcessors = num;
 569         }
 570         memcpy(si,&cachedsi,sizeof(*si));
 571 #elif defined (__APPLE__)
 572         {
 573         size_t valSize;
 574         unsigned long long longVal;
 575         int value;
 576         int cputype;
 577
 578         valSize = sizeof(int);
 579         if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
 580         {
 581             if (value)
 582                 PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 583             else
 584                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 585         }
 586         valSize = sizeof(int);
 587         if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
 588         cachedsi.dwNumberOfProcessors = value;
 589
 590         valSize = sizeof(int);
 591         if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
 592             cachedsi.dwActiveProcessorMask = value;
 593
 594         valSize = sizeof(int);
 595         if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
 596         {
 597             valSize = sizeof(int);
 598             if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
 599             {
 600                 switch (cputype)
 601                 {
 602                     case CPU_TYPE_POWERPC:
 603                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
 604                         switch (value)
 605                         {
 606                             case CPU_SUBTYPE_POWERPC_601:
 607                             case CPU_SUBTYPE_POWERPC_602:
 608                                 cachedsi.dwProcessorType = PROCESSOR_PPC_601;
 609                                 cachedsi.wProcessorLevel = 1;
 610                                 break;
 611                             case CPU_SUBTYPE_POWERPC_603:
 612                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 613                                 cachedsi.wProcessorLevel = 3;
 614                                 break;
 615                             case CPU_SUBTYPE_POWERPC_603e:
 616                             case CPU_SUBTYPE_POWERPC_603ev:
 617                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 618                                 cachedsi.wProcessorLevel = 6;
 619                                 break;
 620                             case CPU_SUBTYPE_POWERPC_604:
 621                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 622                                 cachedsi.wProcessorLevel = 4;
 623                                 break;
 624                             case CPU_SUBTYPE_POWERPC_604e:
 625                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 626                                 cachedsi.wProcessorLevel = 9;
 627                                 break;
 628                             case CPU_SUBTYPE_POWERPC_620:
 629                                 cachedsi.dwProcessorType = PROCESSOR_PPC_620;
 630                                 cachedsi.wProcessorLevel = 20;
 631                                 break;
 632                             case CPU_SUBTYPE_POWERPC_750:
 633                             case CPU_SUBTYPE_POWERPC_7400:
 634                             case CPU_SUBTYPE_POWERPC_7450:
 635                                 /* G3/G4 derivate from 603 so ... */
 636                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 637                                 cachedsi.wProcessorLevel = 6;
 638                                 break;
 639                             case CPU_SUBTYPE_POWERPC_970:
 640                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 641                                 cachedsi.wProcessorLevel = 9;
 642                                 /* :o) PF[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
 643                                 break;
 644                             default: break;
 645                         }
 646                         break; /* CPU_TYPE_POWERPC */
 647                     case CPU_TYPE_I386:
 648                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
 649                         switch (value)
 650                         {
 651                             case CPU_SUBTYPE_386:
 652                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 653                                 cachedsi.wProcessorLevel = 3;
 654                                 break;
 655                             case CPU_SUBTYPE_486:
 656                             case CPU_SUBTYPE_486SX:
 657                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 658                                 cachedsi.wProcessorLevel = 4;
 659                                 break;
 660                             case CPU_SUBTYPE_586:
 661                             case CPU_SUBTYPE_PENTPRO:
 662                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 663                                 cachedsi.wProcessorLevel = 5;
 664                                 break;
 665                             case CPU_SUBTYPE_PENTII_M3:
 666                             case CPU_SUBTYPE_PENTII_M5:
 667                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 668                                 cachedsi.wProcessorLevel = 5;
 669                                 /* this should imply MMX */
 670                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 671                                 break;
 672                             default: break;
 673                         }
 674                         break; /* CPU_TYPE_I386 */
 675                     default: break;
 676                 } /* switch (cputype) */
 677             }
 678         }
 679         valSize = sizeof(longVal);
 680         if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
 681             cpuHz = longVal;
 682         }
 683         memcpy(si,&cachedsi,sizeof(*si));
 684 #else
 685         FIXME("not yet supported on this system\n");
 686 #endif
 687         TRACE("<- CPU arch %d, res'd %d, pagesize %ld, minappaddr %p, maxappaddr %p,"
 688               " act.cpumask %08lx, numcpus %ld, CPU type %ld, allocgran. %ld, CPU level %d, CPU rev %d\n",
 689               si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
 690               si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
 691               si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
 692               si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
 693
 694         create_registry_keys( &cachedsi );
 695 }
 696
 697
 698 /***********************************************************************
 699  *                      IsProcessorFeaturePresent       [KERNEL32.@]
 700  *
 701  * Determine if the cpu supports a given feature.
 702  *
 703  * RETURNS
 704  *  TRUE, If the processor supports feature,
 705  *  FALSE otherwise.
 706  */
 707 BOOL WINAPI IsProcessorFeaturePresent (
 708         DWORD feature   /* [in] Feature number, (PF_ constants from "winnt.h") */)
 709 {
 710   SYSTEM_INFO si;
 711   GetSystemInfo (&si); /* To ensure the information is loaded and cached */
 712
 713   if (feature < 64)
 714     return PF[feature];
 715   else
 716     return FALSE;
 717 }