git.oblomov.eu Git - wine/blob - dlls/kernel/cpu.c

   1 /*
   2  * What processor?
   3  *
   4  * Copyright 1995,1997 Morten Welinder
   5  * Copyright 1997-1998 Marcus Meissner
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2.1 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include "config.h"
  23 #include "wine/port.h"
  24
  25 #ifdef HAVE_SYS_PARAM_H
  26 # include <sys/param.h>
  27 #endif
  28 #ifdef HAVE_SYS_SYSCTL_H
  29 # include <sys/sysctl.h>
  30 #endif
  31 #ifdef HAVE_MACHINE_CPU_H
  32 # include <machine/cpu.h>
  33 #endif
  34 #ifdef HAVE_MACH_MACHINE_H
  35 # include <mach/machine.h>
  36 #endif
  37
  38 #include <ctype.h>
  39 #include <string.h>
  40 #include <stdarg.h>
  41 #include <stdio.h>
  42 #include <stdlib.h>
  43 #ifdef HAVE_SYS_TIME_H
  44 # include <sys/time.h>
  45 #endif
  46
  47
  48 #define NONAMELESSUNION
  49 #define NONAMELESSSTRUCT
  50 #include "windef.h"
  51 #include "winbase.h"
  52 #include "winnt.h"
  53 #include "winreg.h"
  54 #include "winternl.h"
  55 #include "winerror.h"
  56 #include "wine/unicode.h"
  57 #include "wine/debug.h"
  58
  59 WINE_DEFAULT_DEBUG_CHANNEL(reg);
  60
  61 #define AUTH    0x68747541      /* "Auth" */
  62 #define ENTI    0x69746e65      /* "enti" */
  63 #define CAMD    0x444d4163      /* "cAMD" */
  64
  65 /* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
  66  * We are compiled with -fPIC, so we can't clobber ebx.
  67  */
  68 static inline void do_cpuid(int ax, int *p)
  69 {
  70 #ifdef __i386__
  71         __asm__("pushl %%ebx\n\t"
  72                 "cpuid\n\t"
  73                 "movl %%ebx, %%esi\n\t"
  74                 "popl %%ebx"
  75                 : "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
  76                 :  "0" (ax));
  77 #endif
  78 }
  79
  80 /* From xf86info havecpuid.c 1.11 */
  81 static inline int have_cpuid(void)
  82 {
  83 #ifdef __i386__
  84         unsigned int f1, f2;
  85         __asm__("pushfl\n\t"
  86                 "pushfl\n\t"
  87                 "popl %0\n\t"
  88                 "movl %0,%1\n\t"
  89                 "xorl %2,%0\n\t"
  90                 "pushl %0\n\t"
  91                 "popfl\n\t"
  92                 "pushfl\n\t"
  93                 "popl %0\n\t"
  94                 "popfl"
  95                 : "=&r" (f1), "=&r" (f2)
  96                 : "ir" (0x00200000));
  97         return ((f1^f2) & 0x00200000) != 0;
  98 #else
  99         return 0;
 100 #endif
 101 }
 102
 103 static BYTE PF[64] = {0,};
 104 static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
 105
 106 static void create_registry_keys( const SYSTEM_INFO *info )
 107 {
 108     static const WCHAR SystemW[] = {'M','a','c','h','i','n','e','\\',
 109                                     'H','a','r','d','w','a','r','e','\\',
 110                                     'D','e','s','c','r','i','p','t','i','o','n','\\',
 111                                     'S','y','s','t','e','m',0};
 112     static const WCHAR fpuW[] = {'F','l','o','a','t','i','n','g','P','o','i','n','t','P','r','o','c','e','s','s','o','r',0};
 113     static const WCHAR cpuW[] = {'C','e','n','t','r','a','l','P','r','o','c','e','s','s','o','r',0};
 114     static const WCHAR IdentifierW[] = {'I','d','e','n','t','i','f','i','e','r',0};
 115     static const WCHAR SysidW[] = {'A','T',' ','c','o','m','p','a','t','i','b','l','e',0};
 116     static const WCHAR mhzKeyW[] = {'~','M','H','z',0};
 117     static const WCHAR VendorIdentifierW[] = {'V','e','n','d','o','r','I','d','e','n','t','i','f','i','e','r',0};
 118     static const WCHAR VenidIntelW[] = {'G','e','n','u','i','n','e','I','n','t','e','l',0};
 119     /* static const WCHAR VenidAMDW[] = {'A','u','t','h','e','n','t','i','c','A','M','D',0}; */
 120
 121     unsigned int i;
 122     HKEY hkey, system_key, cpu_key;
 123     OBJECT_ATTRIBUTES attr;
 124     UNICODE_STRING nameW, valueW;
 125
 126     attr.Length = sizeof(attr);
 127     attr.RootDirectory = 0;
 128     attr.ObjectName = &nameW;
 129     attr.Attributes = 0;
 130     attr.SecurityDescriptor = NULL;
 131     attr.SecurityQualityOfService = NULL;
 132
 133     RtlInitUnicodeString( &nameW, SystemW );
 134     if (NtCreateKey( &system_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
 135
 136     RtlInitUnicodeString( &valueW, IdentifierW );
 137     NtSetValueKey( system_key, &valueW, 0, REG_SZ, SysidW, (strlenW(SysidW)+1) * sizeof(WCHAR) );
 138
 139     attr.RootDirectory = system_key;
 140     RtlInitUnicodeString( &nameW, fpuW );
 141     if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) NtClose( hkey );
 142
 143     RtlInitUnicodeString( &nameW, cpuW );
 144     if (!NtCreateKey( &cpu_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 145     {
 146         for (i = 0; i < info->dwNumberOfProcessors; i++)
 147         {
 148             char num[10], id[20];
 149
 150             attr.RootDirectory = cpu_key;
 151             sprintf( num, "%d", i );
 152             RtlCreateUnicodeStringFromAsciiz( &nameW, num );
 153             if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
 154             {
 155                 WCHAR idW[40];
 156                 DWORD cpuMHz = cpuHz / 1000000;
 157
 158                 /*TODO: report 64bit processors properly*/
 159                 RtlInitUnicodeString( &valueW, IdentifierW );
 160                 sprintf( id, "x86 Family %d Model %d Stepping %d",
 161                          info->wProcessorLevel /*model and family are messed up*/, info->wProcessorLevel, info->wProcessorRevision);
 162
 163                 RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
 164                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
 165
 166                 /*TODO; report amd's properly*/
 167                 RtlInitUnicodeString( &valueW, VendorIdentifierW );
 168                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, VenidIntelW, (strlenW(VenidIntelW)+1) * sizeof(WCHAR) );
 169
 170                 RtlInitUnicodeString( &valueW, mhzKeyW );
 171                 NtSetValueKey( hkey, &valueW, 0, REG_DWORD, &cpuMHz, sizeof(DWORD) );
 172                 NtClose( hkey );
 173             }
 174             RtlFreeUnicodeString( &nameW );
 175         }
 176         NtClose( cpu_key );
 177     }
 178     NtClose( system_key );
 179 }
 180
 181 /****************************************************************************
 182  *              QueryPerformanceCounter (KERNEL32.@)
 183  *
 184  * Get the current value of the performance counter.
 185  *
 186  * PARAMS
 187  *  counter [O] Destination for the current counter reading
 188  *
 189  * RETURNS
 190  *  Success: TRUE. counter contains the current reading
 191  *  Failure: FALSE.
 192  *
 193  * SEE ALSO
 194  *  See QueryPerformanceFrequency.
 195  */
 196 BOOL WINAPI QueryPerformanceCounter(PLARGE_INTEGER counter)
 197 {
 198     NtQueryPerformanceCounter( counter, NULL );
 199     return TRUE;
 200 }
 201
 202
 203 /****************************************************************************
 204  *              QueryPerformanceFrequency (KERNEL32.@)
 205  *
 206  * Get the resolution of the performace counter.
 207  *
 208  * PARAMS
 209  *  frequency [O] Destination for the counter resolution
 210  *
 211  * RETURNS
 212  *  Success. TRUE. Frequency contains the resolution of the counter.
 213  *  Failure: FALSE.
 214  *
 215  * SEE ALSO
 216  *  See QueryPerformanceCounter.
 217  */
 218 BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
 219 {
 220     LARGE_INTEGER counter;
 221     NtQueryPerformanceCounter( &counter, frequency );
 222     return TRUE;
 223 }
 224
 225
 226 /***********************************************************************
 227  *                      GetSystemInfo                   [KERNEL32.@]
 228  *
 229  * Get information about the system.
 230  *
 231  * RETURNS
 232  *  Nothing.
 233  *
 234  * NOTES
 235  * On the first call it creates cached values, so it doesn't have to determine
 236  * them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
 237  *
 238  * It creates a registry subhierarchy, looking like:
 239  * "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
 240  * Note that there is a hierarchy for every processor installed, so this
 241  * supports multiprocessor systems. This is done like Win95 does it, I think.
 242  *
 243  * It also creates a cached flag array for IsProcessorFeaturePresent().
 244  */
 245 VOID WINAPI GetSystemInfo(
 246         LPSYSTEM_INFO si        /* [out] Destination for system information, may not be NULL */)
 247 {
 248         static int cache = 0;
 249         static SYSTEM_INFO cachedsi;
 250
 251         TRACE("si=0x%p\n", si);
 252         if (cache) {
 253                 memcpy(si,&cachedsi,sizeof(*si));
 254                 return;
 255         }
 256         memset(PF,0,sizeof(PF));
 257
 258         /* choose sensible defaults ...
 259          * FIXME: perhaps overrideable with precompiler flags?
 260          */
 261         cachedsi.u.s.wProcessorArchitecture     = PROCESSOR_ARCHITECTURE_INTEL;
 262         cachedsi.dwPageSize                     = getpagesize();
 263
 264         /* FIXME: the two entries below should be computed somehow... */
 265         cachedsi.lpMinimumApplicationAddress    = (void *)0x00010000;
 266         cachedsi.lpMaximumApplicationAddress    = (void *)0x7FFFFFFF;
 267         cachedsi.dwActiveProcessorMask          = 1;
 268         cachedsi.dwNumberOfProcessors           = 1;
 269         cachedsi.dwProcessorType                = PROCESSOR_INTEL_PENTIUM;
 270         cachedsi.dwAllocationGranularity        = 0x10000;
 271         cachedsi.wProcessorLevel                = 5; /* 586 */
 272         cachedsi.wProcessorRevision             = 0;
 273
 274         cache = 1; /* even if there is no more info, we now have a cacheentry */
 275         memcpy(si,&cachedsi,sizeof(*si));
 276
 277         /* Hmm, reasonable processor feature defaults? */
 278
 279 #ifdef linux
 280         {
 281         char line[200];
 282         FILE *f = fopen ("/proc/cpuinfo", "r");
 283
 284         if (!f)
 285                 return;
 286         while (fgets(line,200,f)!=NULL) {
 287                 char    *s,*value;
 288
 289                 /* NOTE: the ':' is the only character we can rely on */
 290                 if (!(value = strchr(line,':')))
 291                         continue;
 292
 293                 /* terminate the valuename */
 294                 s = value - 1;
 295                 while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
 296                 *(s + 1) = '\0';
 297
 298                 /* and strip leading spaces from value */
 299                 value += 1;
 300                 while (*value==' ') value++;
 301                 if ((s=strchr(value,'\n')))
 302                         *s='\0';
 303
 304                 /* 2.1 method */
 305                 if (!strcasecmp(line, "cpu family")) {
 306                         if (isdigit (value[0])) {
 307                                 switch (value[0] - '0') {
 308                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 309                                         cachedsi.wProcessorLevel= 3;
 310                                         break;
 311                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 312                                         cachedsi.wProcessorLevel= 4;
 313                                         break;
 314                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 315                                         cachedsi.wProcessorLevel= 5;
 316                                         break;
 317                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 318                                         cachedsi.wProcessorLevel= 6;
 319                                         break;
 320                                 case 1: /* two-figure levels */
 321                                     if (value[1] == '5')
 322                                     {
 323                                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 324                                         cachedsi.wProcessorLevel= 6;
 325                                         break;
 326                                     }
 327                                     /* fall through */
 328                                 default:
 329                                         FIXME("unknown cpu family '%s', please report ! (-> setting to 386)\n", value);
 330                                         break;
 331                                 }
 332                         }
 333                         continue;
 334                 }
 335                 /* old 2.0 method */
 336                 if (!strcasecmp(line, "cpu")) {
 337                         if (    isdigit (value[0]) && value[1] == '8' &&
 338                                 value[2] == '6' && value[3] == 0
 339                         ) {
 340                                 switch (value[0] - '0') {
 341                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 342                                         cachedsi.wProcessorLevel= 3;
 343                                         break;
 344                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 345                                         cachedsi.wProcessorLevel= 4;
 346                                         break;
 347                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 348                                         cachedsi.wProcessorLevel= 5;
 349                                         break;
 350                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 351                                         cachedsi.wProcessorLevel= 6;
 352                                         break;
 353                                 default:
 354                                         FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
 355                                         break;
 356                                 }
 357                         }
 358                         continue;
 359                 }
 360                 if (!strcasecmp(line,"fdiv_bug")) {
 361                         if (!strncasecmp(value,"yes",3))
 362                                 PF[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
 363
 364                         continue;
 365                 }
 366                 if (!strcasecmp(line,"fpu")) {
 367                         if (!strncasecmp(value,"no",2))
 368                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 369
 370                         continue;
 371                 }
 372                 if (!strcasecmp(line,"processor")) {
 373                         /* processor number counts up... */
 374                         unsigned int x;
 375
 376                         if (sscanf(value,"%d",&x))
 377                                 if (x+1>cachedsi.dwNumberOfProcessors)
 378                                         cachedsi.dwNumberOfProcessors=x+1;
 379
 380                         continue;
 381                 }
 382                 if (!strcasecmp(line,"stepping")) {
 383                         int     x;
 384
 385                         if (sscanf(value,"%d",&x))
 386                                 cachedsi.wProcessorRevision = x;
 387
 388                         continue;
 389                 }
 390                 if (!strcasecmp(line, "cpu MHz")) {
 391                         double cmz;
 392                         if (sscanf( value, "%lf", &cmz ) == 1) {
 393                                 /* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
 394                                 cpuHz = cmz * 1000 * 1000;
 395                                 TRACE("CPU speed read as %lld\n", cpuHz);
 396                         }
 397                         continue;
 398                 }
 399                 if (    !strcasecmp(line,"flags")       ||
 400                         !strcasecmp(line,"features")
 401                 ) {
 402                         if (strstr(value,"cx8"))
 403                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 404                         if (strstr(value,"mmx"))
 405                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 406                         if (strstr(value,"tsc"))
 407                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 408                         if (strstr(value,"3dnow"))
 409                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
 410                         /* This will also catch sse2, but we have sse itself
 411                          * if we have sse2, so no problem */
 412                         if (strstr(value,"sse"))
 413                                 PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
 414                         if (strstr(value,"sse2"))
 415                                 PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
 416                         if (strstr(value,"pae"))
 417                                 PF[PF_PAE_ENABLED] = TRUE;
 418
 419                         continue;
 420                 }
 421         }
 422         fclose (f);
 423         }
 424         memcpy(si,&cachedsi,sizeof(*si));
 425 #elif defined (__NetBSD__)
 426         {
 427              int mib[2];
 428              int value[2];
 429              char model[256];
 430              char *cpuclass;
 431              FILE *f = fopen ("/var/run/dmesg.boot", "r");
 432
 433              /* first deduce as much as possible from the sysctls */
 434              mib[0] = CTL_MACHDEP;
 435 #ifdef CPU_FPU_PRESENT
 436              mib[1] = CPU_FPU_PRESENT;
 437              value[1] = sizeof(int);
 438              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 439                  if (value) PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 440                  else       PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 441 #endif
 442 #ifdef CPU_SSE
 443              mib[1] = CPU_SSE;   /* this should imply MMX */
 444              value[1] = sizeof(int);
 445              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 446                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 447 #endif
 448 #ifdef CPU_SSE2
 449              mib[1] = CPU_SSE2;  /* this should imply MMX */
 450              value[1] = sizeof(int);
 451              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 452                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 453 #endif
 454              mib[0] = CTL_HW;
 455              mib[1] = HW_NCPU;
 456              value[1] = sizeof(int);
 457              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
 458                  if (value[0] > cachedsi.dwNumberOfProcessors)
 459                     cachedsi.dwNumberOfProcessors = value[0];
 460              mib[1] = HW_MODEL;
 461              value[1] = 255;
 462              if (sysctl(mib, 2, model, value+1, NULL, 0) >= 0) {
 463                   model[value[1]] = '\0'; /* just in case */
 464                   cpuclass = strstr(model, "-class");
 465                   if (cpuclass != NULL) {
 466                        while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
 467                        if (!strncmp(cpuclass+1, "386", 3)) {
 468                             cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 469                             cachedsi.wProcessorLevel= 3;
 470                        }
 471                        if (!strncmp(cpuclass+1, "486", 3)) {
 472                             cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 473                             cachedsi.wProcessorLevel= 4;
 474                        }
 475                        if (!strncmp(cpuclass+1, "586", 3)) {
 476                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 477                             cachedsi.wProcessorLevel= 5;
 478                        }
 479                        if (!strncmp(cpuclass+1, "686", 3)) {
 480                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 481                             cachedsi.wProcessorLevel= 6;
 482                             /* this should imply MMX */
 483                             PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 484                        }
 485                   }
 486              }
 487
 488              /* it may be worth reading from /var/run/dmesg.boot for
 489                 additional information such as CX8, MMX and TSC
 490                 (however this information should be considered less
 491                  reliable than that from the sysctl calls) */
 492              if (f != NULL)
 493              {
 494                  while (fgets(model, 255, f) != NULL) {
 495                         if (sscanf(model,"cpu%d: features %x<", value, value+1) == 2) {
 496                             /* we could scan the string but it is easier
 497                                to test the bits directly */
 498                             if (value[1] & 0x1)
 499                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 500                             if (value[1] & 0x10)
 501                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
 502                             if (value[1] & 0x100)
 503                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
 504                             if (value[1] & 0x800000)
 505                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 506
 507                             break;
 508                         }
 509                  }
 510                  fclose(f);
 511              }
 512
 513         }
 514         memcpy(si,&cachedsi,sizeof(*si));
 515 #elif defined(__FreeBSD__)
 516         {
 517         unsigned int regs[4], regs2[4];
 518         int ret, len, num;
 519         if (!have_cpuid())
 520                 regs[0] = 0;                    /* No cpuid support -- skip the rest */
 521         else
 522                 do_cpuid(0x00000000, regs);     /* get standard cpuid level and vendor name */
 523         if (regs[0]>=0x00000001) {              /* Check for supported cpuid version */
 524                 do_cpuid(0x00000001, regs2);    /* get cpu features */
 525                 switch ((regs2[0] >> 8)&0xf) {  /* cpu family */
 526                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 527                         cachedsi.wProcessorLevel = 3;
 528                         break;
 529                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 530                         cachedsi.wProcessorLevel = 4;
 531                         break;
 532                 case 5:
 533                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 534                         cachedsi.wProcessorLevel = 5;
 535                         break;
 536                 case 6:
 537                 case 15: /* PPro/2/3/4 has same info as P1 */
 538                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 539                         cachedsi.wProcessorLevel = 6;
 540                         break;
 541                 default:
 542                         FIXME("unknown FreeBSD cpu family %d, please report! (-> setting to 386)\n", \
 543                                 (regs2[0] >> 8)&0xf);
 544                         break;
 545                 }
 546                 PF[PF_FLOATING_POINT_EMULATED]     = !(regs2[3] & 1);
 547                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
 548                 PF[PF_COMPARE_EXCHANGE_DOUBLE]     = (regs2[3] & (1 << 8 )) >> 8;
 549                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE]  = (regs2[3] & (1 << 23)) >> 23;
 550                 /* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
 551                 /*len = sizeof(num);
 552                 ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
 553                 if (!ret)
 554                         PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
 555
 556                 if (regs[1] == AUTH &&
 557                     regs[3] == ENTI &&
 558                     regs[2] == CAMD) {
 559                         do_cpuid(0x80000000, regs);             /* get vendor cpuid level */
 560                         if (regs[0]>=0x80000001) {
 561                                 do_cpuid(0x80000001, regs2);    /* get vendor features */
 562                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] =
 563                                     (regs2[3] & (1 << 31 )) >> 31;
 564                         }
 565                 }
 566         }
 567         len = sizeof(num);
 568         ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
 569         if (!ret)
 570                 cachedsi.dwNumberOfProcessors = num;
 571         }
 572         memcpy(si,&cachedsi,sizeof(*si));
 573 #elif defined (__APPLE__)
 574         {
 575         size_t valSize;
 576         unsigned long long longVal;
 577         int value;
 578         int cputype;
 579
 580         valSize = sizeof(int);
 581         if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
 582         {
 583             if (value)
 584                 PF[PF_FLOATING_POINT_EMULATED] = FALSE;
 585             else
 586                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
 587         }
 588         valSize = sizeof(int);
 589         if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
 590         cachedsi.dwNumberOfProcessors = value;
 591
 592         valSize = sizeof(int);
 593         if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
 594             cachedsi.dwActiveProcessorMask = value;
 595
 596         valSize = sizeof(int);
 597         if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
 598         {
 599             valSize = sizeof(int);
 600             if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
 601             {
 602                 switch (cputype)
 603                 {
 604                     case CPU_TYPE_POWERPC:
 605                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
 606                         switch (value)
 607                         {
 608                             case CPU_SUBTYPE_POWERPC_601:
 609                             case CPU_SUBTYPE_POWERPC_602:
 610                                 cachedsi.dwProcessorType = PROCESSOR_PPC_601;
 611                                 cachedsi.wProcessorLevel = 1;
 612                                 break;
 613                             case CPU_SUBTYPE_POWERPC_603:
 614                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 615                                 cachedsi.wProcessorLevel = 3;
 616                                 break;
 617                             case CPU_SUBTYPE_POWERPC_603e:
 618                             case CPU_SUBTYPE_POWERPC_603ev:
 619                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 620                                 cachedsi.wProcessorLevel = 6;
 621                                 break;
 622                             case CPU_SUBTYPE_POWERPC_604:
 623                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 624                                 cachedsi.wProcessorLevel = 4;
 625                                 break;
 626                             case CPU_SUBTYPE_POWERPC_604e:
 627                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 628                                 cachedsi.wProcessorLevel = 9;
 629                                 break;
 630                             case CPU_SUBTYPE_POWERPC_620:
 631                                 cachedsi.dwProcessorType = PROCESSOR_PPC_620;
 632                                 cachedsi.wProcessorLevel = 20;
 633                                 break;
 634                             case CPU_SUBTYPE_POWERPC_750:
 635                             case CPU_SUBTYPE_POWERPC_7400:
 636                             case CPU_SUBTYPE_POWERPC_7450:
 637                                 /* G3/G4 derivate from 603 so ... */
 638                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
 639                                 cachedsi.wProcessorLevel = 6;
 640                                 break;
 641                             case CPU_SUBTYPE_POWERPC_970:
 642                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
 643                                 cachedsi.wProcessorLevel = 9;
 644                                 /* :o) PF[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
 645                                 break;
 646                             default: break;
 647                         }
 648                         break; /* CPU_TYPE_POWERPC */
 649                     case CPU_TYPE_I386:
 650                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
 651                         switch (value)
 652                         {
 653                             case CPU_SUBTYPE_386:
 654                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
 655                                 cachedsi.wProcessorLevel = 3;
 656                                 break;
 657                             case CPU_SUBTYPE_486:
 658                             case CPU_SUBTYPE_486SX:
 659                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
 660                                 cachedsi.wProcessorLevel = 4;
 661                                 break;
 662                             case CPU_SUBTYPE_586:
 663                             case CPU_SUBTYPE_PENTPRO:
 664                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 665                                 cachedsi.wProcessorLevel = 5;
 666                                 break;
 667                             case CPU_SUBTYPE_PENTII_M3:
 668                             case CPU_SUBTYPE_PENTII_M5:
 669                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
 670                                 cachedsi.wProcessorLevel = 5;
 671                                 /* this should imply MMX */
 672                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
 673                                 break;
 674                             default: break;
 675                         }
 676                         break; /* CPU_TYPE_I386 */
 677                     default: break;
 678                 } /* switch (cputype) */
 679             }
 680         }
 681         valSize = sizeof(longVal);
 682         if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
 683             cpuHz = longVal;
 684         }
 685         memcpy(si,&cachedsi,sizeof(*si));
 686 #else
 687         FIXME("not yet supported on this system\n");
 688 #endif
 689         TRACE("<- CPU arch %d, res'd %d, pagesize %ld, minappaddr %p, maxappaddr %p,"
 690               " act.cpumask %08lx, numcpus %ld, CPU type %ld, allocgran. %ld, CPU level %d, CPU rev %d\n",
 691               si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
 692               si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
 693               si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
 694               si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
 695
 696         create_registry_keys( &cachedsi );
 697 }
 698
 699
 700 /***********************************************************************
 701  *                      IsProcessorFeaturePresent       [KERNEL32.@]
 702  *
 703  * Determine if the cpu supports a given feature.
 704  *
 705  * RETURNS
 706  *  TRUE, If the processor supports feature,
 707  *  FALSE otherwise.
 708  */
 709 BOOL WINAPI IsProcessorFeaturePresent (
 710         DWORD feature   /* [in] Feature number, (PF_ constants from "winnt.h") */)
 711 {
 712   SYSTEM_INFO si;
 713   GetSystemInfo (&si); /* To ensure the information is loaded and cached */
 714
 715   if (feature < 64)
 716     return PF[feature];
 717   else
 718     return FALSE;
 719 }