- Fix erroneous use of LOCALE_SDATE in the place of LOCALE_SSHORTDATE.
[wine] / dlls / kernel / cpu.c
1 /*
2  * What processor?
3  *
4  * Copyright 1995,1997 Morten Welinder
5  * Copyright 1997-1998 Marcus Meissner
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include "config.h"
23 #include "wine/port.h"
24
25 #ifdef HAVE_SYS_PARAM_H
26 # include <sys/param.h>
27 #endif
28 #ifdef HAVE_SYS_SYSCTL_H
29 # include <sys/sysctl.h>
30 #endif
31 #ifdef HAVE_MACHINE_CPU_H
32 # include <machine/cpu.h>
33 #endif
34
35 #include <ctype.h>
36 #include <string.h>
37 #include <stdarg.h>
38 #include <stdio.h>
39 #include <stdlib.h>
40 #ifdef HAVE_SYS_TIME_H
41 # include <sys/time.h>
42 #endif
43
44
45 #define NONAMELESSUNION
46 #define NONAMELESSSTRUCT
47 #include "windef.h"
48 #include "winbase.h"
49 #include "winnt.h"
50 #include "winreg.h"
51 #include "winternl.h"
52 #include "winerror.h"
53 #include "wine/unicode.h"
54 #include "wine/debug.h"
55
56 WINE_DEFAULT_DEBUG_CHANNEL(reg);
57
58 #define AUTH    0x68747541      /* "Auth" */
59 #define ENTI    0x69746e65      /* "enti" */
60 #define CAMD    0x444d4163      /* "cAMD" */
61
62 /* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
63  * We are compiled with -fPIC, so we can't clobber ebx.
64  */
65 static inline void do_cpuid(int ax, int *p)
66 {
67 #ifdef __i386__
68         __asm__("pushl %%ebx\n\t"
69                 "cpuid\n\t"
70                 "movl %%ebx, %%esi\n\t"
71                 "popl %%ebx"
72                 : "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
73                 :  "0" (ax));
74 #endif
75 }
76
77 /* From xf86info havecpuid.c 1.11 */
78 static inline int have_cpuid(void)
79 {
80 #ifdef __i386__
81         unsigned int f1, f2;
82         __asm__("pushfl\n\t"
83                 "pushfl\n\t"
84                 "popl %0\n\t"
85                 "movl %0,%1\n\t"
86                 "xorl %2,%0\n\t"
87                 "pushl %0\n\t"
88                 "popfl\n\t"
89                 "pushfl\n\t"
90                 "popl %0\n\t"
91                 "popfl"
92                 : "=&r" (f1), "=&r" (f2)
93                 : "ir" (0x00200000));
94         return ((f1^f2) & 0x00200000) != 0;
95 #else
96         return 0;
97 #endif
98 }
99
100 static BYTE PF[64] = {0,};
101 static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
102
103 static void create_registry_keys( const SYSTEM_INFO *info )
104 {
105     static const WCHAR SystemW[] = {'M','a','c','h','i','n','e','\\',
106                                     'H','a','r','d','w','a','r','e','\\',
107                                     'D','e','s','c','r','i','p','t','i','o','n','\\',
108                                     'S','y','s','t','e','m',0};
109     static const WCHAR fpuW[] = {'F','l','o','a','t','i','n','g','P','o','i','n','t','P','r','o','c','e','s','s','o','r',0};
110     static const WCHAR cpuW[] = {'C','e','n','t','r','a','l','P','r','o','c','e','s','s','o','r',0};
111     static const WCHAR IdentifierW[] = {'I','d','e','n','t','i','f','i','e','r',0};
112     static const WCHAR SysidW[] = {'A','T',' ','c','o','m','p','a','t','i','b','l','e',0};
113     static const WCHAR mhzKeyW[] = {'~','M','H','z',0};
114
115     int i;
116     HKEY hkey, system_key, cpu_key;
117     OBJECT_ATTRIBUTES attr;
118     UNICODE_STRING nameW, valueW;
119
120     attr.Length = sizeof(attr);
121     attr.RootDirectory = 0;
122     attr.ObjectName = &nameW;
123     attr.Attributes = 0;
124     attr.SecurityDescriptor = NULL;
125     attr.SecurityQualityOfService = NULL;
126
127     RtlInitUnicodeString( &nameW, SystemW );
128     if (NtCreateKey( &system_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
129
130     RtlInitUnicodeString( &valueW, IdentifierW );
131     NtSetValueKey( system_key, &valueW, 0, REG_SZ, SysidW, (strlenW(SysidW)+1) * sizeof(WCHAR) );
132
133     attr.RootDirectory = system_key;
134     RtlInitUnicodeString( &nameW, fpuW );
135     if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) NtClose( hkey );
136
137     RtlInitUnicodeString( &nameW, cpuW );
138     if (!NtCreateKey( &cpu_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
139     {
140         for (i = 0; i < info->dwNumberOfProcessors; i++)
141         {
142             char num[10], id[20];
143
144             attr.RootDirectory = cpu_key;
145             sprintf( num, "%d", i );
146             RtlCreateUnicodeStringFromAsciiz( &nameW, num );
147             if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
148             {
149                 WCHAR idW[20];
150                 DWORD cpuMHz = cpuHz / 1000000;
151
152                 sprintf( id, "CPU %ld", info->dwProcessorType );
153                 RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
154                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
155
156                 RtlInitUnicodeString( &valueW, mhzKeyW );
157                 NtSetValueKey( hkey, &valueW, 0, REG_DWORD, &cpuMHz, sizeof(DWORD) );
158                 NtClose( hkey );
159             }
160             RtlFreeUnicodeString( &nameW );
161         }
162         NtClose( cpu_key );
163     }
164     NtClose( system_key );
165 }
166
167 /****************************************************************************
168  *              QueryPerformanceCounter (KERNEL32.@)
169  *
170  * Get the current value of the performance counter.
171  * 
172  * PARAMS
173  *  counter [O] Destination for the current counter reading
174  *
175  * RETURNS
176  *  Success: TRUE. counter contains the current reading
177  *  Failure: FALSE.
178  *
179  * SEE ALSO
180  *  See QueryPerformanceFrequency.
181  */
182 BOOL WINAPI QueryPerformanceCounter(PLARGE_INTEGER counter)
183 {
184     struct timeval tv;
185
186 #if defined(__i386__) && defined(__GNUC__)
187     if (IsProcessorFeaturePresent( PF_RDTSC_INSTRUCTION_AVAILABLE )) {
188         /* i586 optimized version */
189         __asm__ __volatile__ ( "rdtsc"
190                                : "=a" (counter->u.LowPart), "=d" (counter->u.HighPart) );
191         counter->QuadPart = counter->QuadPart / 1000; /* see below */
192         return TRUE;
193     }
194 #endif
195
196     /* fall back to generic routine (ie, for i386, i486) */
197     gettimeofday( &tv, NULL );
198     counter->QuadPart = (LONGLONG)tv.tv_usec + (LONGLONG)tv.tv_sec * 1000000;
199     return TRUE;
200 }
201
202
203 /****************************************************************************
204  *              QueryPerformanceFrequency (KERNEL32.@)
205  *
206  * Get the resolution of the performace counter.
207  *
208  * PARAMS
209  *  frequency [O] Destination for the counter resolution
210  *
211  * RETURNS
212  *  Success. TRUE. Frequency contains the resolution of the counter.
213  *  Failure: FALSE.
214  *
215  * SEE ALSO
216  *  See QueryPerformanceCounter.
217  */
218 BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
219 {
220 #if defined(__i386__) && defined(__GNUC__)
221     if (IsProcessorFeaturePresent( PF_RDTSC_INSTRUCTION_AVAILABLE )) {
222         /* The way Windows calculates this value is unclear, however simply using the CPU frequency
223            gives a value out by approximately a thousand. That can cause some applications to crash,
224            so we divide here to make our number more similar to the one Windows gives  */
225         frequency->QuadPart = cpuHz / 1000;
226         return TRUE;
227     }
228 #endif
229     frequency->u.LowPart  = 1000000;
230     frequency->u.HighPart = 0;
231     return TRUE;
232 }
233
234
235 /***********************************************************************
236  *                      GetSystemInfo                   [KERNEL32.@]
237  *
238  * Get information about the system.
239  *
240  * RETURNS
241  *  Nothing.
242  *
243  * NOTES
244  * On the first call it creates cached values, so it doesn't have to determine
245  * them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
246  *
247  * It creates a registry subhierarchy, looking like:
248  * "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
249  * Note that there is a hierarchy for every processor installed, so this
250  * supports multiprocessor systems. This is done like Win95 does it, I think.
251  *
252  * It also creates a cached flag array for IsProcessorFeaturePresent().
253  */
254 VOID WINAPI GetSystemInfo(
255         LPSYSTEM_INFO si        /* [out] Destination for system information, may not be NULL */)
256 {
257         static int cache = 0;
258         static SYSTEM_INFO cachedsi;
259
260         TRACE("si=0x%p\n", si);
261         if (cache) {
262                 memcpy(si,&cachedsi,sizeof(*si));
263                 return;
264         }
265         memset(PF,0,sizeof(PF));
266
267         /* choose sensible defaults ...
268          * FIXME: perhaps overrideable with precompiler flags?
269          */
270         cachedsi.u.s.wProcessorArchitecture     = PROCESSOR_ARCHITECTURE_INTEL;
271         cachedsi.dwPageSize                     = getpagesize();
272
273         /* FIXME: the two entries below should be computed somehow... */
274         cachedsi.lpMinimumApplicationAddress    = (void *)0x00010000;
275         cachedsi.lpMaximumApplicationAddress    = (void *)0x7FFFFFFF;
276         cachedsi.dwActiveProcessorMask          = 1;
277         cachedsi.dwNumberOfProcessors           = 1;
278         cachedsi.dwProcessorType                = PROCESSOR_INTEL_PENTIUM;
279         cachedsi.dwAllocationGranularity        = 0x10000;
280         cachedsi.wProcessorLevel                = 5; /* 586 */
281         cachedsi.wProcessorRevision             = 0;
282
283         cache = 1; /* even if there is no more info, we now have a cacheentry */
284         memcpy(si,&cachedsi,sizeof(*si));
285
286         /* Hmm, reasonable processor feature defaults? */
287
288 #ifdef linux
289         {
290         char line[200];
291         FILE *f = fopen ("/proc/cpuinfo", "r");
292
293         if (!f)
294                 return;
295         while (fgets(line,200,f)!=NULL) {
296                 char    *s,*value;
297
298                 /* NOTE: the ':' is the only character we can rely on */
299                 if (!(value = strchr(line,':')))
300                         continue;
301                 
302                 /* terminate the valuename */
303                 s = value - 1;
304                 while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
305                 *(s + 1) = '\0';
306
307                 /* and strip leading spaces from value */
308                 value += 1;
309                 while (*value==' ') value++;
310                 if ((s=strchr(value,'\n')))
311                         *s='\0';
312
313                 /* 2.1 method */
314                 if (!strcasecmp(line, "cpu family")) {
315                         if (isdigit (value[0])) {
316                                 switch (value[0] - '0') {
317                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
318                                         cachedsi.wProcessorLevel= 3;
319                                         break;
320                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
321                                         cachedsi.wProcessorLevel= 4;
322                                         break;
323                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
324                                         cachedsi.wProcessorLevel= 5;
325                                         break;
326                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
327                                         cachedsi.wProcessorLevel= 6;
328                                         break;
329                                 case 1: /* two-figure levels */
330                                     if (value[1] == '5')
331                                     {
332                                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
333                                         cachedsi.wProcessorLevel= 6;
334                                         break;
335                                     }
336                                     /* fall through */
337                                 default:
338                                         FIXME("unknown cpu family '%s', please report ! (-> setting to 386)\n", value);
339                                         break;
340                                 }
341                         }
342                         continue;
343                 }
344                 /* old 2.0 method */
345                 if (!strcasecmp(line, "cpu")) {
346                         if (    isdigit (value[0]) && value[1] == '8' &&
347                                 value[2] == '6' && value[3] == 0
348                         ) {
349                                 switch (value[0] - '0') {
350                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
351                                         cachedsi.wProcessorLevel= 3;
352                                         break;
353                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
354                                         cachedsi.wProcessorLevel= 4;
355                                         break;
356                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
357                                         cachedsi.wProcessorLevel= 5;
358                                         break;
359                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
360                                         cachedsi.wProcessorLevel= 6;
361                                         break;
362                                 default:
363                                         FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
364                                         break;
365                                 }
366                         }
367                         continue;
368                 }
369                 if (!strcasecmp(line,"fdiv_bug")) {
370                         if (!strncasecmp(value,"yes",3))
371                                 PF[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
372
373                         continue;
374                 }
375                 if (!strcasecmp(line,"fpu")) {
376                         if (!strncasecmp(value,"no",2))
377                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
378
379                         continue;
380                 }
381                 if (!strcasecmp(line,"processor")) {
382                         /* processor number counts up... */
383                         unsigned int x;
384
385                         if (sscanf(value,"%d",&x))
386                                 if (x+1>cachedsi.dwNumberOfProcessors)
387                                         cachedsi.dwNumberOfProcessors=x+1;
388                         
389                         continue;
390                 }
391                 if (!strcasecmp(line,"stepping")) {
392                         int     x;
393
394                         if (sscanf(value,"%d",&x))
395                                 cachedsi.wProcessorRevision = x;
396
397                         continue;
398                 }
399                 if (!strcasecmp(line, "cpu MHz")) {
400                         double cmz;
401                         if (sscanf( value, "%lf", &cmz ) == 1) {
402                                 /* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
403                                 cpuHz = cmz * 1000 * 1000;
404                                 TRACE("CPU speed read as %lld\n", cpuHz);
405                         }
406                         continue;
407                 }
408                 if (    !strcasecmp(line,"flags")       ||
409                         !strcasecmp(line,"features")
410                 ) {
411                         if (strstr(value,"cx8"))
412                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
413                         if (strstr(value,"mmx"))
414                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
415                         if (strstr(value,"tsc"))
416                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
417                         if (strstr(value,"3dnow"))
418                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
419                         /* This will also catch sse2, but we have sse itself
420                          * if we have sse2, so no problem */
421                         if (strstr(value,"sse"))
422                                 PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
423                         if (strstr(value,"sse2"))
424                                 PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
425                         if (strstr(value,"pae"))
426                                 PF[PF_PAE_ENABLED] = TRUE;
427                         
428                         continue;
429                 }
430         }
431         fclose (f);
432         }
433         memcpy(si,&cachedsi,sizeof(*si));
434 #elif defined (__NetBSD__)
435         {
436              int mib[2];
437              int value[2];
438              char model[256];
439              char *cpuclass;
440              FILE *f = fopen ("/var/run/dmesg.boot", "r");
441
442              /* first deduce as much as possible from the sysctls */
443              mib[0] = CTL_MACHDEP;
444 #ifdef CPU_FPU_PRESENT
445              mib[1] = CPU_FPU_PRESENT;
446              value[1] = sizeof(int);
447              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
448                  if (value) PF[PF_FLOATING_POINT_EMULATED] = FALSE;
449                  else       PF[PF_FLOATING_POINT_EMULATED] = TRUE;
450 #endif
451 #ifdef CPU_SSE
452              mib[1] = CPU_SSE;   /* this should imply MMX */
453              value[1] = sizeof(int);
454              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
455                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
456 #endif
457 #ifdef CPU_SSE2
458              mib[1] = CPU_SSE2;  /* this should imply MMX */
459              value[1] = sizeof(int);
460              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
461                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
462 #endif
463              mib[0] = CTL_HW;
464              mib[1] = HW_NCPU;
465              value[1] = sizeof(int);
466              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
467                  if (value[0] > cachedsi.dwNumberOfProcessors)
468                     cachedsi.dwNumberOfProcessors = value[0];
469              mib[1] = HW_MODEL;
470              value[1] = 255;
471              if (sysctl(mib, 2, model, value+1, NULL, 0) >= 0) {
472                   model[value[1]] = '\0'; /* just in case */
473                   cpuclass = strstr(model, "-class");
474                   if (cpuclass != NULL) {
475                        while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
476                        if (!strncmp(cpuclass+1, "386", 3)) {
477                             cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
478                             cachedsi.wProcessorLevel= 3;
479                        }
480                        if (!strncmp(cpuclass+1, "486", 3)) {
481                             cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
482                             cachedsi.wProcessorLevel= 4;
483                        }
484                        if (!strncmp(cpuclass+1, "586", 3)) {
485                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
486                             cachedsi.wProcessorLevel= 5;
487                        }
488                        if (!strncmp(cpuclass+1, "686", 3)) {
489                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
490                             cachedsi.wProcessorLevel= 6;
491                             /* this should imply MMX */
492                             PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
493                        }
494                   }
495              }
496
497              /* it may be worth reading from /var/run/dmesg.boot for
498                 additional information such as CX8, MMX and TSC
499                 (however this information should be considered less
500                  reliable than that from the sysctl calls) */
501              if (f != NULL)
502              {
503                  while (fgets(model, 255, f) != NULL) {
504                         if (sscanf(model,"cpu%d: features %x<", value, value+1) == 2) {
505                             /* we could scan the string but it is easier
506                                to test the bits directly */
507                             if (value[1] & 0x1)
508                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
509                             if (value[1] & 0x10)
510                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
511                             if (value[1] & 0x100)
512                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
513                             if (value[1] & 0x800000)
514                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
515
516                             break;
517                         }
518                  }
519                  fclose(f);
520              }
521
522         }
523         memcpy(si,&cachedsi,sizeof(*si));
524 #elif defined(__FreeBSD__)
525         {
526         unsigned int regs[4], regs2[4];
527         int ret, len, num;
528         if (!have_cpuid())
529                 regs[0] = 0;                    /* No cpuid support -- skip the rest */
530         else
531                 do_cpuid(0x00000000, regs);     /* get standard cpuid level and vendor name */
532         if (regs[0]>=0x00000001) {              /* Check for supported cpuid version */
533                 do_cpuid(0x00000001, regs2);    /* get cpu features */
534                 switch ((regs2[0] >> 8)&0xf) {  /* cpu family */
535                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
536                         cachedsi.wProcessorLevel = 3;
537                         break;
538                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
539                         cachedsi.wProcessorLevel = 4;
540                         break;
541                 case 5:
542                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
543                         cachedsi.wProcessorLevel = 5;
544                         break;
545                 case 6:
546                 case 15: /* PPro/2/3/4 has same info as P1 */
547                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
548                         cachedsi.wProcessorLevel = 6;
549                         break;
550                 default:
551                         FIXME("unknown FreeBSD cpu family %d, please report! (-> setting to 386)\n", \
552                                 (regs2[0] >> 8)&0xf);
553                         break;
554                 }
555                 PF[PF_FLOATING_POINT_EMULATED]     = !(regs2[3] & 1);
556                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
557                 PF[PF_COMPARE_EXCHANGE_DOUBLE]     = (regs2[3] & (1 << 8 )) >> 8;
558                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE]  = (regs2[3] & (1 << 23)) >> 23;
559                 /* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
560                 /*len = sizeof(num);
561                 ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
562                 if (!ret)
563                         PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
564                 
565                 if (regs[1] == AUTH &&
566                     regs[3] == ENTI &&
567                     regs[2] == CAMD) {
568                         do_cpuid(0x80000000, regs);             /* get vendor cpuid level */
569                         if (regs[0]>=0x80000001) {
570                                 do_cpuid(0x80000001, regs2);    /* get vendor features */
571                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = 
572                                     (regs2[3] & (1 << 31 )) >> 31;
573                         }
574                 }
575         }
576         len = sizeof(num);
577         ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
578         if (!ret)
579                 cachedsi.dwNumberOfProcessors = num;
580         }
581         memcpy(si,&cachedsi,sizeof(*si));
582 #elif defined (__APPLE__)
583         {
584         size_t valSize;
585         unsigned long long longVal;
586         int value;
587         int cputype;
588             
589         valSize = sizeof(int);
590         if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
591         {
592             if (value)
593                 PF[PF_FLOATING_POINT_EMULATED] = FALSE;
594             else
595                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
596         }
597         valSize = sizeof(int);
598         if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
599         cachedsi.dwNumberOfProcessors = value;
600  
601         valSize = sizeof(int);
602         if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
603             cachedsi.dwActiveProcessorMask = value;
604             
605         valSize = sizeof(int);
606         if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
607         {
608             valSize = sizeof(int);
609             if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
610             {
611                 switch (cputype)
612                 {
613                     case CPU_TYPE_POWERPC:
614                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
615                         switch (value)
616                         {
617                             case CPU_SUBTYPE_POWERPC_601:
618                             case CPU_SUBTYPE_POWERPC_602:
619                                 cachedsi.dwProcessorType = PROCESSOR_PPC_601;
620                                 cachedsi.wProcessorLevel = 1;
621                                 break;
622                             case CPU_SUBTYPE_POWERPC_603:
623                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
624                                 cachedsi.wProcessorLevel = 3;
625                                 break;
626                             case CPU_SUBTYPE_POWERPC_603e:
627                             case CPU_SUBTYPE_POWERPC_603ev:
628                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
629                                 cachedsi.wProcessorLevel = 6;
630                                 break;
631                             case CPU_SUBTYPE_POWERPC_604:
632                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
633                                 cachedsi.wProcessorLevel = 4;
634                                 break;
635                             case CPU_SUBTYPE_POWERPC_604e:
636                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
637                                 cachedsi.wProcessorLevel = 9;
638                                 break;
639                             case CPU_SUBTYPE_POWERPC_620:
640                                 cachedsi.dwProcessorType = PROCESSOR_PPC_620;
641                                 cachedsi.wProcessorLevel = 20;
642                                 break;
643                             case CPU_SUBTYPE_POWERPC_750:
644                             case CPU_SUBTYPE_POWERPC_7400:
645                             case CPU_SUBTYPE_POWERPC_7450:
646                                 /* G3/G4 derivate from 603 so ... */
647                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
648                                 cachedsi.wProcessorLevel = 6;
649                                 break;
650                             case CPU_SUBTYPE_POWERPC_970:
651                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
652                                 cachedsi.wProcessorLevel = 9;
653                                 /* :o) PF[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
654                                 break;
655                             default: break;
656                         }
657                         break; /* CPU_TYPE_POWERPC */
658                     case CPU_TYPE_I386:
659                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
660                         switch (value)
661                         {
662                             case CPU_SUBTYPE_386:
663                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
664                                 cachedsi.wProcessorLevel = 3;
665                                 break;
666                             case CPU_SUBTYPE_486:
667                             case CPU_SUBTYPE_486SX:
668                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
669                                 cachedsi.wProcessorLevel = 4;
670                                 break;
671                             case CPU_SUBTYPE_586:
672                             case CPU_SUBTYPE_PENTPRO:
673                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
674                                 cachedsi.wProcessorLevel = 5;
675                                 break;
676                             case CPU_SUBTYPE_PENTII_M3:
677                             case CPU_SUBTYPE_PENTII_M5:
678                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
679                                 cachedsi.wProcessorLevel = 5;
680                                 /* this should imply MMX */
681                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
682                                 break;
683                             default: break;
684                         }
685                         break; /* CPU_TYPE_I386 */
686                     default: break;
687                 } /* switch (cputype) */
688             }
689         }
690         valSize = sizeof(longVal);
691         if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
692             cpuHz = longVal;
693         }
694         memcpy(si,&cachedsi,sizeof(*si));
695 #else
696         FIXME("not yet supported on this system\n");
697 #endif
698         TRACE("<- CPU arch %d, res'd %d, pagesize %ld, minappaddr %p, maxappaddr %p,"
699               " act.cpumask %08lx, numcpus %ld, CPU type %ld, allocgran. %ld, CPU level %d, CPU rev %d\n",
700               si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
701               si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
702               si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
703               si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
704
705         create_registry_keys( &cachedsi );
706 }
707
708
709 /***********************************************************************
710  *                      IsProcessorFeaturePresent       [KERNEL32.@]
711  *
712  * Determine if the cpu supports a given feature.
713  * 
714  * RETURNS
715  *  TRUE, If the processor supports feature,
716  *  FALSE otherwise.
717  */
718 BOOL WINAPI IsProcessorFeaturePresent (
719         DWORD feature   /* [in] Feature number, (PF_ constants from "winnt.h") */) 
720 {
721   SYSTEM_INFO si;
722   GetSystemInfo (&si); /* To ensure the information is loaded and cached */
723
724   if (feature < 64)
725     return PF[feature];
726   else
727     return FALSE;
728 }