2 * Debugger i386 specific functions
4 * Copyright 2004 Eric Pouech
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
22 #include "wine/debug.h"
24 WINE_DEFAULT_DEBUG_CHANNEL(winedbg);
29 extern void be_i386_disasm_one_insn(ADDRESS64* addr, int display);
31 #define STEP_FLAG 0x00000100 /* single step flag */
32 #define V86_FLAG 0x00020000
34 #define IS_VM86_MODE(ctx) (ctx->EFlags & V86_FLAG)
36 static ADDRESS_MODE get_selector_type(HANDLE hThread, const CONTEXT* ctx, WORD sel)
40 if (IS_VM86_MODE(ctx)) return AddrModeReal;
41 /* null or system selector */
42 if (!(sel & 4) || ((sel >> 3) < 17)) return AddrModeFlat;
43 if (dbg_curr_process->process_io->get_selector(hThread, sel, &le))
44 return le.HighWord.Bits.Default_Big ? AddrMode1632 : AddrMode1616;
45 /* selector doesn't exist */
49 static void* be_i386_linearize(HANDLE hThread, const ADDRESS64* addr)
56 return (void*)((DWORD)(LOWORD(addr->Segment) << 4) + (DWORD)addr->Offset);
58 if (!(addr->Segment & 4) || ((addr->Segment >> 3) < 17))
59 return (void*)(DWORD)addr->Offset;
62 if (!dbg_curr_process->process_io->get_selector(hThread, addr->Segment, &le)) return NULL;
63 return (void*)((le.HighWord.Bits.BaseHi << 24) +
64 (le.HighWord.Bits.BaseMid << 16) + le.BaseLow +
67 return (void*)(DWORD)addr->Offset;
72 static unsigned be_i386_build_addr(HANDLE hThread, const CONTEXT* ctx, ADDRESS64* addr,
73 unsigned seg, unsigned long offset)
75 addr->Mode = AddrModeFlat;
77 addr->Offset = offset;
80 addr->Mode = get_selector_type(hThread, ctx, seg);
85 addr->Offset &= 0xffff;
98 static unsigned be_i386_get_addr(HANDLE hThread, const CONTEXT* ctx,
99 enum be_cpu_addr bca, ADDRESS64* addr)
104 return be_i386_build_addr(hThread, ctx, addr, ctx->SegCs, ctx->Eip);
105 case be_cpu_addr_stack:
106 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Esp);
107 case be_cpu_addr_frame:
108 return be_i386_build_addr(hThread, ctx, addr, ctx->SegSs, ctx->Ebp);
113 static unsigned be_i386_get_register_info(int regno, enum be_cpu_addr* kind)
117 case CV_REG_EIP: *kind = be_cpu_addr_pc; return TRUE;
118 case CV_REG_EBP: *kind = be_cpu_addr_frame; return TRUE;
119 case CV_REG_ESP: *kind = be_cpu_addr_stack; return TRUE;
124 static void be_i386_single_step(CONTEXT* ctx, unsigned enable)
126 if (enable) ctx->EFlags |= STEP_FLAG;
127 else ctx->EFlags &= ~STEP_FLAG;
130 static void be_i386_all_print_context(HANDLE hThread, const CONTEXT* ctx)
132 long double ST[8]; /* These are for floating regs */
135 /* Break out the FPU state and the floating point registers */
136 dbg_printf("Floating Point Unit status:\n");
137 dbg_printf(" FLCW:%04x ", LOWORD(ctx->FloatSave.ControlWord));
138 dbg_printf(" FLTW:%04x ", LOWORD(ctx->FloatSave.TagWord));
139 dbg_printf(" FLEO:%08x ", (unsigned int) ctx->FloatSave.ErrorOffset);
140 dbg_printf(" FLSW:%04x", LOWORD(ctx->FloatSave.StatusWord));
142 /* Isolate the condition code bits - note they are not contiguous */
143 dbg_printf("(CC:%d%d%d%d", (ctx->FloatSave.StatusWord & 0x00004000) >> 14,
144 (ctx->FloatSave.StatusWord & 0x00000400) >> 10,
145 (ctx->FloatSave.StatusWord & 0x00000200) >> 9,
146 (ctx->FloatSave.StatusWord & 0x00000100) >> 8);
148 /* Now pull out the 3 bit of the TOP stack pointer */
149 dbg_printf(" TOP:%01x", (unsigned int) (ctx->FloatSave.StatusWord & 0x00003800) >> 11);
151 /* Lets analyse the error bits and indicate the status
152 * the Invalid Op flag has sub status which is tested as follows */
153 if (ctx->FloatSave.StatusWord & 0x00000001) { /* Invalid Fl OP */
154 if (ctx->FloatSave.StatusWord & 0x00000040) { /* Stack Fault */
155 if (ctx->FloatSave.StatusWord & 0x00000200) /* C1 says Overflow */
156 dbg_printf(" #IE(Stack Overflow)");
158 dbg_printf(" #IE(Stack Underflow)"); /* Underflow */
160 else dbg_printf(" #IE(Arthimetic error)"); /* Invalid Fl OP */
163 if (ctx->FloatSave.StatusWord & 0x00000002) dbg_printf(" #DE"); /* Denormalised OP */
164 if (ctx->FloatSave.StatusWord & 0x00000004) dbg_printf(" #ZE"); /* Zero Divide */
165 if (ctx->FloatSave.StatusWord & 0x00000008) dbg_printf(" #OE"); /* Overflow */
166 if (ctx->FloatSave.StatusWord & 0x00000010) dbg_printf(" #UE"); /* Underflow */
167 if (ctx->FloatSave.StatusWord & 0x00000020) dbg_printf(" #PE"); /* Precision error */
168 if (ctx->FloatSave.StatusWord & 0x00000040)
169 if (!(ctx->FloatSave.StatusWord & 0x00000001))
170 dbg_printf(" #SE"); /* Stack Fault (don't think this can occur) */
171 if (ctx->FloatSave.StatusWord & 0x00000080) dbg_printf(" #ES"); /* Error Summary */
172 if (ctx->FloatSave.StatusWord & 0x00008000) dbg_printf(" #FB"); /* FPU Busy */
175 /* Here are the rest of the registers */
176 dbg_printf(" FLES:%08x FLDO:%08x FLDS:%08x FLCNS:%08x\n",
177 ctx->FloatSave.ErrorSelector,
178 ctx->FloatSave.DataOffset,
179 ctx->FloatSave.DataSelector,
180 ctx->FloatSave.Cr0NpxState);
182 /* Now for the floating point registers */
183 dbg_printf("Floating Point Registers:\n");
184 for (cnt = 0; cnt < 4; cnt++)
186 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
187 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
190 for (cnt = 4; cnt < 8; cnt++)
192 memcpy(&ST[cnt], &ctx->FloatSave.RegisterArea[cnt * 10], 10);
193 dbg_printf(" ST%d:%Lf ", cnt, ST[cnt]);
198 static void be_i386_print_context(HANDLE hThread, const CONTEXT* ctx, int all_regs)
200 static const char flags[] = "aVR-N--ODITSZ-A-P-C";
204 dbg_printf("Register dump:\n");
206 /* First get the segment registers out of the way */
207 dbg_printf(" CS:%04x SS:%04x DS:%04x ES:%04x FS:%04x GS:%04x",
208 (WORD)ctx->SegCs, (WORD)ctx->SegSs,
209 (WORD)ctx->SegDs, (WORD)ctx->SegEs,
210 (WORD)ctx->SegFs, (WORD)ctx->SegGs);
213 for (i = 0; buf[i]; i++)
214 if (buf[i] != '-' && !(ctx->EFlags & (1 << (sizeof(flags) - 2 - i))))
217 switch (get_selector_type(hThread, ctx, ctx->SegCs))
221 dbg_printf("\n IP:%04x SP:%04x BP:%04x FLAGS:%04x(%s)\n",
222 LOWORD(ctx->Eip), LOWORD(ctx->Esp),
223 LOWORD(ctx->Ebp), LOWORD(ctx->EFlags), buf);
224 dbg_printf(" AX:%04x BX:%04x CX:%04x DX:%04x SI:%04x DI:%04x\n",
225 LOWORD(ctx->Eax), LOWORD(ctx->Ebx),
226 LOWORD(ctx->Ecx), LOWORD(ctx->Edx),
227 LOWORD(ctx->Esi), LOWORD(ctx->Edi));
231 dbg_printf("\n EIP:%08x ESP:%08x EBP:%08x EFLAGS:%08x(%s)\n",
232 ctx->Eip, ctx->Esp, ctx->Ebp, ctx->EFlags, buf);
233 dbg_printf(" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n",
234 ctx->Eax, ctx->Ebx, ctx->Ecx, ctx->Edx);
235 dbg_printf(" ESI:%08x EDI:%08x\n",
240 if (all_regs) be_i386_all_print_context(hThread, ctx); /* print floating regs */
244 static void be_i386_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
246 if (get_selector_type(hThread, ctx, ctx->SegCs) == AddrMode1616)
248 info_win32_segments(ctx->SegDs >> 3, 1);
249 if (ctx->SegEs != ctx->SegDs) info_win32_segments(ctx->SegEs >> 3, 1);
251 info_win32_segments(ctx->SegFs >> 3, 1);
254 static struct dbg_internal_var be_i386_ctx[] =
256 {CV_REG_AL, "AL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_char_int},
257 {CV_REG_CL, "CL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_char_int},
258 {CV_REG_DL, "DL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_char_int},
259 {CV_REG_BL, "BL", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_char_int},
260 {CV_REG_AH, "AH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Eax)+1), dbg_itype_unsigned_char_int},
261 {CV_REG_CH, "CH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Ecx)+1), dbg_itype_unsigned_char_int},
262 {CV_REG_DH, "DH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Edx)+1), dbg_itype_unsigned_char_int},
263 {CV_REG_BH, "BH", (DWORD_PTR*)(FIELD_OFFSET(CONTEXT, Ebx)+1), dbg_itype_unsigned_char_int},
264 {CV_REG_AX, "AX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_short_int},
265 {CV_REG_CX, "CX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_short_int},
266 {CV_REG_DX, "DX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_short_int},
267 {CV_REG_BX, "BX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_short_int},
268 {CV_REG_SP, "SP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_short_int},
269 {CV_REG_BP, "BP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_short_int},
270 {CV_REG_SI, "SI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_short_int},
271 {CV_REG_DI, "DI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_short_int},
272 {CV_REG_EAX, "EAX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eax), dbg_itype_unsigned_int},
273 {CV_REG_ECX, "ECX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ecx), dbg_itype_unsigned_int},
274 {CV_REG_EDX, "EDX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edx), dbg_itype_unsigned_int},
275 {CV_REG_EBX, "EBX", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebx), dbg_itype_unsigned_int},
276 {CV_REG_ESP, "ESP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esp), dbg_itype_unsigned_int},
277 {CV_REG_EBP, "EBP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Ebp), dbg_itype_unsigned_int},
278 {CV_REG_ESI, "ESI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Esi), dbg_itype_unsigned_int},
279 {CV_REG_EDI, "EDI", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Edi), dbg_itype_unsigned_int},
280 {CV_REG_ES, "ES", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegEs), dbg_itype_unsigned_short_int},
281 {CV_REG_CS, "CS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegCs), dbg_itype_unsigned_short_int},
282 {CV_REG_SS, "SS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegSs), dbg_itype_unsigned_short_int},
283 {CV_REG_DS, "DS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegDs), dbg_itype_unsigned_short_int},
284 {CV_REG_FS, "FS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegFs), dbg_itype_unsigned_short_int},
285 {CV_REG_GS, "GS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, SegGs), dbg_itype_unsigned_short_int},
286 {CV_REG_IP, "IP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_short_int},
287 {CV_REG_FLAGS, "FLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_short_int},
288 {CV_REG_EIP, "EIP", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Eip), dbg_itype_unsigned_int},
289 {CV_REG_EFLAGS, "EFLAGS", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, EFlags), dbg_itype_unsigned_int},
290 {0, NULL, 0, dbg_itype_none}
293 static unsigned be_i386_is_step_over_insn(const void* insn)
299 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
303 /* Skip all prefixes */
310 case 0x66: /* opcode size prefix */
311 case 0x67: /* addr size prefix */
312 case 0xf0: /* lock */
313 case 0xf2: /* repne */
314 case 0xf3: /* repe */
315 insn = (const char*)insn + 1;
318 /* Handle call instructions */
319 case 0xcd: /* int <intno> */
320 case 0xe8: /* call <offset> */
321 case 0x9a: /* lcall <seg>:<off> */
324 case 0xff: /* call <regmodrm> */
325 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
327 return (((ch & 0x38) == 0x10) || ((ch & 0x38) == 0x18));
329 /* Handle string instructions */
330 case 0x6c: /* insb */
331 case 0x6d: /* insw */
332 case 0x6e: /* outsb */
333 case 0x6f: /* outsw */
334 case 0xa4: /* movsb */
335 case 0xa5: /* movsw */
336 case 0xa6: /* cmpsb */
337 case 0xa7: /* cmpsw */
338 case 0xaa: /* stosb */
339 case 0xab: /* stosw */
340 case 0xac: /* lodsb */
341 case 0xad: /* lodsw */
342 case 0xae: /* scasb */
343 case 0xaf: /* scasw */
352 static unsigned be_i386_is_function_return(const void* insn)
356 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
357 return (ch == 0xC2) || (ch == 0xC3);
360 static unsigned be_i386_is_break_insn(const void* insn)
364 if (!dbg_read_memory(insn, &c, sizeof(c))) return FALSE;
368 static unsigned get_size(ADDRESS_MODE am)
370 if (am == AddrModeReal || am == AddrMode1616) return 16;
374 static BOOL fetch_value(const char* addr, unsigned sz, int* value)
382 if (!dbg_read_memory(addr, &value8, sizeof(value8)))
387 if (!dbg_read_memory(addr, &value16, sizeof(value16)))
392 if (!dbg_read_memory(addr, value, sizeof(*value)))
395 default: return FALSE;
400 static unsigned be_i386_is_func_call(const void* insn, ADDRESS64* callee)
406 unsigned operand_size;
407 ADDRESS_MODE cs_addr_mode;
409 cs_addr_mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
411 operand_size = get_size(cs_addr_mode);
413 /* get operand_size (also getting rid of the various prefixes */
416 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
419 operand_size = 48 - operand_size; /* 16 => 32, 32 => 16 */
420 insn = (const char*)insn + 1;
422 } while (ch == 0x66 || ch == 0x67);
426 case 0xe8: /* relative near call */
427 callee->Mode = cs_addr_mode;
428 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
430 callee->Segment = dbg_context.SegCs;
431 callee->Offset = (DWORD)insn + 1 + (operand_size / 8) + delta;
434 case 0x9a: /* absolute far call */
435 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
436 &segment, sizeof(segment)))
438 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
440 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
442 callee->Segment = segment;
443 callee->Offset = delta;
447 if (!dbg_read_memory((const char*)insn + 1, &ch, sizeof(ch)))
449 /* keep only the CALL and LCALL insn:s */
450 switch ((ch >> 3) & 0x07)
453 segment = dbg_context.SegCs;
456 if (!dbg_read_memory((const char*)insn + 1 + operand_size / 8,
457 &segment, sizeof(segment)))
460 default: return FALSE;
462 /* FIXME: we only support the 32 bit far calls for now */
463 if (operand_size != 32)
465 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) with 16 bit operand-size at %p\n", ch, insn);
468 switch (ch & 0xC7) /* keep Mod R/M only (skip reg) */
473 WINE_FIXME("Unsupported yet call insn (0xFF 0x%02x) (SIB bytes) at %p\n", ch, insn);
475 case 0x05: /* addr32 */
476 if ((ch & 0x38) == 0x10 || /* call */
477 (ch & 0x38) == 0x18) /* lcall */
480 if (!dbg_read_memory((const char *)insn + 2, &addr, sizeof(addr)))
482 if ((ch & 0x38) == 0x18) /* lcall */
484 if (!dbg_read_memory((const char*)addr + operand_size, &segment, sizeof(segment)))
487 else segment = dbg_context.SegCs;
488 if (!dbg_read_memory((const char*)addr, &dst, sizeof(dst)))
490 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context, segment);
491 callee->Segment = segment;
492 callee->Offset = dst;
499 case 0x00: dst = dbg_context.Eax; break;
500 case 0x01: dst = dbg_context.Ecx; break;
501 case 0x02: dst = dbg_context.Edx; break;
502 case 0x03: dst = dbg_context.Ebx; break;
503 case 0x04: dst = dbg_context.Esp; break;
504 case 0x05: dst = dbg_context.Ebp; break;
505 case 0x06: dst = dbg_context.Esi; break;
506 case 0x07: dst = dbg_context.Edi; break;
508 if ((ch >> 6) != 0x03) /* indirect address */
510 if (ch >> 6) /* we got a displacement */
512 if (!fetch_value((const char*)insn + 2, (ch >> 6) == 0x01 ? 8 : 32, &delta))
516 if (((ch >> 3) & 0x07) == 0x03) /* LCALL */
518 if (!dbg_read_memory((const char*)dst + operand_size, &segment, sizeof(segment)))
521 else segment = dbg_context.SegCs;
522 if (!dbg_read_memory((const char*)dst, &delta, sizeof(delta)))
524 callee->Mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
526 callee->Segment = segment;
527 callee->Offset = delta;
531 callee->Mode = cs_addr_mode;
532 callee->Segment = dbg_context.SegCs;
533 callee->Offset = dst;
543 static unsigned be_i386_is_jump(const void* insn, ADDRESS64* jumpee)
547 unsigned operand_size;
548 ADDRESS_MODE cs_addr_mode;
550 cs_addr_mode = get_selector_type(dbg_curr_thread->handle, &dbg_context,
552 operand_size = get_size(cs_addr_mode);
554 /* get operand_size (also getting rid of the various prefixes */
557 if (!dbg_read_memory(insn, &ch, sizeof(ch))) return FALSE;
560 operand_size = 48 - operand_size; /* 16 => 32, 32 => 16 */
561 insn = (const char*)insn + 1;
563 } while (ch == 0x66 || ch == 0x67);
567 case 0xe9: /* jmp near */
568 jumpee->Mode = cs_addr_mode;
569 if (!fetch_value((const char*)insn + 1, operand_size, &delta))
571 jumpee->Segment = dbg_context.SegCs;
572 jumpee->Offset = (DWORD)insn + 1 + (operand_size / 8) + delta;
574 default: WINE_FIXME("unknown %x\n", ch); return FALSE;
579 #define DR7_CONTROL_SHIFT 16
580 #define DR7_CONTROL_SIZE 4
582 #define DR7_RW_EXECUTE (0x0)
583 #define DR7_RW_WRITE (0x1)
584 #define DR7_RW_READ (0x3)
586 #define DR7_LEN_1 (0x0)
587 #define DR7_LEN_2 (0x4)
588 #define DR7_LEN_4 (0xC)
590 #define DR7_LOCAL_ENABLE_SHIFT 0
591 #define DR7_GLOBAL_ENABLE_SHIFT 1
592 #define DR7_ENABLE_SIZE 2
594 #define DR7_LOCAL_ENABLE_MASK (0x55)
595 #define DR7_GLOBAL_ENABLE_MASK (0xAA)
597 #define DR7_CONTROL_RESERVED (0xFC00)
598 #define DR7_LOCAL_SLOWDOWN (0x100)
599 #define DR7_GLOBAL_SLOWDOWN (0x200)
601 #define DR7_ENABLE_MASK(dr) (1<<(DR7_LOCAL_ENABLE_SHIFT+DR7_ENABLE_SIZE*(dr)))
602 #define IS_DR7_SET(ctrl,dr) ((ctrl)&DR7_ENABLE_MASK(dr))
604 static inline int be_i386_get_unused_DR(CONTEXT* ctx, DWORD** r)
606 if (!IS_DR7_SET(ctx->Dr7, 0))
611 if (!IS_DR7_SET(ctx->Dr7, 1))
616 if (!IS_DR7_SET(ctx->Dr7, 2))
621 if (!IS_DR7_SET(ctx->Dr7, 3))
626 dbg_printf("All hardware registers have been used\n");
631 static unsigned be_i386_insert_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
632 CONTEXT* ctx, enum be_xpoint_type type,
633 void* addr, unsigned long* val, unsigned size)
643 case be_xpoint_break:
644 if (size != 0) return 0;
645 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
648 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
650 case be_xpoint_watch_exec:
651 bits = DR7_RW_EXECUTE;
653 case be_xpoint_watch_read:
656 case be_xpoint_watch_write:
659 if ((reg = be_i386_get_unused_DR(ctx, &pr)) == -1) return 0;
661 if (type != be_xpoint_watch_exec) switch (size)
663 case 4: bits |= DR7_LEN_4; break;
664 case 2: bits |= DR7_LEN_2; break;
665 case 1: bits |= DR7_LEN_1; break;
669 /* clear old values */
670 ctx->Dr7 &= ~(0x0F << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg));
671 /* set the correct ones */
672 ctx->Dr7 |= bits << (DR7_CONTROL_SHIFT + DR7_CONTROL_SIZE * reg);
673 ctx->Dr7 |= DR7_ENABLE_MASK(reg) | DR7_LOCAL_SLOWDOWN;
676 dbg_printf("Unknown bp type %c\n", type);
682 static unsigned be_i386_remove_Xpoint(HANDLE hProcess, const struct be_process_io* pio,
683 CONTEXT* ctx, enum be_xpoint_type type,
684 void* addr, unsigned long val, unsigned size)
691 case be_xpoint_break:
692 if (size != 0) return 0;
693 if (!pio->read(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
694 if (ch != (unsigned char)0xCC)
695 WINE_FIXME("Cannot get back %02x instead of 0xCC at %08lx\n",
696 ch, (unsigned long)addr);
697 ch = (unsigned char)val;
698 if (!pio->write(hProcess, addr, &ch, 1, &sz) || sz != 1) return 0;
700 case be_xpoint_watch_exec:
701 case be_xpoint_watch_read:
702 case be_xpoint_watch_write:
703 /* simply disable the entry */
704 ctx->Dr7 &= ~DR7_ENABLE_MASK(val);
707 dbg_printf("Unknown bp type %c\n", type);
713 static unsigned be_i386_is_watchpoint_set(const CONTEXT* ctx, unsigned idx)
715 return ctx->Dr6 & (1 << idx);
718 static void be_i386_clear_watchpoint(CONTEXT* ctx, unsigned idx)
720 ctx->Dr6 &= ~(1 << idx);
723 static int be_i386_adjust_pc_for_break(CONTEXT* ctx, BOOL way)
734 static int be_i386_fetch_integer(const struct dbg_lvalue* lvalue, unsigned size,
735 unsigned ext_sign, LONGLONG* ret)
737 if (size != 1 && size != 2 && size != 4 && size != 8) return FALSE;
739 memset(ret, 0, sizeof(*ret)); /* clear unread bytes */
740 /* FIXME: this assumes that debuggee and debugger use the same
741 * integral representation
743 if (!memory_read_value(lvalue, size, ret)) return FALSE;
745 /* propagate sign information */
746 if (ext_sign && size < 8 && (*ret >> (size * 8 - 1)) != 0)
749 *ret |= neg << (size * 8);
754 static int be_i386_fetch_float(const struct dbg_lvalue* lvalue, unsigned size,
757 char tmp[sizeof(long double)];
759 /* FIXME: this assumes that debuggee and debugger use the same
760 * representation for reals
762 if (!memory_read_value(lvalue, size, tmp)) return FALSE;
764 /* float & double types have to be promoted to a long double */
767 case sizeof(float): *ret = *(float*)tmp; break;
768 case sizeof(double): *ret = *(double*)tmp; break;
769 case sizeof(long double): *ret = *(long double*)tmp; break;
770 default: return FALSE;
775 struct backend_cpu be_i386 =
777 IMAGE_FILE_MACHINE_I386,
782 be_i386_get_register_info,
784 be_i386_print_context,
785 be_i386_print_segment_info,
787 be_i386_is_step_over_insn,
788 be_i386_is_function_return,
789 be_i386_is_break_insn,
790 be_i386_is_func_call,
792 be_i386_disasm_one_insn,
793 be_i386_insert_Xpoint,
794 be_i386_remove_Xpoint,
795 be_i386_is_watchpoint_set,
796 be_i386_clear_watchpoint,
797 be_i386_adjust_pc_for_break,
798 be_i386_fetch_integer,