2 * interlocked functions
4 * Copyright 1996 Alexandre Julliard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
22 #include "wine/port.h"
29 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
30 "movl 12(%esp),%eax\n\t"
31 "movl 8(%esp),%ecx\n\t"
32 "movl 4(%esp),%edx\n\t"
33 "lock; cmpxchgl %ecx,(%edx)\n\t"
35 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
36 "movl 12(%esp),%eax\n\t"
37 "movl 8(%esp),%ecx\n\t"
38 "movl 4(%esp),%edx\n\t"
39 "lock; cmpxchgl %ecx,(%edx)\n\t"
41 __ASM_GLOBAL_FUNC(interlocked_cmpxchg64,
44 "movl 12(%esp),%esi\n\t"
45 "movl 16(%esp),%ebx\n\t"
46 "movl 20(%esp),%ecx\n\t"
47 "movl 24(%esp),%eax\n\t"
48 "movl 28(%esp),%edx\n\t"
49 "lock; cmpxchg8b (%esi)\n\t"
53 __ASM_GLOBAL_FUNC(interlocked_xchg,
54 "movl 8(%esp),%eax\n\t"
55 "movl 4(%esp),%edx\n\t"
56 "lock; xchgl %eax,(%edx)\n\t"
58 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
59 "movl 8(%esp),%eax\n\t"
60 "movl 4(%esp),%edx\n\t"
61 "lock; xchgl %eax,(%edx)\n\t"
63 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
64 "movl 8(%esp),%eax\n\t"
65 "movl 4(%esp),%edx\n\t"
66 "lock; xaddl %eax,(%edx)\n\t"
69 #elif defined(_MSC_VER)
71 __declspec(naked) int interlocked_cmpxchg( int *dest, int xchg, int compare )
73 __asm mov eax, 12[esp];
74 __asm mov ecx, 8[esp];
75 __asm mov edx, 4[esp];
76 __asm lock cmpxchg [edx], ecx;
80 __declspec(naked) void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
82 __asm mov eax, 12[esp];
83 __asm mov ecx, 8[esp];
84 __asm mov edx, 4[esp];
85 __asm lock cmpxchg [edx], ecx;
89 __declspec(naked) __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare)
93 __asm mov esi, 12[esp];
94 __asm mov ebx, 16[esp];
95 __asm mov ecx, 20[esp];
96 __asm mov eax, 24[esp];
97 __asm mov edx, 28[esp];
98 __asm lock cmpxchg8b [esi];
104 __declspec(naked) int interlocked_xchg( int *dest, int val )
106 __asm mov eax, 8[esp];
107 __asm mov edx, 4[esp];
108 __asm lock xchg [edx], eax;
112 __declspec(naked) void *interlocked_xchg_ptr( void **dest, void *val )
114 __asm mov eax, 8[esp];
115 __asm mov edx, 4[esp];
116 __asm lock xchg [edx], eax;
120 __declspec(naked) int interlocked_xchg_add( int *dest, int incr )
122 __asm mov eax, 8[esp];
123 __asm mov edx, 4[esp];
124 __asm lock xadd [edx], eax;
129 # error You must implement the interlocked* functions for your compiler
132 #elif defined(__x86_64__)
136 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
138 "lock cmpxchgl %esi,(%rdi)\n\t"
140 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
142 "lock cmpxchgq %rsi,(%rdi)\n\t"
144 __ASM_GLOBAL_FUNC(interlocked_cmpxchg64,
146 "lock cmpxchgq %rsi,(%rdi)\n\t"
148 __ASM_GLOBAL_FUNC(interlocked_xchg,
150 "lock xchgl %eax, (%rdi)\n\t"
152 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
154 "lock xchgq %rax,(%rdi)\n\t"
156 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
158 "lock xaddl %eax, (%rdi)\n\t"
162 # error You must implement the interlocked* functions for your compiler
165 #elif defined(__powerpc__)
166 void* interlocked_cmpxchg_ptr( void **dest, void* xchg, void* compare)
170 __asm__ __volatile__(
178 : "=&r"(ret), "=&r"(scratch)
179 : "r"(dest), "r"(xchg), "r"(compare)
184 __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare)
186 /* FIXME: add code */
190 int interlocked_cmpxchg( int *dest, int xchg, int compare)
194 __asm__ __volatile__(
202 : "=&r"(ret), "=&r"(scratch)
203 : "r"(dest), "r"(xchg), "r"(compare)
204 : "cr0","memory","r0");
208 int interlocked_xchg_add( int *dest, int incr )
212 __asm__ __volatile__(
213 "0: lwarx %0, %3, %1\n"
215 " stwcx. %0, %3, %1\n"
219 : "r"(dest), "r"(incr), "r"(zero)
220 : "cr0", "memory", "r0"
225 int interlocked_xchg( int* dest, int val )
228 __asm__ __volatile__(
234 : "r"(dest), "r"(val)
235 : "cr0","memory","r0");
239 void* interlocked_xchg_ptr( void** dest, void* val )
242 __asm__ __volatile__(
248 : "r"(dest), "r"(val)
249 : "cr0","memory","r0");
253 #elif defined(__sparc__) && defined(__sun__)
256 * As the earlier Sparc processors lack necessary atomic instructions,
257 * I'm simply falling back to the library-provided _lwp_mutex routines
258 * to ensure mutual exclusion in a way appropriate for the current
261 * FIXME: If we have the compare-and-swap instruction (Sparc v9 and above)
262 * we could use this to speed up the Interlocked operations ...
265 static lwp_mutex_t interlocked_mutex = DEFAULTMUTEX;
267 int interlocked_cmpxchg( int *dest, int xchg, int compare )
269 _lwp_mutex_lock( &interlocked_mutex );
270 if (*dest == compare) *dest = xchg;
271 else compare = *dest;
272 _lwp_mutex_unlock( &interlocked_mutex );
276 void *interlocked_cmpxchg_ptr( void **dest, void *xchg, void *compare )
278 _lwp_mutex_lock( &interlocked_mutex );
279 if (*dest == compare) *dest = xchg;
280 else compare = *dest;
281 _lwp_mutex_unlock( &interlocked_mutex );
285 __int64 interlocked_cmpxchg64( __int64 *dest, __int64 xchg, __int64 compare )
287 _lwp_mutex_lock( &interlocked_mutex );
288 if (*dest == compare) *dest = xchg;
289 else compare = *dest;
290 _lwp_mutex_unlock( &interlocked_mutex );
294 int interlocked_xchg( int *dest, int val )
297 _lwp_mutex_lock( &interlocked_mutex );
300 _lwp_mutex_unlock( &interlocked_mutex );
304 void *interlocked_xchg_ptr( void **dest, void *val )
307 _lwp_mutex_lock( &interlocked_mutex );
310 _lwp_mutex_unlock( &interlocked_mutex );
314 int interlocked_xchg_add( int *dest, int incr )
317 _lwp_mutex_lock( &interlocked_mutex );
320 _lwp_mutex_unlock( &interlocked_mutex );
324 #elif defined(__ALPHA__) && defined(__GNUC__)
326 __ASM_GLOBAL_FUNC(interlocked_cmpxchg,
328 "ldl_l $0,0($16)\n\t"
329 "cmpeq $0,$18,$1\n\t"
330 "beq $1,L1cmpxchg\n\t"
332 "stl_c $0,0($16)\n\t"
333 "beq $0,L0cmpxchg\n\t"
338 __ASM_GLOBAL_FUNC(interlocked_cmpxchg_ptr,
340 "ldq_l $0,0($16)\n\t"
341 "cmpeq $0,$18,$1\n\t"
342 "beq $1,L1cmpxchg_ptr\n\t"
344 "stq_c $0,0($16)\n\t"
345 "beq $0,L0cmpxchg_ptr\n\t"
350 __int64 interlocked_cmpxchg64(__int64 *dest, __int64 xchg, __int64 compare)
352 /* FIXME: add code */
356 __ASM_GLOBAL_FUNC(interlocked_xchg,
358 "ldl_l $0,0($16)\n\t"
360 "stl_c $1,0($16)\n\t"
364 __ASM_GLOBAL_FUNC(interlocked_xchg_ptr,
366 "ldq_l $0,0($16)\n\t"
368 "stq_c $1,0($16)\n\t"
369 "beq $1,L0xchg_ptr\n\t"
372 __ASM_GLOBAL_FUNC(interlocked_xchg_add,
374 "ldl_l $0,0($16)\n\t"
376 "stl_c $1,0($16)\n\t"
377 "beq $1,L0xchg_add\n\t"
381 # error You must implement the interlocked* functions for your CPU