Added stubs for SendIMEMessageEx[A,W].
[wine] / dlls / kernel / cpu.c
1 /*
2  * What processor?
3  *
4  * Copyright 1995,1997 Morten Welinder
5  * Copyright 1997-1998 Marcus Meissner
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include "config.h"
23 #include "wine/port.h"
24
25 #ifdef HAVE_SYS_PARAM_H
26 # include <sys/param.h>
27 #endif
28 #ifdef HAVE_SYS_SYSCTL_H
29 # include <sys/sysctl.h>
30 #endif
31 #ifdef HAVE_MACHINE_CPU_H
32 # include <machine/cpu.h>
33 #endif
34
35 #include <ctype.h>
36 #include <string.h>
37 #include <stdarg.h>
38 #include <stdio.h>
39 #include <stdlib.h>
40 #ifdef HAVE_SYS_TIME_H
41 # include <sys/time.h>
42 #endif
43
44
45 #define NONAMELESSUNION
46 #define NONAMELESSSTRUCT
47 #include "windef.h"
48 #include "winbase.h"
49 #include "winnt.h"
50 #include "winreg.h"
51 #include "winternl.h"
52 #include "winerror.h"
53 #include "wine/unicode.h"
54 #include "wine/debug.h"
55
56 WINE_DEFAULT_DEBUG_CHANNEL(reg);
57
58 #define AUTH    0x68747541      /* "Auth" */
59 #define ENTI    0x69746e65      /* "enti" */
60 #define CAMD    0x444d4163      /* "cAMD" */
61
62 /* Calls cpuid with an eax of 'ax' and returns the 16 bytes in *p
63  * We are compiled with -fPIC, so we can't clobber ebx.
64  */
65 static inline void do_cpuid(int ax, int *p)
66 {
67 #ifdef __i386__
68         __asm__("pushl %%ebx\n\t"
69                 "cpuid\n\t"
70                 "movl %%ebx, %%esi\n\t"
71                 "popl %%ebx"
72                 : "=a" (p[0]), "=S" (p[1]), "=c" (p[2]), "=d" (p[3])
73                 :  "0" (ax));
74 #endif
75 }
76
77 /* From xf86info havecpuid.c 1.11 */
78 static inline int have_cpuid(void)
79 {
80 #ifdef __i386__
81         unsigned int f1, f2;
82         __asm__("pushfl\n\t"
83                 "pushfl\n\t"
84                 "popl %0\n\t"
85                 "movl %0,%1\n\t"
86                 "xorl %2,%0\n\t"
87                 "pushl %0\n\t"
88                 "popfl\n\t"
89                 "pushfl\n\t"
90                 "popl %0\n\t"
91                 "popfl"
92                 : "=&r" (f1), "=&r" (f2)
93                 : "ir" (0x00200000));
94         return ((f1^f2) & 0x00200000) != 0;
95 #else
96         return 0;
97 #endif
98 }
99
100 static BYTE PF[64] = {0,};
101 static ULONGLONG cpuHz = 1000000000; /* default to a 1GHz */
102
103 static void create_registry_keys( const SYSTEM_INFO *info )
104 {
105     static const WCHAR SystemW[] = {'M','a','c','h','i','n','e','\\',
106                                     'H','a','r','d','w','a','r','e','\\',
107                                     'D','e','s','c','r','i','p','t','i','o','n','\\',
108                                     'S','y','s','t','e','m',0};
109     static const WCHAR fpuW[] = {'F','l','o','a','t','i','n','g','P','o','i','n','t','P','r','o','c','e','s','s','o','r',0};
110     static const WCHAR cpuW[] = {'C','e','n','t','r','a','l','P','r','o','c','e','s','s','o','r',0};
111     static const WCHAR IdentifierW[] = {'I','d','e','n','t','i','f','i','e','r',0};
112     static const WCHAR SysidW[] = {'A','T',' ','c','o','m','p','a','t','i','b','l','e',0};
113     static const WCHAR mhzKeyW[] = {'~','M','H','z',0};
114
115     unsigned int i;
116     HKEY hkey, system_key, cpu_key;
117     OBJECT_ATTRIBUTES attr;
118     UNICODE_STRING nameW, valueW;
119
120     attr.Length = sizeof(attr);
121     attr.RootDirectory = 0;
122     attr.ObjectName = &nameW;
123     attr.Attributes = 0;
124     attr.SecurityDescriptor = NULL;
125     attr.SecurityQualityOfService = NULL;
126
127     RtlInitUnicodeString( &nameW, SystemW );
128     if (NtCreateKey( &system_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) return;
129
130     RtlInitUnicodeString( &valueW, IdentifierW );
131     NtSetValueKey( system_key, &valueW, 0, REG_SZ, SysidW, (strlenW(SysidW)+1) * sizeof(WCHAR) );
132
133     attr.RootDirectory = system_key;
134     RtlInitUnicodeString( &nameW, fpuW );
135     if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL )) NtClose( hkey );
136
137     RtlInitUnicodeString( &nameW, cpuW );
138     if (!NtCreateKey( &cpu_key, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
139     {
140         for (i = 0; i < info->dwNumberOfProcessors; i++)
141         {
142             char num[10], id[20];
143
144             attr.RootDirectory = cpu_key;
145             sprintf( num, "%d", i );
146             RtlCreateUnicodeStringFromAsciiz( &nameW, num );
147             if (!NtCreateKey( &hkey, KEY_ALL_ACCESS, &attr, 0, NULL, 0, NULL ))
148             {
149                 WCHAR idW[20];
150                 DWORD cpuMHz = cpuHz / 1000000;
151
152                 sprintf( id, "CPU %ld", info->dwProcessorType );
153                 RtlMultiByteToUnicodeN( idW, sizeof(idW), NULL, id, strlen(id)+1 );
154                 NtSetValueKey( hkey, &valueW, 0, REG_SZ, idW, (strlenW(idW)+1)*sizeof(WCHAR) );
155
156                 RtlInitUnicodeString( &valueW, mhzKeyW );
157                 NtSetValueKey( hkey, &valueW, 0, REG_DWORD, &cpuMHz, sizeof(DWORD) );
158                 NtClose( hkey );
159             }
160             RtlFreeUnicodeString( &nameW );
161         }
162         NtClose( cpu_key );
163     }
164     NtClose( system_key );
165 }
166
167 /****************************************************************************
168  *              QueryPerformanceCounter (KERNEL32.@)
169  *
170  * Get the current value of the performance counter.
171  * 
172  * PARAMS
173  *  counter [O] Destination for the current counter reading
174  *
175  * RETURNS
176  *  Success: TRUE. counter contains the current reading
177  *  Failure: FALSE.
178  *
179  * SEE ALSO
180  *  See QueryPerformanceFrequency.
181  */
182 BOOL WINAPI QueryPerformanceCounter(PLARGE_INTEGER counter)
183 {
184     LARGE_INTEGER time;
185
186 #if defined(__i386__) && defined(__GNUC__)
187     if (IsProcessorFeaturePresent( PF_RDTSC_INSTRUCTION_AVAILABLE )) {
188         /* i586 optimized version */
189         __asm__ __volatile__ ( "rdtsc"
190                                : "=a" (counter->u.LowPart), "=d" (counter->u.HighPart) );
191         /* see below */
192         counter->QuadPart = counter->QuadPart / ( cpuHz / 1193182 ) ;
193         return TRUE;
194     }
195 #endif
196
197     /* fall back to generic routine (ie, for i386, i486) */
198     NtQuerySystemTime( &time );
199     counter->QuadPart = time.QuadPart;
200     return TRUE;
201 }
202
203
204 /****************************************************************************
205  *              QueryPerformanceFrequency (KERNEL32.@)
206  *
207  * Get the resolution of the performace counter.
208  *
209  * PARAMS
210  *  frequency [O] Destination for the counter resolution
211  *
212  * RETURNS
213  *  Success. TRUE. Frequency contains the resolution of the counter.
214  *  Failure: FALSE.
215  *
216  * SEE ALSO
217  *  See QueryPerformanceCounter.
218  */
219 BOOL WINAPI QueryPerformanceFrequency(PLARGE_INTEGER frequency)
220 {
221 #if defined(__i386__) && defined(__GNUC__)
222     if (IsProcessorFeaturePresent( PF_RDTSC_INSTRUCTION_AVAILABLE )) {
223         /* On a standard PC, Windows returns the clock frequency for the
224          * 8253 Programmable Interrupt Timer, which has been 1193182 Hz
225          * since the first IBM PC (cpuHz/4). There are applications that
226          * crash when the returned frequency is much higher or lower, so
227          * do not try to be smart */
228         frequency->QuadPart = 1193182;
229         return TRUE;
230     }
231 #endif
232     frequency->u.LowPart  = 10000000;
233     frequency->u.HighPart = 0;
234     return TRUE;
235 }
236
237
238 /***********************************************************************
239  *                      GetSystemInfo                   [KERNEL32.@]
240  *
241  * Get information about the system.
242  *
243  * RETURNS
244  *  Nothing.
245  *
246  * NOTES
247  * On the first call it creates cached values, so it doesn't have to determine
248  * them repeatedly. On Linux, the "/proc/cpuinfo" special file is used.
249  *
250  * It creates a registry subhierarchy, looking like:
251  * "\HARDWARE\DESCRIPTION\System\CentralProcessor\<processornumber>\Identifier (CPU x86)".
252  * Note that there is a hierarchy for every processor installed, so this
253  * supports multiprocessor systems. This is done like Win95 does it, I think.
254  *
255  * It also creates a cached flag array for IsProcessorFeaturePresent().
256  */
257 VOID WINAPI GetSystemInfo(
258         LPSYSTEM_INFO si        /* [out] Destination for system information, may not be NULL */)
259 {
260         static int cache = 0;
261         static SYSTEM_INFO cachedsi;
262
263         TRACE("si=0x%p\n", si);
264         if (cache) {
265                 memcpy(si,&cachedsi,sizeof(*si));
266                 return;
267         }
268         memset(PF,0,sizeof(PF));
269
270         /* choose sensible defaults ...
271          * FIXME: perhaps overrideable with precompiler flags?
272          */
273         cachedsi.u.s.wProcessorArchitecture     = PROCESSOR_ARCHITECTURE_INTEL;
274         cachedsi.dwPageSize                     = getpagesize();
275
276         /* FIXME: the two entries below should be computed somehow... */
277         cachedsi.lpMinimumApplicationAddress    = (void *)0x00010000;
278         cachedsi.lpMaximumApplicationAddress    = (void *)0x7FFFFFFF;
279         cachedsi.dwActiveProcessorMask          = 1;
280         cachedsi.dwNumberOfProcessors           = 1;
281         cachedsi.dwProcessorType                = PROCESSOR_INTEL_PENTIUM;
282         cachedsi.dwAllocationGranularity        = 0x10000;
283         cachedsi.wProcessorLevel                = 5; /* 586 */
284         cachedsi.wProcessorRevision             = 0;
285
286         cache = 1; /* even if there is no more info, we now have a cacheentry */
287         memcpy(si,&cachedsi,sizeof(*si));
288
289         /* Hmm, reasonable processor feature defaults? */
290
291 #ifdef linux
292         {
293         char line[200];
294         FILE *f = fopen ("/proc/cpuinfo", "r");
295
296         if (!f)
297                 return;
298         while (fgets(line,200,f)!=NULL) {
299                 char    *s,*value;
300
301                 /* NOTE: the ':' is the only character we can rely on */
302                 if (!(value = strchr(line,':')))
303                         continue;
304                 
305                 /* terminate the valuename */
306                 s = value - 1;
307                 while ((s >= line) && ((*s == ' ') || (*s == '\t'))) s--;
308                 *(s + 1) = '\0';
309
310                 /* and strip leading spaces from value */
311                 value += 1;
312                 while (*value==' ') value++;
313                 if ((s=strchr(value,'\n')))
314                         *s='\0';
315
316                 /* 2.1 method */
317                 if (!strcasecmp(line, "cpu family")) {
318                         if (isdigit (value[0])) {
319                                 switch (value[0] - '0') {
320                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
321                                         cachedsi.wProcessorLevel= 3;
322                                         break;
323                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
324                                         cachedsi.wProcessorLevel= 4;
325                                         break;
326                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
327                                         cachedsi.wProcessorLevel= 5;
328                                         break;
329                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
330                                         cachedsi.wProcessorLevel= 6;
331                                         break;
332                                 case 1: /* two-figure levels */
333                                     if (value[1] == '5')
334                                     {
335                                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
336                                         cachedsi.wProcessorLevel= 6;
337                                         break;
338                                     }
339                                     /* fall through */
340                                 default:
341                                         FIXME("unknown cpu family '%s', please report ! (-> setting to 386)\n", value);
342                                         break;
343                                 }
344                         }
345                         continue;
346                 }
347                 /* old 2.0 method */
348                 if (!strcasecmp(line, "cpu")) {
349                         if (    isdigit (value[0]) && value[1] == '8' &&
350                                 value[2] == '6' && value[3] == 0
351                         ) {
352                                 switch (value[0] - '0') {
353                                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
354                                         cachedsi.wProcessorLevel= 3;
355                                         break;
356                                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
357                                         cachedsi.wProcessorLevel= 4;
358                                         break;
359                                 case 5: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
360                                         cachedsi.wProcessorLevel= 5;
361                                         break;
362                                 case 6: cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
363                                         cachedsi.wProcessorLevel= 6;
364                                         break;
365                                 default:
366                                         FIXME("unknown Linux 2.0 cpu family '%s', please report ! (-> setting to 386)\n", value);
367                                         break;
368                                 }
369                         }
370                         continue;
371                 }
372                 if (!strcasecmp(line,"fdiv_bug")) {
373                         if (!strncasecmp(value,"yes",3))
374                                 PF[PF_FLOATING_POINT_PRECISION_ERRATA] = TRUE;
375
376                         continue;
377                 }
378                 if (!strcasecmp(line,"fpu")) {
379                         if (!strncasecmp(value,"no",2))
380                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
381
382                         continue;
383                 }
384                 if (!strcasecmp(line,"processor")) {
385                         /* processor number counts up... */
386                         unsigned int x;
387
388                         if (sscanf(value,"%d",&x))
389                                 if (x+1>cachedsi.dwNumberOfProcessors)
390                                         cachedsi.dwNumberOfProcessors=x+1;
391                         
392                         continue;
393                 }
394                 if (!strcasecmp(line,"stepping")) {
395                         int     x;
396
397                         if (sscanf(value,"%d",&x))
398                                 cachedsi.wProcessorRevision = x;
399
400                         continue;
401                 }
402                 if (!strcasecmp(line, "cpu MHz")) {
403                         double cmz;
404                         if (sscanf( value, "%lf", &cmz ) == 1) {
405                                 /* SYSTEMINFO doesn't have a slot for cpu speed, so store in a global */
406                                 cpuHz = cmz * 1000 * 1000;
407                                 TRACE("CPU speed read as %lld\n", cpuHz);
408                         }
409                         continue;
410                 }
411                 if (    !strcasecmp(line,"flags")       ||
412                         !strcasecmp(line,"features")
413                 ) {
414                         if (strstr(value,"cx8"))
415                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
416                         if (strstr(value,"mmx"))
417                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
418                         if (strstr(value,"tsc"))
419                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
420                         if (strstr(value,"3dnow"))
421                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = TRUE;
422                         /* This will also catch sse2, but we have sse itself
423                          * if we have sse2, so no problem */
424                         if (strstr(value,"sse"))
425                                 PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
426                         if (strstr(value,"sse2"))
427                                 PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
428                         if (strstr(value,"pae"))
429                                 PF[PF_PAE_ENABLED] = TRUE;
430                         
431                         continue;
432                 }
433         }
434         fclose (f);
435         }
436         memcpy(si,&cachedsi,sizeof(*si));
437 #elif defined (__NetBSD__)
438         {
439              int mib[2];
440              int value[2];
441              char model[256];
442              char *cpuclass;
443              FILE *f = fopen ("/var/run/dmesg.boot", "r");
444
445              /* first deduce as much as possible from the sysctls */
446              mib[0] = CTL_MACHDEP;
447 #ifdef CPU_FPU_PRESENT
448              mib[1] = CPU_FPU_PRESENT;
449              value[1] = sizeof(int);
450              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
451                  if (value) PF[PF_FLOATING_POINT_EMULATED] = FALSE;
452                  else       PF[PF_FLOATING_POINT_EMULATED] = TRUE;
453 #endif
454 #ifdef CPU_SSE
455              mib[1] = CPU_SSE;   /* this should imply MMX */
456              value[1] = sizeof(int);
457              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
458                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
459 #endif
460 #ifdef CPU_SSE2
461              mib[1] = CPU_SSE2;  /* this should imply MMX */
462              value[1] = sizeof(int);
463              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
464                  if (value) PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
465 #endif
466              mib[0] = CTL_HW;
467              mib[1] = HW_NCPU;
468              value[1] = sizeof(int);
469              if (sysctl(mib, 2, value, value+1, NULL, 0) >= 0)
470                  if (value[0] > cachedsi.dwNumberOfProcessors)
471                     cachedsi.dwNumberOfProcessors = value[0];
472              mib[1] = HW_MODEL;
473              value[1] = 255;
474              if (sysctl(mib, 2, model, value+1, NULL, 0) >= 0) {
475                   model[value[1]] = '\0'; /* just in case */
476                   cpuclass = strstr(model, "-class");
477                   if (cpuclass != NULL) {
478                        while(cpuclass > model && cpuclass[0] != '(') cpuclass--;
479                        if (!strncmp(cpuclass+1, "386", 3)) {
480                             cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
481                             cachedsi.wProcessorLevel= 3;
482                        }
483                        if (!strncmp(cpuclass+1, "486", 3)) {
484                             cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
485                             cachedsi.wProcessorLevel= 4;
486                        }
487                        if (!strncmp(cpuclass+1, "586", 3)) {
488                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
489                             cachedsi.wProcessorLevel= 5;
490                        }
491                        if (!strncmp(cpuclass+1, "686", 3)) {
492                             cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
493                             cachedsi.wProcessorLevel= 6;
494                             /* this should imply MMX */
495                             PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
496                        }
497                   }
498              }
499
500              /* it may be worth reading from /var/run/dmesg.boot for
501                 additional information such as CX8, MMX and TSC
502                 (however this information should be considered less
503                  reliable than that from the sysctl calls) */
504              if (f != NULL)
505              {
506                  while (fgets(model, 255, f) != NULL) {
507                         if (sscanf(model,"cpu%d: features %x<", value, value+1) == 2) {
508                             /* we could scan the string but it is easier
509                                to test the bits directly */
510                             if (value[1] & 0x1)
511                                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
512                             if (value[1] & 0x10)
513                                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
514                             if (value[1] & 0x100)
515                                 PF[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
516                             if (value[1] & 0x800000)
517                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
518
519                             break;
520                         }
521                  }
522                  fclose(f);
523              }
524
525         }
526         memcpy(si,&cachedsi,sizeof(*si));
527 #elif defined(__FreeBSD__)
528         {
529         unsigned int regs[4], regs2[4];
530         int ret, len, num;
531         if (!have_cpuid())
532                 regs[0] = 0;                    /* No cpuid support -- skip the rest */
533         else
534                 do_cpuid(0x00000000, regs);     /* get standard cpuid level and vendor name */
535         if (regs[0]>=0x00000001) {              /* Check for supported cpuid version */
536                 do_cpuid(0x00000001, regs2);    /* get cpu features */
537                 switch ((regs2[0] >> 8)&0xf) {  /* cpu family */
538                 case 3: cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
539                         cachedsi.wProcessorLevel = 3;
540                         break;
541                 case 4: cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
542                         cachedsi.wProcessorLevel = 4;
543                         break;
544                 case 5:
545                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
546                         cachedsi.wProcessorLevel = 5;
547                         break;
548                 case 6:
549                 case 15: /* PPro/2/3/4 has same info as P1 */
550                         cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
551                         cachedsi.wProcessorLevel = 6;
552                         break;
553                 default:
554                         FIXME("unknown FreeBSD cpu family %d, please report! (-> setting to 386)\n", \
555                                 (regs2[0] >> 8)&0xf);
556                         break;
557                 }
558                 PF[PF_FLOATING_POINT_EMULATED]     = !(regs2[3] & 1);
559                 PF[PF_RDTSC_INSTRUCTION_AVAILABLE] = (regs2[3] & (1 << 4 )) >> 4;
560                 PF[PF_COMPARE_EXCHANGE_DOUBLE]     = (regs2[3] & (1 << 8 )) >> 8;
561                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE]  = (regs2[3] & (1 << 23)) >> 23;
562                 /* Check for OS support of SSE -- Is this used, and should it be sse1 or sse2? */
563                 /*len = sizeof(num);
564                 ret = sysctlbyname("hw.instruction_sse", &num, &len, NULL, 0);
565                 if (!ret)
566                         PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = num;*/
567                 
568                 if (regs[1] == AUTH &&
569                     regs[3] == ENTI &&
570                     regs[2] == CAMD) {
571                         do_cpuid(0x80000000, regs);             /* get vendor cpuid level */
572                         if (regs[0]>=0x80000001) {
573                                 do_cpuid(0x80000001, regs2);    /* get vendor features */
574                                 PF[PF_3DNOW_INSTRUCTIONS_AVAILABLE] = 
575                                     (regs2[3] & (1 << 31 )) >> 31;
576                         }
577                 }
578         }
579         len = sizeof(num);
580         ret = sysctlbyname("hw.ncpu", &num, &len, NULL, 0);
581         if (!ret)
582                 cachedsi.dwNumberOfProcessors = num;
583         }
584         memcpy(si,&cachedsi,sizeof(*si));
585 #elif defined (__APPLE__)
586         {
587         size_t valSize;
588         unsigned long long longVal;
589         int value;
590         int cputype;
591             
592         valSize = sizeof(int);
593         if (sysctlbyname ("hw.optional.floatingpoint", &value, &valSize, NULL, 0) == 0)
594         {
595             if (value)
596                 PF[PF_FLOATING_POINT_EMULATED] = FALSE;
597             else
598                 PF[PF_FLOATING_POINT_EMULATED] = TRUE;
599         }
600         valSize = sizeof(int);
601         if (sysctlbyname ("hw.ncpu", &value, &valSize, NULL, 0) == 0)
602         cachedsi.dwNumberOfProcessors = value;
603  
604         valSize = sizeof(int);
605         if (sysctlbyname ("hw.activecpu", &value, &valSize, NULL, 0) == 0)
606             cachedsi.dwActiveProcessorMask = value;
607             
608         valSize = sizeof(int);
609         if (sysctlbyname ("hw.cputype", &cputype, &valSize, NULL, 0) == 0)
610         {
611             valSize = sizeof(int);
612             if (sysctlbyname ("hw.cpusubtype", &value, &valSize, NULL, 0) == 0)
613             {
614                 switch (cputype)
615                 {
616                     case CPU_TYPE_POWERPC:
617                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_PPC;
618                         switch (value)
619                         {
620                             case CPU_SUBTYPE_POWERPC_601:
621                             case CPU_SUBTYPE_POWERPC_602:
622                                 cachedsi.dwProcessorType = PROCESSOR_PPC_601;
623                                 cachedsi.wProcessorLevel = 1;
624                                 break;
625                             case CPU_SUBTYPE_POWERPC_603:
626                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
627                                 cachedsi.wProcessorLevel = 3;
628                                 break;
629                             case CPU_SUBTYPE_POWERPC_603e:
630                             case CPU_SUBTYPE_POWERPC_603ev:
631                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
632                                 cachedsi.wProcessorLevel = 6;
633                                 break;
634                             case CPU_SUBTYPE_POWERPC_604:
635                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
636                                 cachedsi.wProcessorLevel = 4;
637                                 break;
638                             case CPU_SUBTYPE_POWERPC_604e:
639                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
640                                 cachedsi.wProcessorLevel = 9;
641                                 break;
642                             case CPU_SUBTYPE_POWERPC_620:
643                                 cachedsi.dwProcessorType = PROCESSOR_PPC_620;
644                                 cachedsi.wProcessorLevel = 20;
645                                 break;
646                             case CPU_SUBTYPE_POWERPC_750:
647                             case CPU_SUBTYPE_POWERPC_7400:
648                             case CPU_SUBTYPE_POWERPC_7450:
649                                 /* G3/G4 derivate from 603 so ... */
650                                 cachedsi.dwProcessorType = PROCESSOR_PPC_603;
651                                 cachedsi.wProcessorLevel = 6;
652                                 break;
653                             case CPU_SUBTYPE_POWERPC_970:
654                                 cachedsi.dwProcessorType = PROCESSOR_PPC_604;
655                                 cachedsi.wProcessorLevel = 9;
656                                 /* :o) PF[PF_ALTIVEC_INSTRUCTIONS_AVAILABLE] ;-) */
657                                 break;
658                             default: break;
659                         }
660                         break; /* CPU_TYPE_POWERPC */
661                     case CPU_TYPE_I386:
662                         cachedsi.u.s.wProcessorArchitecture = PROCESSOR_ARCHITECTURE_INTEL;
663                         switch (value)
664                         {
665                             case CPU_SUBTYPE_386:
666                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_386;
667                                 cachedsi.wProcessorLevel = 3;
668                                 break;
669                             case CPU_SUBTYPE_486:
670                             case CPU_SUBTYPE_486SX:
671                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_486;
672                                 cachedsi.wProcessorLevel = 4;
673                                 break;
674                             case CPU_SUBTYPE_586:
675                             case CPU_SUBTYPE_PENTPRO:
676                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
677                                 cachedsi.wProcessorLevel = 5;
678                                 break;
679                             case CPU_SUBTYPE_PENTII_M3:
680                             case CPU_SUBTYPE_PENTII_M5:
681                                 cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
682                                 cachedsi.wProcessorLevel = 5;
683                                 /* this should imply MMX */
684                                 PF[PF_MMX_INSTRUCTIONS_AVAILABLE] = TRUE;
685                                 break;
686                             default: break;
687                         }
688                         break; /* CPU_TYPE_I386 */
689                     default: break;
690                 } /* switch (cputype) */
691             }
692         }
693         valSize = sizeof(longVal);
694         if (!sysctlbyname("hw.cpufrequency", &longVal, &valSize, NULL, 0))
695             cpuHz = longVal;
696         }
697         memcpy(si,&cachedsi,sizeof(*si));
698 #else
699         FIXME("not yet supported on this system\n");
700 #endif
701         TRACE("<- CPU arch %d, res'd %d, pagesize %ld, minappaddr %p, maxappaddr %p,"
702               " act.cpumask %08lx, numcpus %ld, CPU type %ld, allocgran. %ld, CPU level %d, CPU rev %d\n",
703               si->u.s.wProcessorArchitecture, si->u.s.wReserved, si->dwPageSize,
704               si->lpMinimumApplicationAddress, si->lpMaximumApplicationAddress,
705               si->dwActiveProcessorMask, si->dwNumberOfProcessors, si->dwProcessorType,
706               si->dwAllocationGranularity, si->wProcessorLevel, si->wProcessorRevision);
707
708         create_registry_keys( &cachedsi );
709 }
710
711
712 /***********************************************************************
713  *                      IsProcessorFeaturePresent       [KERNEL32.@]
714  *
715  * Determine if the cpu supports a given feature.
716  * 
717  * RETURNS
718  *  TRUE, If the processor supports feature,
719  *  FALSE otherwise.
720  */
721 BOOL WINAPI IsProcessorFeaturePresent (
722         DWORD feature   /* [in] Feature number, (PF_ constants from "winnt.h") */) 
723 {
724   SYSTEM_INFO si;
725   GetSystemInfo (&si); /* To ensure the information is loaded and cached */
726
727   if (feature < 64)
728     return PF[feature];
729   else
730     return FALSE;
731 }