1 /* Include OpenCL header, and define OpenCL extensions, since what is and is not
2 * available in the official headers is very system-dependent */
7 /* Khronos now provides unified headers for all OpenCL versions, and
8 * it should be included after defining a target OpenCL version
9 * (otherwise, the maximum version will simply be used, but a message
12 * TODO: until 3.0 gets finalized, we only target 2.2 because the 3.0
13 * defines etc are still changing, so users may have an older version
14 * of the 3.0 headers lying around, which may prevent clinfo from being
17 #define CL_TARGET_OPENCL_VERSION 220
19 /* We will use the deprecated clGetExtensionFunctionAddress,
20 * so let the headers know that we don't care about it being deprecated.
21 * The standard CL_USE_DEPRECATED_OPENCL_1_1_APIS define apparently
22 * doesn't work for macOS, so we'll just tell the compiler to not
23 * warn about deprecated functions.
24 * A more correct solution would be to suppress the warning only around the
25 * clGetExtensionFunctionAddress call, but honestly I just cleaned up that
26 * piece of code. And I'm actually wondering if it even makes sense to
27 * build that part of the code on macOS: does anybody actually use
28 * ocl-icd as OpenCL dispatcher on macOS?
32 #pragma GCC diagnostic ignored "-Wdeprecated-declarations"
33 #include <OpenCL/opencl.h>
35 #define CL_USE_DEPRECATED_OPENCL_1_1_APIS
39 /* Very old headers will be missing these defines */
40 #ifndef CL_VERSION_1_1
41 #define CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF 0x1034
42 #define CL_DEVICE_HOST_UNIFIED_MEMORY 0x1035
43 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR 0x1036
44 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT 0x1037
45 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_INT 0x1038
46 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG 0x1039
47 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT 0x103A
48 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE 0x103B
49 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF 0x103C
50 #define CL_DEVICE_OPENCL_C_VERSION 0x103D
52 #define CL_FP_SOFT_FLOAT (1 << 6)
54 #define CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE 0x11B3
57 #ifndef CL_VERSION_1_2
58 #define CL_DEVICE_TYPE_CUSTOM (1 << 4)
60 #define CL_DEVICE_LINKER_AVAILABLE 0x103E
61 #define CL_DEVICE_BUILT_IN_KERNELS 0x103F
62 #define CL_DEVICE_IMAGE_MAX_BUFFER_SIZE 0x1040
63 #define CL_DEVICE_IMAGE_MAX_ARRAY_SIZE 0x1041
64 #define CL_DEVICE_PARTITION_MAX_SUB_DEVICES 0x1043
65 #define CL_DEVICE_PARTITION_PROPERTIES 0x1044
66 #define CL_DEVICE_PARTITION_AFFINITY_DOMAIN 0x1045
67 #define CL_DEVICE_PARTITION_TYPE 0x1046
68 #define CL_DEVICE_PREFERRED_INTEROP_USER_SYNC 0x1048
69 #define CL_DEVICE_PRINTF_BUFFER_SIZE 0x1049
70 #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT 0x104A
71 #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT 0x104B
73 #define CL_FP_CORRECTLY_ROUNDED_DIVIDE_SQRT (1 << 7)
75 /* cl_device_partition_property */
76 #define CL_DEVICE_PARTITION_EQUALLY 0x1086
77 #define CL_DEVICE_PARTITION_BY_COUNTS 0x1087
78 #define CL_DEVICE_PARTITION_BY_COUNTS_LIST_END 0x0
79 #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN 0x1088
81 /* cl_device_affinity_domain */
82 #define CL_DEVICE_AFFINITY_DOMAIN_NUMA (1 << 0)
83 #define CL_DEVICE_AFFINITY_DOMAIN_L4_CACHE (1 << 1)
84 #define CL_DEVICE_AFFINITY_DOMAIN_L3_CACHE (1 << 2)
85 #define CL_DEVICE_AFFINITY_DOMAIN_L2_CACHE (1 << 3)
86 #define CL_DEVICE_AFFINITY_DOMAIN_L1_CACHE (1 << 4)
87 #define CL_DEVICE_AFFINITY_DOMAIN_NEXT_PARTITIONABLE (1 << 5)
91 /* These two defines were introduced in the 1.2 headers
92 * on 2012-11-30, so earlier versions don't have them
93 * (e.g. Debian wheezy)
96 #ifndef CL_DEVICE_IMAGE_PITCH_ALIGNMENT
97 #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT 0x104A
98 #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT 0x104B
101 /* 2.0 headers are not very common for the time being, so
102 * let's copy the defines for the new CL_DEVICE_* properties
105 #ifndef CL_VERSION_2_0
106 #define CL_DEVICE_MAX_READ_WRITE_IMAGE_ARGS 0x104C
107 #define CL_DEVICE_MAX_GLOBAL_VARIABLE_SIZE 0x104D
108 #define CL_DEVICE_QUEUE_ON_HOST_PROPERTIES 0x102A
109 #define CL_DEVICE_QUEUE_ON_DEVICE_PROPERTIES 0x104E
110 #define CL_DEVICE_QUEUE_ON_DEVICE_PREFERRED_SIZE 0x104F
111 #define CL_DEVICE_QUEUE_ON_DEVICE_MAX_SIZE 0x1050
112 #define CL_DEVICE_MAX_ON_DEVICE_QUEUES 0x1051
113 #define CL_DEVICE_MAX_ON_DEVICE_EVENTS 0x1052
114 #define CL_DEVICE_SVM_CAPABILITIES 0x1053
115 #define CL_DEVICE_GLOBAL_VARIABLE_PREFERRED_TOTAL_SIZE 0x1054
116 #define CL_DEVICE_MAX_PIPE_ARGS 0x1055
117 #define CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS 0x1056
118 #define CL_DEVICE_PIPE_MAX_PACKET_SIZE 0x1057
119 #define CL_DEVICE_PREFERRED_PLATFORM_ATOMIC_ALIGNMENT 0x1058
120 #define CL_DEVICE_PREFERRED_GLOBAL_ATOMIC_ALIGNMENT 0x1059
121 #define CL_DEVICE_PREFERRED_LOCAL_ATOMIC_ALIGNMENT 0x105A
123 #define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER (1 << 0)
124 #define CL_DEVICE_SVM_FINE_GRAIN_BUFFER (1 << 1)
125 #define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM (1 << 2)
126 #define CL_DEVICE_SVM_ATOMICS (1 << 3)
128 typedef cl_bitfield cl_device_svm_capabilities;
131 #ifndef CL_VERSION_2_1
132 #define CL_PLATFORM_HOST_TIMER_RESOLUTION 0x0905
133 #define CL_DEVICE_IL_VERSION 0x105B
134 #define CL_DEVICE_MAX_NUM_SUB_GROUPS 0x105C
135 #define CL_DEVICE_SUB_GROUP_INDEPENDENT_FORWARD_PROGRESS 0x105D
138 #ifndef CL_VERSION_3_0
139 #define CL_PLATFORM_NUMERIC_VERSION 0x0906
140 #define CL_PLATFORM_EXTENSIONS_WITH_VERSION 0x0907
141 #define CL_DEVICE_NUMERIC_VERSION 0x105E
142 #define CL_DEVICE_EXTENSIONS_WITH_VERSION 0x1060
143 #define CL_DEVICE_ILS_WITH_VERSION 0x1061
144 #define CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION 0x1062
145 #define CL_DEVICE_ATOMIC_MEMORY_CAPABILITIES 0x1063
146 #define CL_DEVICE_ATOMIC_FENCE_CAPABILITIES 0x1064
147 #define CL_DEVICE_NON_UNIFORM_WORK_GROUP_SUPPORT 0x1065
148 #define CL_DEVICE_OPENCL_C_ALL_VERSIONS 0x1066
149 #define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_MULTIPLE 0x1067
150 #define CL_DEVICE_WORK_GROUP_COLLECTIVE_FUNCTIONS_SUPPORT 0x1068
151 #define CL_DEVICE_GENERIC_ADDRESS_SPACE_SUPPORT 0x1069
152 #define CL_DEVICE_OPENCL_C_FEATURES 0x106F
153 #define CL_DEVICE_DEVICE_ENQUEUE_CAPABILITIES 0x1070
154 #define CL_DEVICE_PIPE_SUPPORT 0x1071
155 #define CL_DEVICE_LATEST_CONFORMANCE_VERSION_PASSED 0x1072
158 typedef cl_bitfield cl_device_atomic_capabilities;
159 typedef cl_bitfield cl_device_device_enqueue_capabilities;
160 typedef cl_uint cl_version;
162 #define CL_NAME_VERSION_MAX_NAME_SIZE 64
164 typedef struct _cl_name_version {
166 char name[CL_NAME_VERSION_MAX_NAME_SIZE];
169 /* cl_device_atomic_capabilities */
170 #define CL_DEVICE_ATOMIC_ORDER_RELAXED (1 << 0)
171 #define CL_DEVICE_ATOMIC_ORDER_ACQ_REL (1 << 1)
172 #define CL_DEVICE_ATOMIC_ORDER_SEQ_CST (1 << 2)
173 #define CL_DEVICE_ATOMIC_SCOPE_WORK_ITEM (1 << 3)
174 #define CL_DEVICE_ATOMIC_SCOPE_WORK_GROUP (1 << 4)
175 #define CL_DEVICE_ATOMIC_SCOPE_DEVICE (1 << 5)
176 #define CL_DEVICE_ATOMIC_SCOPE_ALL_DEVICES (1 << 6)
178 /* cl_device_device_enqueue_capabilities */
179 #define CL_DEVICE_QUEUE_SUPPORTED (1 << 0)
180 #define CL_DEVICE_QUEUE_REPLACEABLE_DEFAULT (1 << 1)
189 #define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920
190 #define CL_PLATFORM_NOT_FOUND_KHR -1001
192 /* cl_amd_object_metadata */
193 #define CL_PLATFORM_MAX_KEYS_AMD 0x403C
196 #define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032
199 #define CL_DEVICE_HALF_FP_CONFIG 0x1033
201 /* cl_khr_il_program */
202 #define CL_DEVICE_IL_VERSION_KHR 0x105B
204 /* cl_khr_terminate_context */
205 #define CL_DEVICE_TERMINATE_CAPABILITY_KHR_1x 0x200F
206 #define CL_DEVICE_TERMINATE_CAPABILITY_KHR_2x 0x2031
208 /* TODO: I cannot find official definitions for these,
209 * so I'm currently extrapolating them from the specification
211 typedef cl_bitfield cl_device_terminate_capability_khr;
212 #define CL_DEVICE_TERMINATE_CAPABILITY_CONTEXT_KHR (1<<0)
214 /* cl_khr_subgroup_named_barrier */
215 #define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035
217 /* cl_nv_device_attribute_query */
218 #define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
219 #define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
220 #define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002
221 #define CL_DEVICE_WARP_SIZE_NV 0x4003
222 #define CL_DEVICE_GPU_OVERLAP_NV 0x4004
223 #define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
224 #define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006
225 #define CL_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT_NV 0x4007
226 #define CL_DEVICE_PCI_BUS_ID_NV 0x4008
227 #define CL_DEVICE_PCI_SLOT_ID_NV 0x4009
229 /* cl_ext_atomic_counters_{32,64} */
230 #define CL_DEVICE_MAX_ATOMIC_COUNTERS_EXT 0x4032
232 /* cl_amd_device_attribute_query */
233 #define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036
234 #define CL_DEVICE_TOPOLOGY_AMD 0x4037
235 #define CL_DEVICE_BOARD_NAME_AMD 0x4038
236 #define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
237 #define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 0x4040
238 #define CL_DEVICE_SIMD_WIDTH_AMD 0x4041
239 #define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 0x4042
240 #define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043
241 #define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 0x4044
242 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 0x4045
243 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046
244 #define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 0x4047
245 #define CL_DEVICE_LOCAL_MEM_BANKS_AMD 0x4048
246 #define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 0x4049
247 #define CL_DEVICE_GFXIP_MAJOR_AMD 0x404A
248 #define CL_DEVICE_GFXIP_MINOR_AMD 0x404B
249 #define CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD 0x404C
250 /* These two are undocumented */
251 #define CL_DEVICE_MAX_REAL_TIME_COMPUTE_QUEUES_AMD 0x404D
252 #define CL_DEVICE_MAX_REAL_TIME_COMPUTE_UNITS_AMD 0x404E
253 /* These were added in v4 of the extension, but have values lower than
254 * than the older ones, and spanning around the cl_ext_atomic_counters_*
257 #define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD 0x4030
258 #define CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD 0x4031
259 #define CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD 0x4033
260 #define CL_DEVICE_PCIE_ID_AMD 0x4034
262 #ifndef CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD
263 #define CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD 1
267 struct { cl_uint type; cl_uint data[5]; } raw;
268 struct { cl_uint type; cl_char unused[17]; cl_char bus; cl_char device; cl_char function; } pcie;
269 } cl_device_topology_amd;
272 /* cl_amd_offline_devices */
273 #define CL_CONTEXT_OFFLINE_DEVICES_AMD 0x403F
275 /* cl_amd_copy_buffer_p2p */
276 #define CL_DEVICE_NUM_P2P_DEVICES_AMD 0x4088
277 #define CL_DEVICE_P2P_DEVICES_AMD 0x4089
279 /* cl_ext_cxx_for_opencl */
280 #define CL_DEVICE_CXX_FOR_OPENCL_NUMERIC_VERSION_EXT 0x4230
282 /* cl_ext_device_fission */
283 #define cl_ext_device_fission 1
285 typedef cl_ulong cl_device_partition_property_ext;
287 #define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050
288 #define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051
289 #define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052
290 #define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052 /* cl_intel_device_partition_by_names */
291 #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053
293 #define CL_DEVICE_PARENT_DEVICE_EXT 0x4054
294 #define CL_DEVICE_PARTITION_TYPES_EXT 0x4055
295 #define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056
296 #define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057
297 #define CL_DEVICE_PARTITION_STYLE_EXT 0x4058
299 #define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1
300 #define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2
301 #define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3
302 #define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4
303 #define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10
304 #define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100
306 /* cl_intel_advanced_motion_estimation */
307 #define CL_DEVICE_ME_VERSION_INTEL 0x407E
309 /* cl_intel_device_side_avc_motion_estimation */
310 #define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B
311 #define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C
312 #define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D
314 /* cl_intel_planar_yuv */
315 #define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E
316 #define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F
318 /* cl_qcom_ext_host_ptr */
319 #define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0
320 #define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1
322 /* cl_arm_shared_virtual_memory */
323 #define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6
326 #define CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM 0x40BF
329 #define CL_DEVICE_SPIR_VERSIONS 0x40E0
331 /* cl_altera_device_temperature */
332 #define CL_DEVICE_CORE_TEMPERATURE_ALTERA 0x40F3
334 /* cl_intel_simultaneous_sharing */
335 #define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104
336 #define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105
338 /* cl_intel_required_subgroup_size */
339 #define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108
341 /* cl_arm_job_slot_selection */
342 #define CL_DEVICE_JOB_SLOTS_ARM 0x41E0
344 /* clGeICDLoaderInfoOCLICD */
346 CL_ICDL_OCL_VERSION=1,