1 /* Include OpenCL header, and define OpenCL extensions, since what is and is not
2 * available in the official headers is very system-dependent */
7 /* Khronos now provides unified headers for all OpenCL versions, and
8 * it should be included after defining a target OpenCL version
9 * (otherwise, the maximum version will simply be used, but a message
12 #define CL_TARGET_OPENCL_VERSION 220
14 /* We will use the deprecated clGetExtensionFunctionAddress,
15 * so let the headers know that we don't care about it being deprecated.
16 * The standard CL_USE_DEPRECATED_OPENCL_1_1_APIS define apparently
17 * doesn't work for macOS, so we'll just tell the compiler to not
18 * warn about deprecated functions.
19 * A more correct solution would be to suppress the warning only around the
20 * clGetExtensionFunctionAddress call, but honestly I just cleaned up that
21 * piece of code. And I'm actually wondering if it even makes sense to
22 * build that part of the code on macOS: does anybody actually use
23 * ocl-icd as OpenCL dispatcher on macOS?
27 #pragma GCC diagnostic ignored "-Wdeprecated-declarations"
28 #include <OpenCL/opencl.h>
30 #define CL_USE_DEPRECATED_OPENCL_1_1_APIS
34 /* Very old headers will be missing these defines */
35 #ifndef CL_VERSION_1_1
36 #define CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF 0x1034
37 #define CL_DEVICE_HOST_UNIFIED_MEMORY 0x1035
38 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR 0x1036
39 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT 0x1037
40 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_INT 0x1038
41 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG 0x1039
42 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT 0x103A
43 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE 0x103B
44 #define CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF 0x103C
45 #define CL_DEVICE_OPENCL_C_VERSION 0x103D
47 #define CL_FP_SOFT_FLOAT (1 << 6)
49 #define CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE 0x11B3
52 #ifndef CL_VERSION_1_2
53 #define CL_DEVICE_TYPE_CUSTOM (1 << 4)
55 #define CL_DEVICE_LINKER_AVAILABLE 0x103E
56 #define CL_DEVICE_BUILT_IN_KERNELS 0x103F
57 #define CL_DEVICE_IMAGE_MAX_BUFFER_SIZE 0x1040
58 #define CL_DEVICE_IMAGE_MAX_ARRAY_SIZE 0x1041
59 #define CL_DEVICE_PARTITION_MAX_SUB_DEVICES 0x1043
60 #define CL_DEVICE_PARTITION_PROPERTIES 0x1044
61 #define CL_DEVICE_PARTITION_AFFINITY_DOMAIN 0x1045
62 #define CL_DEVICE_PARTITION_TYPE 0x1046
63 #define CL_DEVICE_PREFERRED_INTEROP_USER_SYNC 0x1048
64 #define CL_DEVICE_PRINTF_BUFFER_SIZE 0x1049
65 #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT 0x104A
66 #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT 0x104B
68 #define CL_FP_CORRECTLY_ROUNDED_DIVIDE_SQRT (1 << 7)
70 /* cl_device_partition_property */
71 #define CL_DEVICE_PARTITION_EQUALLY 0x1086
72 #define CL_DEVICE_PARTITION_BY_COUNTS 0x1087
73 #define CL_DEVICE_PARTITION_BY_COUNTS_LIST_END 0x0
74 #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN 0x1088
76 /* cl_device_affinity_domain */
77 #define CL_DEVICE_AFFINITY_DOMAIN_NUMA (1 << 0)
78 #define CL_DEVICE_AFFINITY_DOMAIN_L4_CACHE (1 << 1)
79 #define CL_DEVICE_AFFINITY_DOMAIN_L3_CACHE (1 << 2)
80 #define CL_DEVICE_AFFINITY_DOMAIN_L2_CACHE (1 << 3)
81 #define CL_DEVICE_AFFINITY_DOMAIN_L1_CACHE (1 << 4)
82 #define CL_DEVICE_AFFINITY_DOMAIN_NEXT_PARTITIONABLE (1 << 5)
86 /* These two defines were introduced in the 1.2 headers
87 * on 2012-11-30, so earlier versions don't have them
88 * (e.g. Debian wheezy)
91 #ifndef CL_DEVICE_IMAGE_PITCH_ALIGNMENT
92 #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT 0x104A
93 #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT 0x104B
96 /* 2.0 headers are not very common for the time being, so
97 * let's copy the defines for the new CL_DEVICE_* properties
100 #ifndef CL_VERSION_2_0
101 #define CL_DEVICE_MAX_READ_WRITE_IMAGE_ARGS 0x104C
102 #define CL_DEVICE_MAX_GLOBAL_VARIABLE_SIZE 0x104D
103 #define CL_DEVICE_QUEUE_ON_HOST_PROPERTIES 0x102A
104 #define CL_DEVICE_QUEUE_ON_DEVICE_PROPERTIES 0x104E
105 #define CL_DEVICE_QUEUE_ON_DEVICE_PREFERRED_SIZE 0x104F
106 #define CL_DEVICE_QUEUE_ON_DEVICE_MAX_SIZE 0x1050
107 #define CL_DEVICE_MAX_ON_DEVICE_QUEUES 0x1051
108 #define CL_DEVICE_MAX_ON_DEVICE_EVENTS 0x1052
109 #define CL_DEVICE_SVM_CAPABILITIES 0x1053
110 #define CL_DEVICE_GLOBAL_VARIABLE_PREFERRED_TOTAL_SIZE 0x1054
111 #define CL_DEVICE_MAX_PIPE_ARGS 0x1055
112 #define CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS 0x1056
113 #define CL_DEVICE_PIPE_MAX_PACKET_SIZE 0x1057
114 #define CL_DEVICE_PREFERRED_PLATFORM_ATOMIC_ALIGNMENT 0x1058
115 #define CL_DEVICE_PREFERRED_GLOBAL_ATOMIC_ALIGNMENT 0x1059
116 #define CL_DEVICE_PREFERRED_LOCAL_ATOMIC_ALIGNMENT 0x105A
118 #define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER (1 << 0)
119 #define CL_DEVICE_SVM_FINE_GRAIN_BUFFER (1 << 1)
120 #define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM (1 << 2)
121 #define CL_DEVICE_SVM_ATOMICS (1 << 3)
123 typedef cl_bitfield cl_device_svm_capabilities;
126 #ifndef CL_VERSION_2_1
127 #define CL_PLATFORM_HOST_TIMER_RESOLUTION 0x0905
128 #define CL_DEVICE_IL_VERSION 0x105B
129 #define CL_DEVICE_MAX_NUM_SUB_GROUPS 0x105C
130 #define CL_DEVICE_SUB_GROUP_INDEPENDENT_FORWARD_PROGRESS 0x105D
138 #define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920
139 #define CL_PLATFORM_NOT_FOUND_KHR -1001
141 /* cl_amd_object_metadata */
142 #define CL_PLATFORM_MAX_KEYS_AMD 0x403C
145 #define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032
148 #define CL_DEVICE_HALF_FP_CONFIG 0x1033
150 /* cl_khr_il_program */
151 #define CL_DEVICE_IL_VERSION_KHR 0x105B
153 /* cl_khr_terminate_context */
154 #define CL_DEVICE_TERMINATE_CAPABILITY_KHR_1x 0x200F
155 #define CL_DEVICE_TERMINATE_CAPABILITY_KHR_2x 0x2031
157 /* TODO: I cannot find official definitions for these,
158 * so I'm currently extrapolating them from the specification
160 typedef cl_bitfield cl_device_terminate_capability_khr;
161 #define CL_DEVICE_TERMINATE_CAPABILITY_CONTEXT_KHR (1<<0)
163 /* cl_khr_subgroup_named_barrier */
164 #define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035
166 /* cl_nv_device_attribute_query */
167 #define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
168 #define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
169 #define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002
170 #define CL_DEVICE_WARP_SIZE_NV 0x4003
171 #define CL_DEVICE_GPU_OVERLAP_NV 0x4004
172 #define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
173 #define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006
174 #define CL_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT_NV 0x4007
175 #define CL_DEVICE_PCI_BUS_ID_NV 0x4008
176 #define CL_DEVICE_PCI_SLOT_ID_NV 0x4009
178 /* cl_ext_atomic_counters_{32,64} */
179 #define CL_DEVICE_MAX_ATOMIC_COUNTERS_EXT 0x4032
181 /* cl_amd_device_attribute_query */
182 #define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036
183 #define CL_DEVICE_TOPOLOGY_AMD 0x4037
184 #define CL_DEVICE_BOARD_NAME_AMD 0x4038
185 #define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
186 #define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 0x4040
187 #define CL_DEVICE_SIMD_WIDTH_AMD 0x4041
188 #define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 0x4042
189 #define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043
190 #define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 0x4044
191 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 0x4045
192 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046
193 #define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 0x4047
194 #define CL_DEVICE_LOCAL_MEM_BANKS_AMD 0x4048
195 #define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 0x4049
196 #define CL_DEVICE_GFXIP_MAJOR_AMD 0x404A
197 #define CL_DEVICE_GFXIP_MINOR_AMD 0x404B
198 #define CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD 0x404C
199 /* These two are undocumented */
200 #define CL_DEVICE_MAX_REAL_TIME_COMPUTE_QUEUES_AMD 0x404D
201 #define CL_DEVICE_MAX_REAL_TIME_COMPUTE_UNITS_AMD 0x404E
202 /* These were added in v4 of the extension, but have values lower than
203 * than the older ones, and spanning around the cl_ext_atomic_counters_*
206 #define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD 0x4030
207 #define CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD 0x4031
208 #define CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD 0x4033
209 #define CL_DEVICE_PCIE_ID_AMD 0x4034
211 #ifndef CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD
212 #define CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD 1
216 struct { cl_uint type; cl_uint data[5]; } raw;
217 struct { cl_uint type; cl_char unused[17]; cl_char bus; cl_char device; cl_char function; } pcie;
218 } cl_device_topology_amd;
221 /* cl_amd_offline_devices */
222 #define CL_CONTEXT_OFFLINE_DEVICES_AMD 0x403F
224 /* cl_amd_copy_buffer_p2p */
225 #define CL_DEVICE_NUM_P2P_DEVICES_AMD 0x4088
226 #define CL_DEVICE_P2P_DEVICES_AMD 0x4089
228 /* cl_ext_device_fission */
229 #define cl_ext_device_fission 1
231 typedef cl_ulong cl_device_partition_property_ext;
233 #define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050
234 #define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051
235 #define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052
236 #define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052 /* cl_intel_device_partition_by_names */
237 #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053
239 #define CL_DEVICE_PARENT_DEVICE_EXT 0x4054
240 #define CL_DEVICE_PARTITION_TYPES_EXT 0x4055
241 #define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056
242 #define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057
243 #define CL_DEVICE_PARTITION_STYLE_EXT 0x4058
245 #define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1
246 #define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2
247 #define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3
248 #define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4
249 #define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10
250 #define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100
252 /* cl_intel_advanced_motion_estimation */
253 #define CL_DEVICE_ME_VERSION_INTEL 0x407E
255 /* cl_intel_device_side_avc_motion_estimation */
256 #define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B
257 #define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C
258 #define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D
260 /* cl_intel_planar_yuv */
261 #define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E
262 #define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F
264 /* cl_qcom_ext_host_ptr */
265 #define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0
266 #define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1
268 /* cl_arm_shared_virtual_memory */
269 #define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6
272 #define CL_DEVICE_SPIR_VERSIONS 0x40E0
274 /* cl_altera_device_temperature */
275 #define CL_DEVICE_CORE_TEMPERATURE_ALTERA 0x40F3
277 /* cl_intel_simultaneous_sharing */
278 #define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104
279 #define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105
281 /* cl_intel_required_subgroup_size */
282 #define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108
284 /* clGeICDLoaderInfoOCLICD */
286 CL_ICDL_OCL_VERSION=1,