2 * MPC8560 ADS Device Tree Source
4 * Copyright 2006, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
16 compatible = "MPC8560ADS", "MPC85xxADS";
37 d-cache-line-size = <32>; // 32 bytes
38 i-cache-line-size = <32>; // 32 bytes
39 d-cache-size = <0x8000>; // L1, 32K
40 i-cache-size = <0x8000>; // L1, 32K
41 timebase-frequency = <82500000>;
42 bus-frequency = <330000000>;
43 clock-frequency = <825000000>;
48 device_type = "memory";
49 reg = <0x0 0x10000000>;
56 compatible = "simple-bus";
57 ranges = <0x0 0xe0000000 0x100000>;
58 reg = <0xe0000000 0x200>;
59 bus-frequency = <330000000>;
61 memory-controller@2000 {
62 compatible = "fsl,8540-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
68 L2: l2-cache-controller@20000 {
69 compatible = "fsl,8540-l2-cache-controller";
70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>; // 32 bytes
72 cache-size = <0x40000>; // L2, 256K
73 interrupt-parent = <&mpic>;
80 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
82 ranges = <0x0 0x21100 0x200>;
85 compatible = "fsl,mpc8560-dma-channel",
86 "fsl,eloplus-dma-channel";
89 interrupt-parent = <&mpic>;
93 compatible = "fsl,mpc8560-dma-channel",
94 "fsl,eloplus-dma-channel";
97 interrupt-parent = <&mpic>;
101 compatible = "fsl,mpc8560-dma-channel",
102 "fsl,eloplus-dma-channel";
105 interrupt-parent = <&mpic>;
109 compatible = "fsl,mpc8560-dma-channel",
110 "fsl,eloplus-dma-channel";
113 interrupt-parent = <&mpic>;
119 #address-cells = <1>;
121 compatible = "fsl,gianfar-mdio";
122 reg = <0x24520 0x20>;
124 phy0: ethernet-phy@0 {
125 interrupt-parent = <&mpic>;
128 device_type = "ethernet-phy";
130 phy1: ethernet-phy@1 {
131 interrupt-parent = <&mpic>;
134 device_type = "ethernet-phy";
136 phy2: ethernet-phy@2 {
137 interrupt-parent = <&mpic>;
140 device_type = "ethernet-phy";
142 phy3: ethernet-phy@3 {
143 interrupt-parent = <&mpic>;
146 device_type = "ethernet-phy";
150 device_type = "tbi-phy";
155 #address-cells = <1>;
157 compatible = "fsl,gianfar-tbi";
158 reg = <0x25520 0x20>;
162 device_type = "tbi-phy";
166 enet0: ethernet@24000 {
168 device_type = "network";
170 compatible = "gianfar";
171 reg = <0x24000 0x1000>;
172 local-mac-address = [ 00 00 00 00 00 00 ];
173 interrupts = <29 2 30 2 34 2>;
174 interrupt-parent = <&mpic>;
175 tbi-handle = <&tbi0>;
176 phy-handle = <&phy0>;
179 enet1: ethernet@25000 {
181 device_type = "network";
183 compatible = "gianfar";
184 reg = <0x25000 0x1000>;
185 local-mac-address = [ 00 00 00 00 00 00 ];
186 interrupts = <35 2 36 2 40 2>;
187 interrupt-parent = <&mpic>;
188 tbi-handle = <&tbi1>;
189 phy-handle = <&phy1>;
193 interrupt-controller;
194 #address-cells = <0>;
195 #interrupt-cells = <2>;
196 reg = <0x40000 0x40000>;
197 compatible = "chrp,open-pic";
198 device_type = "open-pic";
202 #address-cells = <1>;
204 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
205 reg = <0x919c0 0x30>;
209 #address-cells = <1>;
211 ranges = <0x0 0x80000 0x10000>;
214 compatible = "fsl,cpm-muram-data";
215 reg = <0x0 0x4000 0x9000 0x2000>;
220 compatible = "fsl,mpc8560-brg",
223 reg = <0x919f0 0x10 0x915f0 0x10>;
224 clock-frequency = <165000000>;
228 interrupt-controller;
229 #address-cells = <0>;
230 #interrupt-cells = <2>;
232 interrupt-parent = <&mpic>;
233 reg = <0x90c00 0x80>;
234 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
237 serial0: serial@91a00 {
238 device_type = "serial";
239 compatible = "fsl,mpc8560-scc-uart",
241 reg = <0x91a00 0x20 0x88000 0x100>;
243 fsl,cpm-command = <0x800000>;
244 current-speed = <115200>;
246 interrupt-parent = <&cpmpic>;
249 serial1: serial@91a20 {
250 device_type = "serial";
251 compatible = "fsl,mpc8560-scc-uart",
253 reg = <0x91a20 0x20 0x88100 0x100>;
255 fsl,cpm-command = <0x4a00000>;
256 current-speed = <115200>;
258 interrupt-parent = <&cpmpic>;
261 enet2: ethernet@91320 {
262 device_type = "network";
263 compatible = "fsl,mpc8560-fcc-enet",
265 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
266 local-mac-address = [ 00 00 00 00 00 00 ];
267 fsl,cpm-command = <0x16200300>;
269 interrupt-parent = <&cpmpic>;
270 phy-handle = <&phy2>;
273 enet3: ethernet@91340 {
274 device_type = "network";
275 compatible = "fsl,mpc8560-fcc-enet",
277 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
278 local-mac-address = [ 00 00 00 00 00 00 ];
279 fsl,cpm-command = <0x1a400300>;
281 interrupt-parent = <&cpmpic>;
282 phy-handle = <&phy3>;
289 #interrupt-cells = <1>;
291 #address-cells = <3>;
292 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
294 reg = <0xe0008000 0x1000>;
295 clock-frequency = <66666666>;
296 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
300 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
301 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
302 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
303 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
306 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
307 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
308 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
309 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
312 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
313 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
314 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
315 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
318 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
319 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
320 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
321 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
324 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
325 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
326 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
327 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
330 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
331 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
332 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
333 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
336 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
337 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
338 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
339 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
342 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
343 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
344 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
345 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
348 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
349 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
350 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
351 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
354 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
355 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
356 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
357 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
360 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
361 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
362 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
363 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
366 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
367 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
368 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
369 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
371 interrupt-parent = <&mpic>;
374 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
375 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;