2 * MPC832x RDB Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
13 model = "MPC8323ERDB";
14 compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB";
25 d-cache-line-size = <20>; // 32 bytes
26 i-cache-line-size = <20>; // 32 bytes
27 d-cache-size = <4000>; // L1, 16K
28 i-cache-size = <4000>; // L1, 16K
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
37 device_type = "memory";
38 reg = <00000000 04000000>;
44 #interrupt-cells = <2>;
46 ranges = <0 e0000000 00100000>;
47 reg = <e0000000 00000200>;
51 device_type = "watchdog";
52 compatible = "mpc83xx_wdt";
58 compatible = "fsl-i2c";
61 interrupt-parent = <&pic>;
66 device_type = "serial";
67 compatible = "ns16550";
69 clock-frequency = <0>;
71 interrupt-parent = <&pic>;
75 device_type = "serial";
76 compatible = "ns16550";
78 clock-frequency = <0>;
80 interrupt-parent = <&pic>;
84 device_type = "crypto";
86 compatible = "talitos";
89 interrupt-parent = <&pic>;
92 channel-fifo-len = <18>;
93 exec-units-mask = <0000004c>;
94 descriptor-types-mask = <0122003f>;
98 interrupt-map-mask = <f800 0 0 7>;
100 /* IDSEL 0x10 AD16 (USB) */
103 /* IDSEL 0x11 AD17 (Mini1)*/
109 /* IDSEL 0x12 AD18 (PCI/Mini2) */
113 9000 0 0 4 &pic 11 8>;
115 interrupt-parent = <&pic>;
118 ranges = <42000000 0 80000000 80000000 0 10000000
119 02000000 0 90000000 90000000 0 10000000
120 01000000 0 d0000000 d0000000 0 04000000>;
121 clock-frequency = <0>;
122 #interrupt-cells = <1>;
124 #address-cells = <3>;
131 interrupt-controller;
132 #address-cells = <0>;
133 #interrupt-cells = <2>;
136 device_type = "ipic";
141 device_type = "par_io";
146 /* port pin dir open_drain assignment has_irq */
147 3 4 3 0 2 0 /* MDIO */
148 3 5 1 0 2 0 /* MDC */
149 3 15 2 0 1 0 /* RX_CLK (CLK16) */
150 3 17 2 0 1 0 /* TX_CLK (CLK3) */
151 0 12 1 0 1 0 /* TxD0 */
152 0 13 1 0 1 0 /* TxD1 */
153 0 14 1 0 1 0 /* TxD2 */
154 0 15 1 0 1 0 /* TxD3 */
155 0 16 2 0 1 0 /* RxD0 */
156 0 17 2 0 1 0 /* RxD1 */
157 0 18 2 0 1 0 /* RxD2 */
158 0 19 2 0 1 0 /* RxD3 */
159 0 1a 2 0 1 0 /* RX_ER */
160 0 1b 1 0 1 0 /* TX_ER */
161 0 1c 2 0 1 0 /* RX_DV */
162 0 1d 2 0 1 0 /* COL */
163 0 1e 1 0 1 0 /* TX_EN */
164 0 1f 2 0 1 0>; /* CRS */
168 /* port pin dir open_drain assignment has_irq */
169 0 d 2 0 1 0 /* RX_CLK (CLK9) */
170 3 18 2 0 1 0 /* TX_CLK (CLK10) */
171 1 0 1 0 1 0 /* TxD0 */
172 1 1 1 0 1 0 /* TxD1 */
173 1 2 1 0 1 0 /* TxD2 */
174 1 3 1 0 1 0 /* TxD3 */
175 1 4 2 0 1 0 /* RxD0 */
176 1 5 2 0 1 0 /* RxD1 */
177 1 6 2 0 1 0 /* RxD2 */
178 1 7 2 0 1 0 /* RxD3 */
179 1 8 2 0 1 0 /* RX_ER */
180 1 9 1 0 1 0 /* TX_ER */
181 1 a 2 0 1 0 /* RX_DV */
182 1 b 2 0 1 0 /* COL */
183 1 c 1 0 1 0 /* TX_EN */
184 1 d 2 0 1 0>; /* CRS */
190 #address-cells = <1>;
194 ranges = <0 e0100000 00100000>;
195 reg = <e0100000 480>;
197 bus-frequency = <BCD3D80>;
200 device_type = "muram";
201 ranges = <0 00010000 00004000>;
210 compatible = "fsl_spi";
213 interrupt-parent = <&qeic>;
219 compatible = "fsl_spi";
222 interrupt-parent = <&qeic>;
227 device_type = "network";
228 compatible = "ucc_geth";
233 interrupt-parent = <&qeic>;
235 * mac-address is deprecated and will be removed
236 * in 2.6.25. Only recent versions of
237 * U-Boot support local-mac-address, however.
239 mac-address = [ 00 00 00 00 00 00 ];
240 local-mac-address = [ 00 00 00 00 00 00 ];
243 phy-handle = <&phy00>;
244 pio-handle = <&ucc2pio>;
248 device_type = "network";
249 compatible = "ucc_geth";
254 interrupt-parent = <&qeic>;
256 * mac-address is deprecated and will be removed
257 * in 2.6.25. Only recent versions of
258 * U-Boot support local-mac-address, however.
260 mac-address = [ 00 00 00 00 00 00 ];
261 local-mac-address = [ 00 00 00 00 00 00 ];
264 phy-handle = <&phy04>;
265 pio-handle = <&ucc3pio>;
269 #address-cells = <1>;
272 device_type = "mdio";
273 compatible = "ucc_geth_phy";
275 phy00:ethernet-phy@00 {
276 interrupt-parent = <&pic>;
279 device_type = "ethernet-phy";
281 phy04:ethernet-phy@04 {
282 interrupt-parent = <&pic>;
285 device_type = "ethernet-phy";
290 interrupt-controller;
291 device_type = "qeic";
292 #address-cells = <0>;
293 #interrupt-cells = <1>;
297 interrupts = <20 8 21 8>; //high:32 low:33
298 interrupt-parent = <&pic>;