2 * MPC8560 ADS Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "MPC8560ADS", "MPC85xxADS";
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <04ead9a0>;
31 bus-frequency = <13ab6680>;
32 clock-frequency = <312c8040>;
38 device_type = "memory";
39 reg = <00000000 10000000>;
45 #interrupt-cells = <2>;
47 ranges = <0 e0000000 00100000>;
48 reg = <e0000000 00000200>;
49 bus-frequency = <13ab6680>;
51 memory-controller@2000 {
52 compatible = "fsl,8540-memory-controller";
54 interrupt-parent = <&mpic>;
58 l2-cache-controller@20000 {
59 compatible = "fsl,8540-l2-cache-controller";
61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>;
69 compatible = "gianfar";
73 phy0: ethernet-phy@0 {
74 interrupt-parent = <&mpic>;
77 device_type = "ethernet-phy";
79 phy1: ethernet-phy@1 {
80 interrupt-parent = <&mpic>;
83 device_type = "ethernet-phy";
85 phy2: ethernet-phy@2 {
86 interrupt-parent = <&mpic>;
89 device_type = "ethernet-phy";
91 phy3: ethernet-phy@3 {
92 interrupt-parent = <&mpic>;
95 device_type = "ethernet-phy";
100 device_type = "network";
102 compatible = "gianfar";
104 address = [ 00 00 0C 00 00 FD ];
105 interrupts = <d 2 e 2 12 2>;
106 interrupt-parent = <&mpic>;
107 phy-handle = <&phy0>;
111 #address-cells = <1>;
113 device_type = "network";
115 compatible = "gianfar";
117 address = [ 00 00 0C 00 01 FD ];
118 interrupts = <13 2 14 2 18 2>;
119 interrupt-parent = <&mpic>;
120 phy-handle = <&phy1>;
124 #interrupt-cells = <1>;
126 #address-cells = <3>;
130 clock-frequency = <3f940aa>;
131 interrupt-map-mask = <f800 0 0 7>;
135 1000 0 0 1 &mpic 31 1
136 1000 0 0 2 &mpic 32 1
137 1000 0 0 3 &mpic 33 1
138 1000 0 0 4 &mpic 34 1
141 1800 0 0 1 &mpic 34 1
142 1800 0 0 2 &mpic 31 1
143 1800 0 0 3 &mpic 32 1
144 1800 0 0 4 &mpic 33 1
147 2000 0 0 1 &mpic 33 1
148 2000 0 0 2 &mpic 34 1
149 2000 0 0 3 &mpic 31 1
150 2000 0 0 4 &mpic 32 1
153 2800 0 0 1 &mpic 32 1
154 2800 0 0 2 &mpic 33 1
155 2800 0 0 3 &mpic 34 1
156 2800 0 0 4 &mpic 31 1
159 6000 0 0 1 &mpic 31 1
160 6000 0 0 2 &mpic 32 1
161 6000 0 0 3 &mpic 33 1
162 6000 0 0 4 &mpic 34 1
165 6800 0 0 1 &mpic 34 1
166 6800 0 0 2 &mpic 31 1
167 6800 0 0 3 &mpic 32 1
168 6800 0 0 4 &mpic 33 1
171 7000 0 0 1 &mpic 33 1
172 7000 0 0 2 &mpic 34 1
173 7000 0 0 3 &mpic 31 1
174 7000 0 0 4 &mpic 32 1
177 7800 0 0 1 &mpic 32 1
178 7800 0 0 2 &mpic 33 1
179 7800 0 0 3 &mpic 34 1
180 7800 0 0 4 &mpic 31 1
183 9000 0 0 1 &mpic 31 1
184 9000 0 0 2 &mpic 32 1
185 9000 0 0 3 &mpic 33 1
186 9000 0 0 4 &mpic 34 1
189 9800 0 0 1 &mpic 34 1
190 9800 0 0 2 &mpic 31 1
191 9800 0 0 3 &mpic 32 1
192 9800 0 0 4 &mpic 33 1
195 a000 0 0 1 &mpic 33 1
196 a000 0 0 2 &mpic 34 1
197 a000 0 0 3 &mpic 31 1
198 a000 0 0 4 &mpic 32 1
201 a800 0 0 1 &mpic 32 1
202 a800 0 0 2 &mpic 33 1
203 a800 0 0 3 &mpic 34 1
204 a800 0 0 4 &mpic 31 1>;
206 interrupt-parent = <&mpic>;
209 ranges = <02000000 0 80000000 80000000 0 20000000
210 01000000 0 00000000 e2000000 0 01000000>;
214 interrupt-controller;
215 #address-cells = <0>;
216 #interrupt-cells = <2>;
219 device_type = "open-pic";
223 #address-cells = <1>;
225 #interrupt-cells = <2>;
228 ranges = <0 0 c0000>;
230 command-proc = <919c0>;
231 brg-frequency = <9d5b340>;
234 interrupt-controller;
235 #address-cells = <0>;
236 #interrupt-cells = <2>;
238 interrupt-parent = <&mpic>;
241 device_type = "cpm-pic";
245 device_type = "serial";
246 compatible = "cpm_uart";
249 reg = <91a00 20 88000 100>;
250 clock-setup = <00ffffff 0>;
253 current-speed = <1c200>;
255 interrupt-parent = <&cpmpic>;
259 device_type = "serial";
260 compatible = "cpm_uart";
263 reg = <91a20 20 88100 100>;
264 clock-setup = <ff00ffff 90000>;
267 current-speed = <1c200>;
269 interrupt-parent = <&cpmpic>;
273 device_type = "network";
274 compatible = "fs_enet";
277 reg = <91320 20 88500 100 913a0 30>;
278 mac-address = [ 00 00 0C 00 02 FD ];
279 clock-setup = <ff00ffff 250000>;
283 interrupt-parent = <&cpmpic>;
284 phy-handle = <&phy2>;
288 device_type = "network";
289 compatible = "fs_enet";
292 reg = <91340 20 88600 100 913d0 30>;
293 mac-address = [ 00 00 0C 00 03 FD ];
294 clock-setup = <ffff00ff 3700>;
298 interrupt-parent = <&cpmpic>;
299 phy-handle = <&phy3>;