2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
22 #include <linux/interrupt.h>
23 #include <linux/time.h>
24 #include <linux/sysdev.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/smp.h>
28 #include <linux/types.h>
29 #include <linux/profile.h>
30 #include <linux/timex.h>
31 #include <linux/notifier.h>
32 #include <linux/clocksource.h>
33 #include <linux/clockchips.h>
34 #include <linux/bootmem.h>
35 #include <asm/uaccess.h>
36 #include <asm/delay.h>
37 #include <asm/s390_ext.h>
38 #include <asm/div64.h>
40 #include <asm/irq_regs.h>
41 #include <asm/timer.h>
45 /* change this if you have some constant time drift */
46 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
47 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
49 /* The value of the TOD clock for 1.1.1970. */
50 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
53 * Create a small time difference between the timer interrupts
54 * on the different cpus to avoid lock contention.
56 #define CPU_DEVIATION (smp_processor_id() << 12)
58 #define TICK_SIZE tick
60 static ext_int_info_t ext_int_info_cc;
61 static ext_int_info_t ext_int_etr_cc;
62 static u64 sched_clock_base_cc;
64 static DEFINE_PER_CPU(struct clock_event_device, comparators);
67 * Scheduler clock - returns current time in nanosec units.
69 unsigned long long sched_clock(void)
71 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
75 * Monotonic_clock - returns # of nanoseconds passed since time_init()
77 unsigned long long monotonic_clock(void)
81 EXPORT_SYMBOL(monotonic_clock);
83 void tod_to_timeval(__u64 todval, struct timespec *xtime)
85 unsigned long long sec;
90 todval -= (sec * 1000000) << 12;
91 xtime->tv_nsec = ((todval * 1000) >> 12);
94 #ifdef CONFIG_PROFILING
95 #define s390_do_profile() profile_tick(CPU_PROFILING)
97 #define s390_do_profile() do { ; } while(0)
98 #endif /* CONFIG_PROFILING */
100 void clock_comparator_work(void)
102 struct clock_event_device *cd;
104 S390_lowcore.clock_comparator = -1ULL;
105 set_clock_comparator(S390_lowcore.clock_comparator);
106 cd = &__get_cpu_var(comparators);
107 cd->event_handler(cd);
112 * Fixup the clock comparator.
114 static void fixup_clock_comparator(unsigned long long delta)
116 /* If nobody is waiting there's nothing to fix. */
117 if (S390_lowcore.clock_comparator == -1ULL)
119 S390_lowcore.clock_comparator += delta;
120 set_clock_comparator(S390_lowcore.clock_comparator);
123 static int s390_next_event(unsigned long delta,
124 struct clock_event_device *evt)
126 S390_lowcore.clock_comparator = get_clock() + delta;
127 set_clock_comparator(S390_lowcore.clock_comparator);
131 static void s390_set_mode(enum clock_event_mode mode,
132 struct clock_event_device *evt)
137 * Set up lowcore and control register of the current cpu to
138 * enable TOD clock and clock comparator interrupts.
140 void init_cpu_timer(void)
142 struct clock_event_device *cd;
145 S390_lowcore.clock_comparator = -1ULL;
146 set_clock_comparator(S390_lowcore.clock_comparator);
148 cpu = smp_processor_id();
149 cd = &per_cpu(comparators, cpu);
150 cd->name = "comparator";
151 cd->features = CLOCK_EVT_FEAT_ONESHOT;
154 cd->min_delta_ns = 1;
155 cd->max_delta_ns = LONG_MAX;
157 cd->cpumask = cpumask_of_cpu(cpu);
158 cd->set_next_event = s390_next_event;
159 cd->set_mode = s390_set_mode;
161 clockevents_register_device(cd);
163 /* Enable clock comparator timer interrupt. */
166 /* Always allow the timing alert external interrupt. */
170 static void clock_comparator_interrupt(__u16 code)
172 if (S390_lowcore.clock_comparator == -1ULL)
173 set_clock_comparator(S390_lowcore.clock_comparator);
176 static void etr_timing_alert(struct etr_irq_parm *);
177 static void stp_timing_alert(struct stp_irq_parm *);
179 static void timing_alert_interrupt(__u16 code)
181 if (S390_lowcore.ext_params & 0x00c40000)
182 etr_timing_alert((struct etr_irq_parm *)
183 &S390_lowcore.ext_params);
184 if (S390_lowcore.ext_params & 0x00038000)
185 stp_timing_alert((struct stp_irq_parm *)
186 &S390_lowcore.ext_params);
189 static void etr_reset(void);
190 static void stp_reset(void);
193 * Get the TOD clock running.
195 static u64 __init reset_tod_clock(void)
201 if (store_clock(&time) == 0)
203 /* TOD clock not running. Set the clock to Unix Epoch. */
204 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
205 panic("TOD clock not operational.");
207 return TOD_UNIX_EPOCH;
210 static cycle_t read_tod_clock(void)
215 static struct clocksource clocksource_tod = {
218 .read = read_tod_clock,
222 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
227 * Initialize the TOD clock and the CPU timer of
230 void __init time_init(void)
232 sched_clock_base_cc = reset_tod_clock();
235 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime);
236 set_normalized_timespec(&wall_to_monotonic,
237 -xtime.tv_sec, -xtime.tv_nsec);
239 /* request the clock comparator external interrupt */
240 if (register_early_external_interrupt(0x1004,
241 clock_comparator_interrupt,
242 &ext_int_info_cc) != 0)
243 panic("Couldn't request external interrupt 0x1004");
245 if (clocksource_register(&clocksource_tod) != 0)
246 panic("Could not register TOD clock source");
248 /* request the timing alert external interrupt */
249 if (register_early_external_interrupt(0x1406,
250 timing_alert_interrupt,
251 &ext_int_etr_cc) != 0)
252 panic("Couldn't request external interrupt 0x1406");
254 /* Enable TOD clock interrupts on the boot cpu. */
257 #ifdef CONFIG_VIRT_TIMER
263 * The time is "clock". old is what we think the time is.
264 * Adjust the value by a multiple of jiffies and add the delta to ntp.
265 * "delay" is an approximation how long the synchronization took. If
266 * the time correction is positive, then "delay" is subtracted from
267 * the time difference and only the remaining part is passed to ntp.
269 static unsigned long long adjust_time(unsigned long long old,
270 unsigned long long clock,
271 unsigned long long delay)
273 unsigned long long delta, ticks;
277 /* It is later than we thought. */
278 delta = ticks = clock - old;
279 delta = ticks = (delta < delay) ? 0 : delta - delay;
280 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
281 adjust.offset = ticks * (1000000 / HZ);
283 /* It is earlier than we thought. */
284 delta = ticks = old - clock;
285 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
287 adjust.offset = -ticks * (1000000 / HZ);
289 sched_clock_base_cc += delta;
290 if (adjust.offset != 0) {
291 printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
293 adjust.modes = ADJ_OFFSET_SINGLESHOT;
294 do_adjtimex(&adjust);
299 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
300 static unsigned long clock_sync_flags;
302 #define CLOCK_SYNC_HAS_ETR 0
303 #define CLOCK_SYNC_HAS_STP 1
304 #define CLOCK_SYNC_ETR 2
305 #define CLOCK_SYNC_STP 3
308 * The synchronous get_clock function. It will write the current clock
309 * value to the clock pointer and return 0 if the clock is in sync with
310 * the external time source. If the clock mode is local it will return
311 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
314 int get_sync_clock(unsigned long long *clock)
317 unsigned int sw0, sw1;
319 sw_ptr = &get_cpu_var(clock_sync_word);
320 sw0 = atomic_read(sw_ptr);
321 *clock = get_clock();
322 sw1 = atomic_read(sw_ptr);
323 put_cpu_var(clock_sync_sync);
324 if (sw0 == sw1 && (sw0 & 0x80000000U))
325 /* Success: time is in sync. */
327 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
328 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
330 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
331 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
335 EXPORT_SYMBOL(get_sync_clock);
338 * Make get_sync_clock return -EAGAIN.
340 static void disable_sync_clock(void *dummy)
342 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
344 * Clear the in-sync bit 2^31. All get_sync_clock calls will
345 * fail until the sync bit is turned back on. In addition
346 * increase the "sequence" counter to avoid the race of an
347 * etr event and the complete recovery against get_sync_clock.
349 atomic_clear_mask(0x80000000, sw_ptr);
354 * Make get_sync_clock return 0 again.
355 * Needs to be called from a context disabled for preemption.
357 static void enable_sync_clock(void)
359 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
360 atomic_set_mask(0x80000000, sw_ptr);
364 * External Time Reference (ETR) code.
366 static int etr_port0_online;
367 static int etr_port1_online;
368 static int etr_steai_available;
370 static int __init early_parse_etr(char *p)
372 if (strncmp(p, "off", 3) == 0)
373 etr_port0_online = etr_port1_online = 0;
374 else if (strncmp(p, "port0", 5) == 0)
375 etr_port0_online = 1;
376 else if (strncmp(p, "port1", 5) == 0)
377 etr_port1_online = 1;
378 else if (strncmp(p, "on", 2) == 0)
379 etr_port0_online = etr_port1_online = 1;
382 early_param("etr", early_parse_etr);
385 ETR_EVENT_PORT0_CHANGE,
386 ETR_EVENT_PORT1_CHANGE,
387 ETR_EVENT_PORT_ALERT,
388 ETR_EVENT_SYNC_CHECK,
389 ETR_EVENT_SWITCH_LOCAL,
394 * Valid bit combinations of the eacr register are (x = don't care):
395 * e0 e1 dp p0 p1 ea es sl
396 * 0 0 x 0 0 0 0 0 initial, disabled state
397 * 0 0 x 0 1 1 0 0 port 1 online
398 * 0 0 x 1 0 1 0 0 port 0 online
399 * 0 0 x 1 1 1 0 0 both ports online
400 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
401 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
402 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
403 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
404 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
405 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
406 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
407 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
408 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
409 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
410 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
411 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
412 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
413 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
414 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
415 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
417 static struct etr_eacr etr_eacr;
418 static u64 etr_tolec; /* time of last eacr update */
419 static struct etr_aib etr_port0;
420 static int etr_port0_uptodate;
421 static struct etr_aib etr_port1;
422 static int etr_port1_uptodate;
423 static unsigned long etr_events;
424 static struct timer_list etr_timer;
426 static void etr_timeout(unsigned long dummy);
427 static void etr_work_fn(struct work_struct *work);
428 static DECLARE_WORK(etr_work, etr_work_fn);
431 * Reset ETR attachment.
433 static void etr_reset(void)
435 etr_eacr = (struct etr_eacr) {
436 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
437 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
439 if (etr_setr(&etr_eacr) == 0) {
440 etr_tolec = get_clock();
441 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
442 } else if (etr_port0_online || etr_port1_online) {
443 printk(KERN_WARNING "Running on non ETR capable "
444 "machine, only local mode available.\n");
445 etr_port0_online = etr_port1_online = 0;
449 static int __init etr_init(void)
453 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
455 /* Check if this machine has the steai instruction. */
456 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
457 etr_steai_available = 1;
458 setup_timer(&etr_timer, etr_timeout, 0UL);
459 if (etr_port0_online) {
460 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
461 schedule_work(&etr_work);
463 if (etr_port1_online) {
464 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
465 schedule_work(&etr_work);
470 arch_initcall(etr_init);
473 * Two sorts of ETR machine checks. The architecture reads:
474 * "When a machine-check niterruption occurs and if a switch-to-local or
475 * ETR-sync-check interrupt request is pending but disabled, this pending
476 * disabled interruption request is indicated and is cleared".
477 * Which means that we can get etr_switch_to_local events from the machine
478 * check handler although the interruption condition is disabled. Lovely..
482 * Switch to local machine check. This is called when the last usable
483 * ETR port goes inactive. After switch to local the clock is not in sync.
485 void etr_switch_to_local(void)
489 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
490 disable_sync_clock(NULL);
491 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
492 schedule_work(&etr_work);
496 * ETR sync check machine check. This is called when the ETR OTE and the
497 * local clock OTE are farther apart than the ETR sync check tolerance.
498 * After a ETR sync check the clock is not in sync. The machine check
499 * is broadcasted to all cpus at the same time.
501 void etr_sync_check(void)
505 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
506 disable_sync_clock(NULL);
507 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
508 schedule_work(&etr_work);
512 * ETR timing alert. There are two causes:
513 * 1) port state change, check the usability of the port
514 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
515 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
516 * or ETR-data word 4 (edf4) has changed.
518 static void etr_timing_alert(struct etr_irq_parm *intparm)
521 /* ETR port 0 state change. */
522 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
524 /* ETR port 1 state change. */
525 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
528 * ETR port alert on either port 0, 1 or both.
529 * Both ports are not up-to-date now.
531 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
532 schedule_work(&etr_work);
535 static void etr_timeout(unsigned long dummy)
537 set_bit(ETR_EVENT_UPDATE, &etr_events);
538 schedule_work(&etr_work);
542 * Check if the etr mode is pss.
544 static inline int etr_mode_is_pps(struct etr_eacr eacr)
546 return eacr.es && !eacr.sl;
550 * Check if the etr mode is etr.
552 static inline int etr_mode_is_etr(struct etr_eacr eacr)
554 return eacr.es && eacr.sl;
558 * Check if the port can be used for TOD synchronization.
559 * For PPS mode the port has to receive OTEs. For ETR mode
560 * the port has to receive OTEs, the ETR stepping bit has to
561 * be zero and the validity bits for data frame 1, 2, and 3
564 static int etr_port_valid(struct etr_aib *aib, int port)
568 /* Check that this port is receiving OTEs. */
572 psc = port ? aib->esw.psc1 : aib->esw.psc0;
573 if (psc == etr_lpsc_pps_mode)
575 if (psc == etr_lpsc_operational_step)
576 return !aib->esw.y && aib->slsw.v1 &&
577 aib->slsw.v2 && aib->slsw.v3;
582 * Check if two ports are on the same network.
584 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
586 // FIXME: any other fields we have to compare?
587 return aib1->edf1.net_id == aib2->edf1.net_id;
591 * Wrapper for etr_stei that converts physical port states
592 * to logical port states to be consistent with the output
593 * of stetr (see etr_psc vs. etr_lpsc).
595 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
597 BUG_ON(etr_steai(aib, func) != 0);
598 /* Convert port state to logical port state. */
599 if (aib->esw.psc0 == 1)
601 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
603 if (aib->esw.psc1 == 1)
605 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
610 * Check if the aib a2 is still connected to the same attachment as
611 * aib a1, the etv values differ by one and a2 is valid.
613 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
615 int state_a1, state_a2;
617 /* Paranoia check: e0/e1 should better be the same. */
618 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
619 a1->esw.eacr.e1 != a2->esw.eacr.e1)
622 /* Still connected to the same etr ? */
623 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
624 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
625 if (state_a1 == etr_lpsc_operational_step) {
626 if (state_a2 != etr_lpsc_operational_step ||
627 a1->edf1.net_id != a2->edf1.net_id ||
628 a1->edf1.etr_id != a2->edf1.etr_id ||
629 a1->edf1.etr_pn != a2->edf1.etr_pn)
631 } else if (state_a2 != etr_lpsc_pps_mode)
634 /* The ETV value of a2 needs to be ETV of a1 + 1. */
635 if (a1->edf2.etv + 1 != a2->edf2.etv)
638 if (!etr_port_valid(a2, p))
644 struct clock_sync_data {
646 unsigned long long fixup_cc;
649 static void clock_sync_cpu_start(void *dummy)
651 struct clock_sync_data *sync = dummy;
655 * This looks like a busy wait loop but it isn't. etr_sync_cpus
656 * is called on all other cpus while the TOD clocks is stopped.
657 * __udelay will stop the cpu on an enabled wait psw until the
658 * TOD is running again.
660 while (sync->in_sync == 0) {
663 * A different cpu changes *in_sync. Therefore use
664 * barrier() to force memory access.
668 if (sync->in_sync != 1)
669 /* Didn't work. Clear per-cpu in sync bit again. */
670 disable_sync_clock(NULL);
672 * This round of TOD syncing is done. Set the clock comparator
673 * to the next tick and let the processor continue.
675 fixup_clock_comparator(sync->fixup_cc);
678 static void clock_sync_cpu_end(void *dummy)
683 * Sync the TOD clock using the port refered to by aibp. This port
684 * has to be enabled and the other port has to be disabled. The
685 * last eacr update has to be more than 1.6 seconds in the past.
687 static int etr_sync_clock(struct etr_aib *aib, int port)
689 struct etr_aib *sync_port;
690 struct clock_sync_data etr_sync;
691 unsigned long long clock, old_clock, delay, delta;
695 /* Check if the current aib is adjacent to the sync port aib. */
696 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
697 follows = etr_aib_follows(sync_port, aib, port);
698 memcpy(sync_port, aib, sizeof(*aib));
703 * Catch all other cpus and make them wait until we have
704 * successfully synced the clock. smp_call_function will
705 * return after all other cpus are in etr_sync_cpu_start.
707 memset(&etr_sync, 0, sizeof(etr_sync));
709 smp_call_function(clock_sync_cpu_start, &etr_sync, 0);
713 /* Set clock to next OTE. */
714 __ctl_set_bit(14, 21);
715 __ctl_set_bit(0, 29);
716 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
717 old_clock = get_clock();
718 if (set_clock(clock) == 0) {
719 __udelay(1); /* Wait for the clock to start. */
720 __ctl_clear_bit(0, 29);
721 __ctl_clear_bit(14, 21);
723 /* Adjust Linux timing variables. */
724 delay = (unsigned long long)
725 (aib->edf2.etv - sync_port->edf2.etv) << 32;
726 delta = adjust_time(old_clock, clock, delay);
727 etr_sync.fixup_cc = delta;
728 fixup_clock_comparator(delta);
729 /* Verify that the clock is properly set. */
730 if (!etr_aib_follows(sync_port, aib, port)) {
732 disable_sync_clock(NULL);
733 etr_sync.in_sync = -EAGAIN;
736 etr_sync.in_sync = 1;
740 /* Could not set the clock ?!? */
741 __ctl_clear_bit(0, 29);
742 __ctl_clear_bit(14, 21);
743 disable_sync_clock(NULL);
744 etr_sync.in_sync = -EAGAIN;
748 smp_call_function(clock_sync_cpu_end, NULL, 0);
754 * Handle the immediate effects of the different events.
755 * The port change event is used for online/offline changes.
757 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
759 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
761 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
762 eacr.es = eacr.sl = 0;
763 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
764 etr_port0_uptodate = etr_port1_uptodate = 0;
766 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
769 * Port change of an enabled port. We have to
770 * assume that this can have caused an stepping
773 etr_tolec = get_clock();
774 eacr.p0 = etr_port0_online;
777 etr_port0_uptodate = 0;
779 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
782 * Port change of an enabled port. We have to
783 * assume that this can have caused an stepping
786 etr_tolec = get_clock();
787 eacr.p1 = etr_port1_online;
790 etr_port1_uptodate = 0;
792 clear_bit(ETR_EVENT_UPDATE, &etr_events);
797 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
798 * one of the ports needs an update.
800 static void etr_set_tolec_timeout(unsigned long long now)
802 unsigned long micros;
804 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
805 (!etr_eacr.p1 || etr_port1_uptodate))
807 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
808 micros = (micros > 1600000) ? 0 : 1600000 - micros;
809 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
813 * Set up a time that expires after 1/2 second.
815 static void etr_set_sync_timeout(void)
817 mod_timer(&etr_timer, jiffies + HZ/2);
821 * Update the aib information for one or both ports.
823 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
824 struct etr_eacr eacr)
826 /* With both ports disabled the aib information is useless. */
827 if (!eacr.e0 && !eacr.e1)
830 /* Update port0 or port1 with aib stored in etr_work_fn. */
831 if (aib->esw.q == 0) {
832 /* Information for port 0 stored. */
833 if (eacr.p0 && !etr_port0_uptodate) {
835 if (etr_port0_online)
836 etr_port0_uptodate = 1;
839 /* Information for port 1 stored. */
840 if (eacr.p1 && !etr_port1_uptodate) {
842 if (etr_port0_online)
843 etr_port1_uptodate = 1;
848 * Do not try to get the alternate port aib if the clock
849 * is not in sync yet.
851 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
855 * If steai is available we can get the information about
856 * the other port immediately. If only stetr is available the
857 * data-port bit toggle has to be used.
859 if (etr_steai_available) {
860 if (eacr.p0 && !etr_port0_uptodate) {
861 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
862 etr_port0_uptodate = 1;
864 if (eacr.p1 && !etr_port1_uptodate) {
865 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
866 etr_port1_uptodate = 1;
870 * One port was updated above, if the other
871 * port is not uptodate toggle dp bit.
873 if ((eacr.p0 && !etr_port0_uptodate) ||
874 (eacr.p1 && !etr_port1_uptodate))
883 * Write new etr control register if it differs from the current one.
884 * Return 1 if etr_tolec has been updated as well.
886 static void etr_update_eacr(struct etr_eacr eacr)
890 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
891 /* No change, return. */
894 * The disable of an active port of the change of the data port
895 * bit can/will cause a change in the data port.
897 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
898 (etr_eacr.dp ^ eacr.dp) != 0;
902 etr_tolec = get_clock();
906 * ETR tasklet. In this function you'll find the main logic. In
907 * particular this is the only function that calls etr_update_eacr(),
908 * it "controls" the etr control register.
910 static void etr_work_fn(struct work_struct *work)
912 unsigned long long now;
913 struct etr_eacr eacr;
917 /* Create working copy of etr_eacr. */
920 /* Check for the different events and their immediate effects. */
921 eacr = etr_handle_events(eacr);
923 /* Check if ETR is supposed to be active. */
924 eacr.ea = eacr.p0 || eacr.p1;
926 /* Both ports offline. Reset everything. */
927 eacr.dp = eacr.es = eacr.sl = 0;
928 on_each_cpu(disable_sync_clock, NULL, 1);
929 del_timer_sync(&etr_timer);
930 etr_update_eacr(eacr);
931 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
935 /* Store aib to get the current ETR status word. */
936 BUG_ON(etr_stetr(&aib) != 0);
937 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
941 * Update the port information if the last stepping port change
942 * or data port change is older than 1.6 seconds.
944 if (now >= etr_tolec + (1600000 << 12))
945 eacr = etr_handle_update(&aib, eacr);
948 * Select ports to enable. The prefered synchronization mode is PPS.
949 * If a port can be enabled depends on a number of things:
950 * 1) The port needs to be online and uptodate. A port is not
951 * disabled just because it is not uptodate, but it is only
952 * enabled if it is uptodate.
953 * 2) The port needs to have the same mode (pps / etr).
954 * 3) The port needs to be usable -> etr_port_valid() == 1
955 * 4) To enable the second port the clock needs to be in sync.
956 * 5) If both ports are useable and are ETR ports, the network id
957 * has to be the same.
958 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
960 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
963 if (!etr_mode_is_pps(etr_eacr))
965 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
967 // FIXME: uptodate checks ?
968 else if (etr_port0_uptodate && etr_port1_uptodate)
970 sync_port = (etr_port0_uptodate &&
971 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
972 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
976 if (!etr_mode_is_pps(etr_eacr))
978 sync_port = (etr_port1_uptodate &&
979 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
980 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
983 if (!etr_mode_is_etr(etr_eacr))
985 if (!eacr.es || !eacr.p1 ||
986 aib.esw.psc1 != etr_lpsc_operational_alt)
988 else if (etr_port0_uptodate && etr_port1_uptodate &&
989 etr_compare_network(&etr_port0, &etr_port1))
991 sync_port = (etr_port0_uptodate &&
992 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
993 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
997 if (!etr_mode_is_etr(etr_eacr))
999 sync_port = (etr_port1_uptodate &&
1000 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1002 /* Both ports not usable. */
1003 eacr.es = eacr.sl = 0;
1005 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1008 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1012 * If the clock is in sync just update the eacr and return.
1013 * If there is no valid sync port wait for a port update.
1015 if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
1016 eacr.es || sync_port < 0) {
1017 etr_update_eacr(eacr);
1018 etr_set_tolec_timeout(now);
1023 * Prepare control register for clock syncing
1024 * (reset data port bit, set sync check control.
1030 * Update eacr and try to synchronize the clock. If the update
1031 * of eacr caused a stepping port switch (or if we have to
1032 * assume that a stepping port switch has occured) or the
1033 * clock syncing failed, reset the sync check control bit
1034 * and set up a timer to try again after 0.5 seconds
1036 etr_update_eacr(eacr);
1037 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1038 if (now < etr_tolec + (1600000 << 12) ||
1039 etr_sync_clock(&aib, sync_port) != 0) {
1040 /* Sync failed. Try again in 1/2 second. */
1042 etr_update_eacr(eacr);
1043 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1044 etr_set_sync_timeout();
1046 etr_set_tolec_timeout(now);
1050 * Sysfs interface functions
1052 static struct sysdev_class etr_sysclass = {
1056 static struct sys_device etr_port0_dev = {
1058 .cls = &etr_sysclass,
1061 static struct sys_device etr_port1_dev = {
1063 .cls = &etr_sysclass,
1067 * ETR class attributes
1069 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1071 return sprintf(buf, "%i\n", etr_port0.esw.p);
1074 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1076 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1080 if (etr_mode_is_pps(etr_eacr))
1082 else if (etr_mode_is_etr(etr_eacr))
1086 return sprintf(buf, "%s\n", mode_str);
1089 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1092 * ETR port attributes
1094 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1096 if (dev == &etr_port0_dev)
1097 return etr_port0_online ? &etr_port0 : NULL;
1099 return etr_port1_online ? &etr_port1 : NULL;
1102 static ssize_t etr_online_show(struct sys_device *dev,
1103 struct sysdev_attribute *attr,
1106 unsigned int online;
1108 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1109 return sprintf(buf, "%i\n", online);
1112 static ssize_t etr_online_store(struct sys_device *dev,
1113 struct sysdev_attribute *attr,
1114 const char *buf, size_t count)
1118 value = simple_strtoul(buf, NULL, 0);
1119 if (value != 0 && value != 1)
1121 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1123 if (dev == &etr_port0_dev) {
1124 if (etr_port0_online == value)
1125 return count; /* Nothing to do. */
1126 etr_port0_online = value;
1127 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1128 schedule_work(&etr_work);
1130 if (etr_port1_online == value)
1131 return count; /* Nothing to do. */
1132 etr_port1_online = value;
1133 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1134 schedule_work(&etr_work);
1139 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1141 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1142 struct sysdev_attribute *attr,
1145 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1146 etr_eacr.e0 : etr_eacr.e1);
1149 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1151 static ssize_t etr_mode_code_show(struct sys_device *dev,
1152 struct sysdev_attribute *attr, char *buf)
1154 if (!etr_port0_online && !etr_port1_online)
1155 /* Status word is not uptodate if both ports are offline. */
1157 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1158 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1161 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1163 static ssize_t etr_untuned_show(struct sys_device *dev,
1164 struct sysdev_attribute *attr, char *buf)
1166 struct etr_aib *aib = etr_aib_from_dev(dev);
1168 if (!aib || !aib->slsw.v1)
1170 return sprintf(buf, "%i\n", aib->edf1.u);
1173 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1175 static ssize_t etr_network_id_show(struct sys_device *dev,
1176 struct sysdev_attribute *attr, char *buf)
1178 struct etr_aib *aib = etr_aib_from_dev(dev);
1180 if (!aib || !aib->slsw.v1)
1182 return sprintf(buf, "%i\n", aib->edf1.net_id);
1185 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1187 static ssize_t etr_id_show(struct sys_device *dev,
1188 struct sysdev_attribute *attr, char *buf)
1190 struct etr_aib *aib = etr_aib_from_dev(dev);
1192 if (!aib || !aib->slsw.v1)
1194 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1197 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1199 static ssize_t etr_port_number_show(struct sys_device *dev,
1200 struct sysdev_attribute *attr, char *buf)
1202 struct etr_aib *aib = etr_aib_from_dev(dev);
1204 if (!aib || !aib->slsw.v1)
1206 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1209 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1211 static ssize_t etr_coupled_show(struct sys_device *dev,
1212 struct sysdev_attribute *attr, char *buf)
1214 struct etr_aib *aib = etr_aib_from_dev(dev);
1216 if (!aib || !aib->slsw.v3)
1218 return sprintf(buf, "%i\n", aib->edf3.c);
1221 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1223 static ssize_t etr_local_time_show(struct sys_device *dev,
1224 struct sysdev_attribute *attr, char *buf)
1226 struct etr_aib *aib = etr_aib_from_dev(dev);
1228 if (!aib || !aib->slsw.v3)
1230 return sprintf(buf, "%i\n", aib->edf3.blto);
1233 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1235 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1236 struct sysdev_attribute *attr, char *buf)
1238 struct etr_aib *aib = etr_aib_from_dev(dev);
1240 if (!aib || !aib->slsw.v3)
1242 return sprintf(buf, "%i\n", aib->edf3.buo);
1245 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1247 static struct sysdev_attribute *etr_port_attributes[] = {
1249 &attr_stepping_control,
1261 static int __init etr_register_port(struct sys_device *dev)
1263 struct sysdev_attribute **attr;
1266 rc = sysdev_register(dev);
1269 for (attr = etr_port_attributes; *attr; attr++) {
1270 rc = sysdev_create_file(dev, *attr);
1276 for (; attr >= etr_port_attributes; attr--)
1277 sysdev_remove_file(dev, *attr);
1278 sysdev_unregister(dev);
1283 static void __init etr_unregister_port(struct sys_device *dev)
1285 struct sysdev_attribute **attr;
1287 for (attr = etr_port_attributes; *attr; attr++)
1288 sysdev_remove_file(dev, *attr);
1289 sysdev_unregister(dev);
1292 static int __init etr_init_sysfs(void)
1296 rc = sysdev_class_register(&etr_sysclass);
1299 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1301 goto out_unreg_class;
1302 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1304 goto out_remove_stepping_port;
1305 rc = etr_register_port(&etr_port0_dev);
1307 goto out_remove_stepping_mode;
1308 rc = etr_register_port(&etr_port1_dev);
1310 goto out_remove_port0;
1314 etr_unregister_port(&etr_port0_dev);
1315 out_remove_stepping_mode:
1316 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1317 out_remove_stepping_port:
1318 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1320 sysdev_class_unregister(&etr_sysclass);
1325 device_initcall(etr_init_sysfs);
1328 * Server Time Protocol (STP) code.
1330 static int stp_online;
1331 static struct stp_sstpi stp_info;
1332 static void *stp_page;
1334 static void stp_work_fn(struct work_struct *work);
1335 static DECLARE_WORK(stp_work, stp_work_fn);
1337 static int __init early_parse_stp(char *p)
1339 if (strncmp(p, "off", 3) == 0)
1341 else if (strncmp(p, "on", 2) == 0)
1345 early_param("stp", early_parse_stp);
1348 * Reset STP attachment.
1350 static void __init stp_reset(void)
1354 stp_page = alloc_bootmem_pages(PAGE_SIZE);
1355 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1357 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1358 else if (stp_online) {
1359 printk(KERN_WARNING "Running on non STP capable machine.\n");
1360 free_bootmem((unsigned long) stp_page, PAGE_SIZE);
1366 static int __init stp_init(void)
1368 if (test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags) && stp_online)
1369 schedule_work(&stp_work);
1373 arch_initcall(stp_init);
1376 * STP timing alert. There are three causes:
1377 * 1) timing status change
1378 * 2) link availability change
1379 * 3) time control parameter change
1380 * In all three cases we are only interested in the clock source state.
1381 * If a STP clock source is now available use it.
1383 static void stp_timing_alert(struct stp_irq_parm *intparm)
1385 if (intparm->tsc || intparm->lac || intparm->tcpc)
1386 schedule_work(&stp_work);
1390 * STP sync check machine check. This is called when the timing state
1391 * changes from the synchronized state to the unsynchronized state.
1392 * After a STP sync check the clock is not in sync. The machine check
1393 * is broadcasted to all cpus at the same time.
1395 void stp_sync_check(void)
1397 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1399 disable_sync_clock(NULL);
1400 schedule_work(&stp_work);
1404 * STP island condition machine check. This is called when an attached
1405 * server attempts to communicate over an STP link and the servers
1406 * have matching CTN ids and have a valid stratum-1 configuration
1407 * but the configurations do not match.
1409 void stp_island_check(void)
1411 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1413 disable_sync_clock(NULL);
1414 schedule_work(&stp_work);
1418 * STP tasklet. Check for the STP state and take over the clock
1419 * synchronization if the STP clock source is usable.
1421 static void stp_work_fn(struct work_struct *work)
1423 struct clock_sync_data stp_sync;
1424 unsigned long long old_clock, delta;
1428 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1432 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1436 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1437 if (rc || stp_info.c == 0)
1441 * Catch all other cpus and make them wait until we have
1442 * successfully synced the clock. smp_call_function will
1443 * return after all other cpus are in clock_sync_cpu_start.
1445 memset(&stp_sync, 0, sizeof(stp_sync));
1447 smp_call_function(clock_sync_cpu_start, &stp_sync, 0);
1448 local_irq_disable();
1449 enable_sync_clock();
1451 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1452 if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1453 schedule_work(&etr_work);
1456 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1457 stp_info.todoff[2] || stp_info.todoff[3] ||
1458 stp_info.tmd != 2) {
1459 old_clock = get_clock();
1460 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1462 delta = adjust_time(old_clock, get_clock(), 0);
1463 fixup_clock_comparator(delta);
1464 rc = chsc_sstpi(stp_page, &stp_info,
1465 sizeof(struct stp_sstpi));
1466 if (rc == 0 && stp_info.tmd != 2)
1471 disable_sync_clock(NULL);
1472 stp_sync.in_sync = -EAGAIN;
1473 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1474 if (etr_port0_online || etr_port1_online)
1475 schedule_work(&etr_work);
1477 stp_sync.in_sync = 1;
1480 smp_call_function(clock_sync_cpu_end, NULL, 0);
1485 * STP class sysfs interface functions
1487 static struct sysdev_class stp_sysclass = {
1491 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1495 return sprintf(buf, "%016llx\n",
1496 *(unsigned long long *) stp_info.ctnid);
1499 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1501 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1505 return sprintf(buf, "%i\n", stp_info.ctn);
1508 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1510 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1512 if (!stp_online || !(stp_info.vbits & 0x2000))
1514 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1517 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1519 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1521 if (!stp_online || !(stp_info.vbits & 0x8000))
1523 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1526 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1528 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1532 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1535 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1537 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1539 if (!stp_online || !(stp_info.vbits & 0x0800))
1541 return sprintf(buf, "%i\n", (int) stp_info.tto);
1544 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1546 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1548 if (!stp_online || !(stp_info.vbits & 0x4000))
1550 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1553 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1554 stp_time_zone_offset_show, NULL);
1556 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1560 return sprintf(buf, "%i\n", stp_info.tmd);
1563 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1565 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1569 return sprintf(buf, "%i\n", stp_info.tst);
1572 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1574 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1576 return sprintf(buf, "%i\n", stp_online);
1579 static ssize_t stp_online_store(struct sysdev_class *class,
1580 const char *buf, size_t count)
1584 value = simple_strtoul(buf, NULL, 0);
1585 if (value != 0 && value != 1)
1587 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1590 schedule_work(&stp_work);
1595 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1596 * stp/online but attr_online already exists in this file ..
1598 static struct sysdev_class_attribute attr_stp_online = {
1599 .attr = { .name = "online", .mode = 0600 },
1600 .show = stp_online_show,
1601 .store = stp_online_store,
1604 static struct sysdev_class_attribute *stp_attributes[] = {
1612 &attr_time_zone_offset,
1618 static int __init stp_init_sysfs(void)
1620 struct sysdev_class_attribute **attr;
1623 rc = sysdev_class_register(&stp_sysclass);
1626 for (attr = stp_attributes; *attr; attr++) {
1627 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1633 for (; attr >= stp_attributes; attr--)
1634 sysdev_class_remove_file(&stp_sysclass, *attr);
1635 sysdev_class_unregister(&stp_sysclass);
1640 device_initcall(stp_init_sysfs);