2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
22 #include <linux/interrupt.h>
23 #include <linux/time.h>
24 #include <linux/sysdev.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/smp.h>
28 #include <linux/types.h>
29 #include <linux/profile.h>
30 #include <linux/timex.h>
31 #include <linux/notifier.h>
32 #include <linux/clocksource.h>
33 #include <linux/clockchips.h>
34 #include <linux/bootmem.h>
35 #include <asm/uaccess.h>
36 #include <asm/delay.h>
37 #include <asm/s390_ext.h>
38 #include <asm/div64.h>
41 #include <asm/irq_regs.h>
42 #include <asm/timer.h>
46 /* change this if you have some constant time drift */
47 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
48 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
50 /* The value of the TOD clock for 1.1.1970. */
51 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
54 * Create a small time difference between the timer interrupts
55 * on the different cpus to avoid lock contention.
57 #define CPU_DEVIATION (smp_processor_id() << 12)
59 #define TICK_SIZE tick
61 static ext_int_info_t ext_int_info_cc;
62 static ext_int_info_t ext_int_etr_cc;
63 static u64 sched_clock_base_cc;
65 static DEFINE_PER_CPU(struct clock_event_device, comparators);
68 * Scheduler clock - returns current time in nanosec units.
70 unsigned long long sched_clock(void)
72 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
76 * Monotonic_clock - returns # of nanoseconds passed since time_init()
78 unsigned long long monotonic_clock(void)
82 EXPORT_SYMBOL(monotonic_clock);
84 void tod_to_timeval(__u64 todval, struct timespec *xtime)
86 unsigned long long sec;
91 todval -= (sec * 1000000) << 12;
92 xtime->tv_nsec = ((todval * 1000) >> 12);
95 #ifdef CONFIG_PROFILING
96 #define s390_do_profile() profile_tick(CPU_PROFILING)
98 #define s390_do_profile() do { ; } while(0)
99 #endif /* CONFIG_PROFILING */
101 void clock_comparator_work(void)
103 struct clock_event_device *cd;
105 S390_lowcore.clock_comparator = -1ULL;
106 set_clock_comparator(S390_lowcore.clock_comparator);
107 cd = &__get_cpu_var(comparators);
108 cd->event_handler(cd);
113 * Fixup the clock comparator.
115 static void fixup_clock_comparator(unsigned long long delta)
117 /* If nobody is waiting there's nothing to fix. */
118 if (S390_lowcore.clock_comparator == -1ULL)
120 S390_lowcore.clock_comparator += delta;
121 set_clock_comparator(S390_lowcore.clock_comparator);
124 static int s390_next_event(unsigned long delta,
125 struct clock_event_device *evt)
127 S390_lowcore.clock_comparator = get_clock() + delta;
128 set_clock_comparator(S390_lowcore.clock_comparator);
132 static void s390_set_mode(enum clock_event_mode mode,
133 struct clock_event_device *evt)
138 * Set up lowcore and control register of the current cpu to
139 * enable TOD clock and clock comparator interrupts.
141 void init_cpu_timer(void)
143 struct clock_event_device *cd;
146 S390_lowcore.clock_comparator = -1ULL;
147 set_clock_comparator(S390_lowcore.clock_comparator);
149 cpu = smp_processor_id();
150 cd = &per_cpu(comparators, cpu);
151 cd->name = "comparator";
152 cd->features = CLOCK_EVT_FEAT_ONESHOT;
155 cd->min_delta_ns = 1;
156 cd->max_delta_ns = LONG_MAX;
158 cd->cpumask = cpumask_of_cpu(cpu);
159 cd->set_next_event = s390_next_event;
160 cd->set_mode = s390_set_mode;
162 clockevents_register_device(cd);
164 /* Enable clock comparator timer interrupt. */
167 /* Always allow the timing alert external interrupt. */
171 static void clock_comparator_interrupt(__u16 code)
173 if (S390_lowcore.clock_comparator == -1ULL)
174 set_clock_comparator(S390_lowcore.clock_comparator);
177 static void etr_timing_alert(struct etr_irq_parm *);
178 static void stp_timing_alert(struct stp_irq_parm *);
180 static void timing_alert_interrupt(__u16 code)
182 if (S390_lowcore.ext_params & 0x00c40000)
183 etr_timing_alert((struct etr_irq_parm *)
184 &S390_lowcore.ext_params);
185 if (S390_lowcore.ext_params & 0x00038000)
186 stp_timing_alert((struct stp_irq_parm *)
187 &S390_lowcore.ext_params);
190 static void etr_reset(void);
191 static void stp_reset(void);
194 * Get the TOD clock running.
196 static u64 __init reset_tod_clock(void)
202 if (store_clock(&time) == 0)
204 /* TOD clock not running. Set the clock to Unix Epoch. */
205 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
206 panic("TOD clock not operational.");
208 return TOD_UNIX_EPOCH;
211 static cycle_t read_tod_clock(void)
216 static struct clocksource clocksource_tod = {
219 .read = read_tod_clock,
223 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
227 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
229 if (clock != &clocksource_tod)
232 /* Make userspace gettimeofday spin until we're done. */
233 ++vdso_data->tb_update_count;
235 vdso_data->xtime_tod_stamp = clock->cycle_last;
236 vdso_data->xtime_clock_sec = xtime.tv_sec;
237 vdso_data->xtime_clock_nsec = xtime.tv_nsec;
238 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
239 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
241 ++vdso_data->tb_update_count;
244 extern struct timezone sys_tz;
246 void update_vsyscall_tz(void)
248 /* Make userspace gettimeofday spin until we're done. */
249 ++vdso_data->tb_update_count;
251 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
252 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
254 ++vdso_data->tb_update_count;
258 * Initialize the TOD clock and the CPU timer of
261 void __init time_init(void)
263 sched_clock_base_cc = reset_tod_clock();
266 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime);
267 set_normalized_timespec(&wall_to_monotonic,
268 -xtime.tv_sec, -xtime.tv_nsec);
270 /* request the clock comparator external interrupt */
271 if (register_early_external_interrupt(0x1004,
272 clock_comparator_interrupt,
273 &ext_int_info_cc) != 0)
274 panic("Couldn't request external interrupt 0x1004");
276 if (clocksource_register(&clocksource_tod) != 0)
277 panic("Could not register TOD clock source");
279 /* request the timing alert external interrupt */
280 if (register_early_external_interrupt(0x1406,
281 timing_alert_interrupt,
282 &ext_int_etr_cc) != 0)
283 panic("Couldn't request external interrupt 0x1406");
285 /* Enable TOD clock interrupts on the boot cpu. */
288 #ifdef CONFIG_VIRT_TIMER
294 * The time is "clock". old is what we think the time is.
295 * Adjust the value by a multiple of jiffies and add the delta to ntp.
296 * "delay" is an approximation how long the synchronization took. If
297 * the time correction is positive, then "delay" is subtracted from
298 * the time difference and only the remaining part is passed to ntp.
300 static unsigned long long adjust_time(unsigned long long old,
301 unsigned long long clock,
302 unsigned long long delay)
304 unsigned long long delta, ticks;
308 /* It is later than we thought. */
309 delta = ticks = clock - old;
310 delta = ticks = (delta < delay) ? 0 : delta - delay;
311 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
312 adjust.offset = ticks * (1000000 / HZ);
314 /* It is earlier than we thought. */
315 delta = ticks = old - clock;
316 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
318 adjust.offset = -ticks * (1000000 / HZ);
320 sched_clock_base_cc += delta;
321 if (adjust.offset != 0) {
322 printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
324 adjust.modes = ADJ_OFFSET_SINGLESHOT;
325 do_adjtimex(&adjust);
330 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
331 static unsigned long clock_sync_flags;
333 #define CLOCK_SYNC_HAS_ETR 0
334 #define CLOCK_SYNC_HAS_STP 1
335 #define CLOCK_SYNC_ETR 2
336 #define CLOCK_SYNC_STP 3
339 * The synchronous get_clock function. It will write the current clock
340 * value to the clock pointer and return 0 if the clock is in sync with
341 * the external time source. If the clock mode is local it will return
342 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
345 int get_sync_clock(unsigned long long *clock)
348 unsigned int sw0, sw1;
350 sw_ptr = &get_cpu_var(clock_sync_word);
351 sw0 = atomic_read(sw_ptr);
352 *clock = get_clock();
353 sw1 = atomic_read(sw_ptr);
354 put_cpu_var(clock_sync_sync);
355 if (sw0 == sw1 && (sw0 & 0x80000000U))
356 /* Success: time is in sync. */
358 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
359 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
361 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
362 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
366 EXPORT_SYMBOL(get_sync_clock);
369 * Make get_sync_clock return -EAGAIN.
371 static void disable_sync_clock(void *dummy)
373 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
375 * Clear the in-sync bit 2^31. All get_sync_clock calls will
376 * fail until the sync bit is turned back on. In addition
377 * increase the "sequence" counter to avoid the race of an
378 * etr event and the complete recovery against get_sync_clock.
380 atomic_clear_mask(0x80000000, sw_ptr);
385 * Make get_sync_clock return 0 again.
386 * Needs to be called from a context disabled for preemption.
388 static void enable_sync_clock(void)
390 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
391 atomic_set_mask(0x80000000, sw_ptr);
395 * External Time Reference (ETR) code.
397 static int etr_port0_online;
398 static int etr_port1_online;
399 static int etr_steai_available;
401 static int __init early_parse_etr(char *p)
403 if (strncmp(p, "off", 3) == 0)
404 etr_port0_online = etr_port1_online = 0;
405 else if (strncmp(p, "port0", 5) == 0)
406 etr_port0_online = 1;
407 else if (strncmp(p, "port1", 5) == 0)
408 etr_port1_online = 1;
409 else if (strncmp(p, "on", 2) == 0)
410 etr_port0_online = etr_port1_online = 1;
413 early_param("etr", early_parse_etr);
416 ETR_EVENT_PORT0_CHANGE,
417 ETR_EVENT_PORT1_CHANGE,
418 ETR_EVENT_PORT_ALERT,
419 ETR_EVENT_SYNC_CHECK,
420 ETR_EVENT_SWITCH_LOCAL,
425 * Valid bit combinations of the eacr register are (x = don't care):
426 * e0 e1 dp p0 p1 ea es sl
427 * 0 0 x 0 0 0 0 0 initial, disabled state
428 * 0 0 x 0 1 1 0 0 port 1 online
429 * 0 0 x 1 0 1 0 0 port 0 online
430 * 0 0 x 1 1 1 0 0 both ports online
431 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
432 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
433 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
434 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
435 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
436 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
437 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
438 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
439 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
440 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
441 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
442 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
443 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
444 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
445 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
446 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
448 static struct etr_eacr etr_eacr;
449 static u64 etr_tolec; /* time of last eacr update */
450 static struct etr_aib etr_port0;
451 static int etr_port0_uptodate;
452 static struct etr_aib etr_port1;
453 static int etr_port1_uptodate;
454 static unsigned long etr_events;
455 static struct timer_list etr_timer;
457 static void etr_timeout(unsigned long dummy);
458 static void etr_work_fn(struct work_struct *work);
459 static DECLARE_WORK(etr_work, etr_work_fn);
462 * Reset ETR attachment.
464 static void etr_reset(void)
466 etr_eacr = (struct etr_eacr) {
467 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
468 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
470 if (etr_setr(&etr_eacr) == 0) {
471 etr_tolec = get_clock();
472 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
473 } else if (etr_port0_online || etr_port1_online) {
474 printk(KERN_WARNING "Running on non ETR capable "
475 "machine, only local mode available.\n");
476 etr_port0_online = etr_port1_online = 0;
480 static int __init etr_init(void)
484 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
486 /* Check if this machine has the steai instruction. */
487 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
488 etr_steai_available = 1;
489 setup_timer(&etr_timer, etr_timeout, 0UL);
490 if (etr_port0_online) {
491 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
492 schedule_work(&etr_work);
494 if (etr_port1_online) {
495 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
496 schedule_work(&etr_work);
501 arch_initcall(etr_init);
504 * Two sorts of ETR machine checks. The architecture reads:
505 * "When a machine-check niterruption occurs and if a switch-to-local or
506 * ETR-sync-check interrupt request is pending but disabled, this pending
507 * disabled interruption request is indicated and is cleared".
508 * Which means that we can get etr_switch_to_local events from the machine
509 * check handler although the interruption condition is disabled. Lovely..
513 * Switch to local machine check. This is called when the last usable
514 * ETR port goes inactive. After switch to local the clock is not in sync.
516 void etr_switch_to_local(void)
520 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
521 disable_sync_clock(NULL);
522 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
523 schedule_work(&etr_work);
527 * ETR sync check machine check. This is called when the ETR OTE and the
528 * local clock OTE are farther apart than the ETR sync check tolerance.
529 * After a ETR sync check the clock is not in sync. The machine check
530 * is broadcasted to all cpus at the same time.
532 void etr_sync_check(void)
536 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
537 disable_sync_clock(NULL);
538 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
539 schedule_work(&etr_work);
543 * ETR timing alert. There are two causes:
544 * 1) port state change, check the usability of the port
545 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
546 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
547 * or ETR-data word 4 (edf4) has changed.
549 static void etr_timing_alert(struct etr_irq_parm *intparm)
552 /* ETR port 0 state change. */
553 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
555 /* ETR port 1 state change. */
556 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
559 * ETR port alert on either port 0, 1 or both.
560 * Both ports are not up-to-date now.
562 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
563 schedule_work(&etr_work);
566 static void etr_timeout(unsigned long dummy)
568 set_bit(ETR_EVENT_UPDATE, &etr_events);
569 schedule_work(&etr_work);
573 * Check if the etr mode is pss.
575 static inline int etr_mode_is_pps(struct etr_eacr eacr)
577 return eacr.es && !eacr.sl;
581 * Check if the etr mode is etr.
583 static inline int etr_mode_is_etr(struct etr_eacr eacr)
585 return eacr.es && eacr.sl;
589 * Check if the port can be used for TOD synchronization.
590 * For PPS mode the port has to receive OTEs. For ETR mode
591 * the port has to receive OTEs, the ETR stepping bit has to
592 * be zero and the validity bits for data frame 1, 2, and 3
595 static int etr_port_valid(struct etr_aib *aib, int port)
599 /* Check that this port is receiving OTEs. */
603 psc = port ? aib->esw.psc1 : aib->esw.psc0;
604 if (psc == etr_lpsc_pps_mode)
606 if (psc == etr_lpsc_operational_step)
607 return !aib->esw.y && aib->slsw.v1 &&
608 aib->slsw.v2 && aib->slsw.v3;
613 * Check if two ports are on the same network.
615 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
617 // FIXME: any other fields we have to compare?
618 return aib1->edf1.net_id == aib2->edf1.net_id;
622 * Wrapper for etr_stei that converts physical port states
623 * to logical port states to be consistent with the output
624 * of stetr (see etr_psc vs. etr_lpsc).
626 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
628 BUG_ON(etr_steai(aib, func) != 0);
629 /* Convert port state to logical port state. */
630 if (aib->esw.psc0 == 1)
632 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
634 if (aib->esw.psc1 == 1)
636 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
641 * Check if the aib a2 is still connected to the same attachment as
642 * aib a1, the etv values differ by one and a2 is valid.
644 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
646 int state_a1, state_a2;
648 /* Paranoia check: e0/e1 should better be the same. */
649 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
650 a1->esw.eacr.e1 != a2->esw.eacr.e1)
653 /* Still connected to the same etr ? */
654 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
655 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
656 if (state_a1 == etr_lpsc_operational_step) {
657 if (state_a2 != etr_lpsc_operational_step ||
658 a1->edf1.net_id != a2->edf1.net_id ||
659 a1->edf1.etr_id != a2->edf1.etr_id ||
660 a1->edf1.etr_pn != a2->edf1.etr_pn)
662 } else if (state_a2 != etr_lpsc_pps_mode)
665 /* The ETV value of a2 needs to be ETV of a1 + 1. */
666 if (a1->edf2.etv + 1 != a2->edf2.etv)
669 if (!etr_port_valid(a2, p))
675 struct clock_sync_data {
677 unsigned long long fixup_cc;
680 static void clock_sync_cpu_start(void *dummy)
682 struct clock_sync_data *sync = dummy;
686 * This looks like a busy wait loop but it isn't. etr_sync_cpus
687 * is called on all other cpus while the TOD clocks is stopped.
688 * __udelay will stop the cpu on an enabled wait psw until the
689 * TOD is running again.
691 while (sync->in_sync == 0) {
694 * A different cpu changes *in_sync. Therefore use
695 * barrier() to force memory access.
699 if (sync->in_sync != 1)
700 /* Didn't work. Clear per-cpu in sync bit again. */
701 disable_sync_clock(NULL);
703 * This round of TOD syncing is done. Set the clock comparator
704 * to the next tick and let the processor continue.
706 fixup_clock_comparator(sync->fixup_cc);
709 static void clock_sync_cpu_end(void *dummy)
714 * Sync the TOD clock using the port refered to by aibp. This port
715 * has to be enabled and the other port has to be disabled. The
716 * last eacr update has to be more than 1.6 seconds in the past.
718 static int etr_sync_clock(struct etr_aib *aib, int port)
720 struct etr_aib *sync_port;
721 struct clock_sync_data etr_sync;
722 unsigned long long clock, old_clock, delay, delta;
726 /* Check if the current aib is adjacent to the sync port aib. */
727 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
728 follows = etr_aib_follows(sync_port, aib, port);
729 memcpy(sync_port, aib, sizeof(*aib));
734 * Catch all other cpus and make them wait until we have
735 * successfully synced the clock. smp_call_function will
736 * return after all other cpus are in etr_sync_cpu_start.
738 memset(&etr_sync, 0, sizeof(etr_sync));
740 smp_call_function(clock_sync_cpu_start, &etr_sync, 0);
744 /* Set clock to next OTE. */
745 __ctl_set_bit(14, 21);
746 __ctl_set_bit(0, 29);
747 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
748 old_clock = get_clock();
749 if (set_clock(clock) == 0) {
750 __udelay(1); /* Wait for the clock to start. */
751 __ctl_clear_bit(0, 29);
752 __ctl_clear_bit(14, 21);
754 /* Adjust Linux timing variables. */
755 delay = (unsigned long long)
756 (aib->edf2.etv - sync_port->edf2.etv) << 32;
757 delta = adjust_time(old_clock, clock, delay);
758 etr_sync.fixup_cc = delta;
759 fixup_clock_comparator(delta);
760 /* Verify that the clock is properly set. */
761 if (!etr_aib_follows(sync_port, aib, port)) {
763 disable_sync_clock(NULL);
764 etr_sync.in_sync = -EAGAIN;
767 etr_sync.in_sync = 1;
771 /* Could not set the clock ?!? */
772 __ctl_clear_bit(0, 29);
773 __ctl_clear_bit(14, 21);
774 disable_sync_clock(NULL);
775 etr_sync.in_sync = -EAGAIN;
779 smp_call_function(clock_sync_cpu_end, NULL, 0);
785 * Handle the immediate effects of the different events.
786 * The port change event is used for online/offline changes.
788 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
790 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
792 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
793 eacr.es = eacr.sl = 0;
794 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
795 etr_port0_uptodate = etr_port1_uptodate = 0;
797 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
800 * Port change of an enabled port. We have to
801 * assume that this can have caused an stepping
804 etr_tolec = get_clock();
805 eacr.p0 = etr_port0_online;
808 etr_port0_uptodate = 0;
810 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
813 * Port change of an enabled port. We have to
814 * assume that this can have caused an stepping
817 etr_tolec = get_clock();
818 eacr.p1 = etr_port1_online;
821 etr_port1_uptodate = 0;
823 clear_bit(ETR_EVENT_UPDATE, &etr_events);
828 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
829 * one of the ports needs an update.
831 static void etr_set_tolec_timeout(unsigned long long now)
833 unsigned long micros;
835 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
836 (!etr_eacr.p1 || etr_port1_uptodate))
838 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
839 micros = (micros > 1600000) ? 0 : 1600000 - micros;
840 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
844 * Set up a time that expires after 1/2 second.
846 static void etr_set_sync_timeout(void)
848 mod_timer(&etr_timer, jiffies + HZ/2);
852 * Update the aib information for one or both ports.
854 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
855 struct etr_eacr eacr)
857 /* With both ports disabled the aib information is useless. */
858 if (!eacr.e0 && !eacr.e1)
861 /* Update port0 or port1 with aib stored in etr_work_fn. */
862 if (aib->esw.q == 0) {
863 /* Information for port 0 stored. */
864 if (eacr.p0 && !etr_port0_uptodate) {
866 if (etr_port0_online)
867 etr_port0_uptodate = 1;
870 /* Information for port 1 stored. */
871 if (eacr.p1 && !etr_port1_uptodate) {
873 if (etr_port0_online)
874 etr_port1_uptodate = 1;
879 * Do not try to get the alternate port aib if the clock
880 * is not in sync yet.
882 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
886 * If steai is available we can get the information about
887 * the other port immediately. If only stetr is available the
888 * data-port bit toggle has to be used.
890 if (etr_steai_available) {
891 if (eacr.p0 && !etr_port0_uptodate) {
892 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
893 etr_port0_uptodate = 1;
895 if (eacr.p1 && !etr_port1_uptodate) {
896 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
897 etr_port1_uptodate = 1;
901 * One port was updated above, if the other
902 * port is not uptodate toggle dp bit.
904 if ((eacr.p0 && !etr_port0_uptodate) ||
905 (eacr.p1 && !etr_port1_uptodate))
914 * Write new etr control register if it differs from the current one.
915 * Return 1 if etr_tolec has been updated as well.
917 static void etr_update_eacr(struct etr_eacr eacr)
921 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
922 /* No change, return. */
925 * The disable of an active port of the change of the data port
926 * bit can/will cause a change in the data port.
928 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
929 (etr_eacr.dp ^ eacr.dp) != 0;
933 etr_tolec = get_clock();
937 * ETR tasklet. In this function you'll find the main logic. In
938 * particular this is the only function that calls etr_update_eacr(),
939 * it "controls" the etr control register.
941 static void etr_work_fn(struct work_struct *work)
943 unsigned long long now;
944 struct etr_eacr eacr;
948 /* Create working copy of etr_eacr. */
951 /* Check for the different events and their immediate effects. */
952 eacr = etr_handle_events(eacr);
954 /* Check if ETR is supposed to be active. */
955 eacr.ea = eacr.p0 || eacr.p1;
957 /* Both ports offline. Reset everything. */
958 eacr.dp = eacr.es = eacr.sl = 0;
959 on_each_cpu(disable_sync_clock, NULL, 1);
960 del_timer_sync(&etr_timer);
961 etr_update_eacr(eacr);
962 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
966 /* Store aib to get the current ETR status word. */
967 BUG_ON(etr_stetr(&aib) != 0);
968 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
972 * Update the port information if the last stepping port change
973 * or data port change is older than 1.6 seconds.
975 if (now >= etr_tolec + (1600000 << 12))
976 eacr = etr_handle_update(&aib, eacr);
979 * Select ports to enable. The prefered synchronization mode is PPS.
980 * If a port can be enabled depends on a number of things:
981 * 1) The port needs to be online and uptodate. A port is not
982 * disabled just because it is not uptodate, but it is only
983 * enabled if it is uptodate.
984 * 2) The port needs to have the same mode (pps / etr).
985 * 3) The port needs to be usable -> etr_port_valid() == 1
986 * 4) To enable the second port the clock needs to be in sync.
987 * 5) If both ports are useable and are ETR ports, the network id
988 * has to be the same.
989 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
991 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
994 if (!etr_mode_is_pps(etr_eacr))
996 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
998 // FIXME: uptodate checks ?
999 else if (etr_port0_uptodate && etr_port1_uptodate)
1001 sync_port = (etr_port0_uptodate &&
1002 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1003 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1007 if (!etr_mode_is_pps(etr_eacr))
1009 sync_port = (etr_port1_uptodate &&
1010 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1011 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1014 if (!etr_mode_is_etr(etr_eacr))
1016 if (!eacr.es || !eacr.p1 ||
1017 aib.esw.psc1 != etr_lpsc_operational_alt)
1019 else if (etr_port0_uptodate && etr_port1_uptodate &&
1020 etr_compare_network(&etr_port0, &etr_port1))
1022 sync_port = (etr_port0_uptodate &&
1023 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1024 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1028 if (!etr_mode_is_etr(etr_eacr))
1030 sync_port = (etr_port1_uptodate &&
1031 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1033 /* Both ports not usable. */
1034 eacr.es = eacr.sl = 0;
1036 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1039 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1043 * If the clock is in sync just update the eacr and return.
1044 * If there is no valid sync port wait for a port update.
1046 if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
1047 eacr.es || sync_port < 0) {
1048 etr_update_eacr(eacr);
1049 etr_set_tolec_timeout(now);
1054 * Prepare control register for clock syncing
1055 * (reset data port bit, set sync check control.
1061 * Update eacr and try to synchronize the clock. If the update
1062 * of eacr caused a stepping port switch (or if we have to
1063 * assume that a stepping port switch has occured) or the
1064 * clock syncing failed, reset the sync check control bit
1065 * and set up a timer to try again after 0.5 seconds
1067 etr_update_eacr(eacr);
1068 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1069 if (now < etr_tolec + (1600000 << 12) ||
1070 etr_sync_clock(&aib, sync_port) != 0) {
1071 /* Sync failed. Try again in 1/2 second. */
1073 etr_update_eacr(eacr);
1074 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1075 etr_set_sync_timeout();
1077 etr_set_tolec_timeout(now);
1081 * Sysfs interface functions
1083 static struct sysdev_class etr_sysclass = {
1087 static struct sys_device etr_port0_dev = {
1089 .cls = &etr_sysclass,
1092 static struct sys_device etr_port1_dev = {
1094 .cls = &etr_sysclass,
1098 * ETR class attributes
1100 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1102 return sprintf(buf, "%i\n", etr_port0.esw.p);
1105 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1107 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1111 if (etr_mode_is_pps(etr_eacr))
1113 else if (etr_mode_is_etr(etr_eacr))
1117 return sprintf(buf, "%s\n", mode_str);
1120 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1123 * ETR port attributes
1125 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1127 if (dev == &etr_port0_dev)
1128 return etr_port0_online ? &etr_port0 : NULL;
1130 return etr_port1_online ? &etr_port1 : NULL;
1133 static ssize_t etr_online_show(struct sys_device *dev,
1134 struct sysdev_attribute *attr,
1137 unsigned int online;
1139 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1140 return sprintf(buf, "%i\n", online);
1143 static ssize_t etr_online_store(struct sys_device *dev,
1144 struct sysdev_attribute *attr,
1145 const char *buf, size_t count)
1149 value = simple_strtoul(buf, NULL, 0);
1150 if (value != 0 && value != 1)
1152 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1154 if (dev == &etr_port0_dev) {
1155 if (etr_port0_online == value)
1156 return count; /* Nothing to do. */
1157 etr_port0_online = value;
1158 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1159 schedule_work(&etr_work);
1161 if (etr_port1_online == value)
1162 return count; /* Nothing to do. */
1163 etr_port1_online = value;
1164 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1165 schedule_work(&etr_work);
1170 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1172 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1173 struct sysdev_attribute *attr,
1176 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1177 etr_eacr.e0 : etr_eacr.e1);
1180 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1182 static ssize_t etr_mode_code_show(struct sys_device *dev,
1183 struct sysdev_attribute *attr, char *buf)
1185 if (!etr_port0_online && !etr_port1_online)
1186 /* Status word is not uptodate if both ports are offline. */
1188 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1189 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1192 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1194 static ssize_t etr_untuned_show(struct sys_device *dev,
1195 struct sysdev_attribute *attr, char *buf)
1197 struct etr_aib *aib = etr_aib_from_dev(dev);
1199 if (!aib || !aib->slsw.v1)
1201 return sprintf(buf, "%i\n", aib->edf1.u);
1204 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1206 static ssize_t etr_network_id_show(struct sys_device *dev,
1207 struct sysdev_attribute *attr, char *buf)
1209 struct etr_aib *aib = etr_aib_from_dev(dev);
1211 if (!aib || !aib->slsw.v1)
1213 return sprintf(buf, "%i\n", aib->edf1.net_id);
1216 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1218 static ssize_t etr_id_show(struct sys_device *dev,
1219 struct sysdev_attribute *attr, char *buf)
1221 struct etr_aib *aib = etr_aib_from_dev(dev);
1223 if (!aib || !aib->slsw.v1)
1225 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1228 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1230 static ssize_t etr_port_number_show(struct sys_device *dev,
1231 struct sysdev_attribute *attr, char *buf)
1233 struct etr_aib *aib = etr_aib_from_dev(dev);
1235 if (!aib || !aib->slsw.v1)
1237 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1240 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1242 static ssize_t etr_coupled_show(struct sys_device *dev,
1243 struct sysdev_attribute *attr, char *buf)
1245 struct etr_aib *aib = etr_aib_from_dev(dev);
1247 if (!aib || !aib->slsw.v3)
1249 return sprintf(buf, "%i\n", aib->edf3.c);
1252 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1254 static ssize_t etr_local_time_show(struct sys_device *dev,
1255 struct sysdev_attribute *attr, char *buf)
1257 struct etr_aib *aib = etr_aib_from_dev(dev);
1259 if (!aib || !aib->slsw.v3)
1261 return sprintf(buf, "%i\n", aib->edf3.blto);
1264 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1266 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1267 struct sysdev_attribute *attr, char *buf)
1269 struct etr_aib *aib = etr_aib_from_dev(dev);
1271 if (!aib || !aib->slsw.v3)
1273 return sprintf(buf, "%i\n", aib->edf3.buo);
1276 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1278 static struct sysdev_attribute *etr_port_attributes[] = {
1280 &attr_stepping_control,
1292 static int __init etr_register_port(struct sys_device *dev)
1294 struct sysdev_attribute **attr;
1297 rc = sysdev_register(dev);
1300 for (attr = etr_port_attributes; *attr; attr++) {
1301 rc = sysdev_create_file(dev, *attr);
1307 for (; attr >= etr_port_attributes; attr--)
1308 sysdev_remove_file(dev, *attr);
1309 sysdev_unregister(dev);
1314 static void __init etr_unregister_port(struct sys_device *dev)
1316 struct sysdev_attribute **attr;
1318 for (attr = etr_port_attributes; *attr; attr++)
1319 sysdev_remove_file(dev, *attr);
1320 sysdev_unregister(dev);
1323 static int __init etr_init_sysfs(void)
1327 rc = sysdev_class_register(&etr_sysclass);
1330 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1332 goto out_unreg_class;
1333 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1335 goto out_remove_stepping_port;
1336 rc = etr_register_port(&etr_port0_dev);
1338 goto out_remove_stepping_mode;
1339 rc = etr_register_port(&etr_port1_dev);
1341 goto out_remove_port0;
1345 etr_unregister_port(&etr_port0_dev);
1346 out_remove_stepping_mode:
1347 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1348 out_remove_stepping_port:
1349 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1351 sysdev_class_unregister(&etr_sysclass);
1356 device_initcall(etr_init_sysfs);
1359 * Server Time Protocol (STP) code.
1361 static int stp_online;
1362 static struct stp_sstpi stp_info;
1363 static void *stp_page;
1365 static void stp_work_fn(struct work_struct *work);
1366 static DECLARE_WORK(stp_work, stp_work_fn);
1368 static int __init early_parse_stp(char *p)
1370 if (strncmp(p, "off", 3) == 0)
1372 else if (strncmp(p, "on", 2) == 0)
1376 early_param("stp", early_parse_stp);
1379 * Reset STP attachment.
1381 static void __init stp_reset(void)
1385 stp_page = alloc_bootmem_pages(PAGE_SIZE);
1386 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1388 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1389 else if (stp_online) {
1390 printk(KERN_WARNING "Running on non STP capable machine.\n");
1391 free_bootmem((unsigned long) stp_page, PAGE_SIZE);
1397 static int __init stp_init(void)
1399 if (test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags) && stp_online)
1400 schedule_work(&stp_work);
1404 arch_initcall(stp_init);
1407 * STP timing alert. There are three causes:
1408 * 1) timing status change
1409 * 2) link availability change
1410 * 3) time control parameter change
1411 * In all three cases we are only interested in the clock source state.
1412 * If a STP clock source is now available use it.
1414 static void stp_timing_alert(struct stp_irq_parm *intparm)
1416 if (intparm->tsc || intparm->lac || intparm->tcpc)
1417 schedule_work(&stp_work);
1421 * STP sync check machine check. This is called when the timing state
1422 * changes from the synchronized state to the unsynchronized state.
1423 * After a STP sync check the clock is not in sync. The machine check
1424 * is broadcasted to all cpus at the same time.
1426 void stp_sync_check(void)
1428 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1430 disable_sync_clock(NULL);
1431 schedule_work(&stp_work);
1435 * STP island condition machine check. This is called when an attached
1436 * server attempts to communicate over an STP link and the servers
1437 * have matching CTN ids and have a valid stratum-1 configuration
1438 * but the configurations do not match.
1440 void stp_island_check(void)
1442 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1444 disable_sync_clock(NULL);
1445 schedule_work(&stp_work);
1449 * STP tasklet. Check for the STP state and take over the clock
1450 * synchronization if the STP clock source is usable.
1452 static void stp_work_fn(struct work_struct *work)
1454 struct clock_sync_data stp_sync;
1455 unsigned long long old_clock, delta;
1459 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1463 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1467 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1468 if (rc || stp_info.c == 0)
1472 * Catch all other cpus and make them wait until we have
1473 * successfully synced the clock. smp_call_function will
1474 * return after all other cpus are in clock_sync_cpu_start.
1476 memset(&stp_sync, 0, sizeof(stp_sync));
1478 smp_call_function(clock_sync_cpu_start, &stp_sync, 0);
1479 local_irq_disable();
1480 enable_sync_clock();
1482 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1483 if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1484 schedule_work(&etr_work);
1487 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1488 stp_info.todoff[2] || stp_info.todoff[3] ||
1489 stp_info.tmd != 2) {
1490 old_clock = get_clock();
1491 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1493 delta = adjust_time(old_clock, get_clock(), 0);
1494 fixup_clock_comparator(delta);
1495 rc = chsc_sstpi(stp_page, &stp_info,
1496 sizeof(struct stp_sstpi));
1497 if (rc == 0 && stp_info.tmd != 2)
1502 disable_sync_clock(NULL);
1503 stp_sync.in_sync = -EAGAIN;
1504 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1505 if (etr_port0_online || etr_port1_online)
1506 schedule_work(&etr_work);
1508 stp_sync.in_sync = 1;
1511 smp_call_function(clock_sync_cpu_end, NULL, 0);
1516 * STP class sysfs interface functions
1518 static struct sysdev_class stp_sysclass = {
1522 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1526 return sprintf(buf, "%016llx\n",
1527 *(unsigned long long *) stp_info.ctnid);
1530 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1532 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1536 return sprintf(buf, "%i\n", stp_info.ctn);
1539 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1541 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1543 if (!stp_online || !(stp_info.vbits & 0x2000))
1545 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1548 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1550 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1552 if (!stp_online || !(stp_info.vbits & 0x8000))
1554 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1557 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1559 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1563 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1566 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1568 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1570 if (!stp_online || !(stp_info.vbits & 0x0800))
1572 return sprintf(buf, "%i\n", (int) stp_info.tto);
1575 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1577 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1579 if (!stp_online || !(stp_info.vbits & 0x4000))
1581 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1584 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1585 stp_time_zone_offset_show, NULL);
1587 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1591 return sprintf(buf, "%i\n", stp_info.tmd);
1594 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1596 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1600 return sprintf(buf, "%i\n", stp_info.tst);
1603 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1605 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1607 return sprintf(buf, "%i\n", stp_online);
1610 static ssize_t stp_online_store(struct sysdev_class *class,
1611 const char *buf, size_t count)
1615 value = simple_strtoul(buf, NULL, 0);
1616 if (value != 0 && value != 1)
1618 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1621 schedule_work(&stp_work);
1626 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1627 * stp/online but attr_online already exists in this file ..
1629 static struct sysdev_class_attribute attr_stp_online = {
1630 .attr = { .name = "online", .mode = 0600 },
1631 .show = stp_online_show,
1632 .store = stp_online_store,
1635 static struct sysdev_class_attribute *stp_attributes[] = {
1643 &attr_time_zone_offset,
1649 static int __init stp_init_sysfs(void)
1651 struct sysdev_class_attribute **attr;
1654 rc = sysdev_class_register(&stp_sysclass);
1657 for (attr = stp_attributes; *attr; attr++) {
1658 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1664 for (; attr >= stp_attributes; attr--)
1665 sysdev_class_remove_file(&stp_sysclass, *attr);
1666 sysdev_class_unregister(&stp_sysclass);
1671 device_initcall(stp_init_sysfs);