Merge branch 'core/rodata' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux...
[linux-2.6] / arch / powerpc / boot / dts / mpc8560ads.dts
1 /*
2  * MPC8560 ADS Device Tree Source
3  *
4  * Copyright 2006, 2008 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8560ADS";
16         compatible = "MPC8560ADS", "MPC85xxADS";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 ethernet2 = &enet2;
24                 ethernet3 = &enet3;
25                 serial0 = &serial0;
26                 serial1 = &serial1;
27                 pci0 = &pci0;
28         };
29
30         cpus {
31                 #address-cells = <1>;
32                 #size-cells = <0>;
33
34                 PowerPC,8560@0 {
35                         device_type = "cpu";
36                         reg = <0x0>;
37                         d-cache-line-size = <32>;       // 32 bytes
38                         i-cache-line-size = <32>;       // 32 bytes
39                         d-cache-size = <0x8000>;                // L1, 32K
40                         i-cache-size = <0x8000>;                // L1, 32K
41                         timebase-frequency = <82500000>;
42                         bus-frequency = <330000000>;
43                         clock-frequency = <825000000>;
44                 };
45         };
46
47         memory {
48                 device_type = "memory";
49                 reg = <0x0 0x10000000>;
50         };
51
52         soc8560@e0000000 {
53                 #address-cells = <1>;
54                 #size-cells = <1>;
55                 device_type = "soc";
56                 ranges = <0x0 0xe0000000 0x100000>;
57                 reg = <0xe0000000 0x200>;
58                 bus-frequency = <330000000>;
59
60                 memory-controller@2000 {
61                         compatible = "fsl,8540-memory-controller";
62                         reg = <0x2000 0x1000>;
63                         interrupt-parent = <&mpic>;
64                         interrupts = <18 2>;
65                 };
66
67                 l2-cache-controller@20000 {
68                         compatible = "fsl,8540-l2-cache-controller";
69                         reg = <0x20000 0x1000>;
70                         cache-line-size = <32>; // 32 bytes
71                         cache-size = <0x40000>; // L2, 256K
72                         interrupt-parent = <&mpic>;
73                         interrupts = <16 2>;
74                 };
75
76                 mdio@24520 {
77                         #address-cells = <1>;
78                         #size-cells = <0>;
79                         compatible = "fsl,gianfar-mdio";
80                         reg = <0x24520 0x20>;
81
82                         phy0: ethernet-phy@0 {
83                                 interrupt-parent = <&mpic>;
84                                 interrupts = <5 1>;
85                                 reg = <0x0>;
86                                 device_type = "ethernet-phy";
87                         };
88                         phy1: ethernet-phy@1 {
89                                 interrupt-parent = <&mpic>;
90                                 interrupts = <5 1>;
91                                 reg = <0x1>;
92                                 device_type = "ethernet-phy";
93                         };
94                         phy2: ethernet-phy@2 {
95                                 interrupt-parent = <&mpic>;
96                                 interrupts = <7 1>;
97                                 reg = <0x2>;
98                                 device_type = "ethernet-phy";
99                         };
100                         phy3: ethernet-phy@3 {
101                                 interrupt-parent = <&mpic>;
102                                 interrupts = <7 1>;
103                                 reg = <0x3>;
104                                 device_type = "ethernet-phy";
105                         };
106                 };
107
108                 enet0: ethernet@24000 {
109                         cell-index = <0>;
110                         device_type = "network";
111                         model = "TSEC";
112                         compatible = "gianfar";
113                         reg = <0x24000 0x1000>;
114                         local-mac-address = [ 00 00 00 00 00 00 ];
115                         interrupts = <29 2 30 2 34 2>;
116                         interrupt-parent = <&mpic>;
117                         phy-handle = <&phy0>;
118                 };
119
120                 enet1: ethernet@25000 {
121                         cell-index = <1>;
122                         device_type = "network";
123                         model = "TSEC";
124                         compatible = "gianfar";
125                         reg = <0x25000 0x1000>;
126                         local-mac-address = [ 00 00 00 00 00 00 ];
127                         interrupts = <35 2 36 2 40 2>;
128                         interrupt-parent = <&mpic>;
129                         phy-handle = <&phy1>;
130                 };
131
132                 mpic: pic@40000 {
133                         interrupt-controller;
134                         #address-cells = <0>;
135                         #interrupt-cells = <2>;
136                         reg = <0x40000 0x40000>;
137                         device_type = "open-pic";
138                 };
139
140                 cpm@919c0 {
141                         #address-cells = <1>;
142                         #size-cells = <1>;
143                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
144                         reg = <0x919c0 0x30>;
145                         ranges;
146
147                         muram@80000 {
148                                 #address-cells = <1>;
149                                 #size-cells = <1>;
150                                 ranges = <0x0 0x80000 0x10000>;
151
152                                 data@0 {
153                                         compatible = "fsl,cpm-muram-data";
154                                         reg = <0x0 0x4000 0x9000 0x2000>;
155                                 };
156                         };
157
158                         brg@919f0 {
159                                 compatible = "fsl,mpc8560-brg",
160                                              "fsl,cpm2-brg",
161                                              "fsl,cpm-brg";
162                                 reg = <0x919f0 0x10 0x915f0 0x10>;
163                                 clock-frequency = <165000000>;
164                         };
165
166                         cpmpic: pic@90c00 {
167                                 interrupt-controller;
168                                 #address-cells = <0>;
169                                 #interrupt-cells = <2>;
170                                 interrupts = <46 2>;
171                                 interrupt-parent = <&mpic>;
172                                 reg = <0x90c00 0x80>;
173                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
174                         };
175
176                         serial0: serial@91a00 {
177                                 device_type = "serial";
178                                 compatible = "fsl,mpc8560-scc-uart",
179                                              "fsl,cpm2-scc-uart";
180                                 reg = <0x91a00 0x20 0x88000 0x100>;
181                                 fsl,cpm-brg = <1>;
182                                 fsl,cpm-command = <0x800000>;
183                                 current-speed = <115200>;
184                                 interrupts = <40 8>;
185                                 interrupt-parent = <&cpmpic>;
186                         };
187
188                         serial1: serial@91a20 {
189                                 device_type = "serial";
190                                 compatible = "fsl,mpc8560-scc-uart",
191                                              "fsl,cpm2-scc-uart";
192                                 reg = <0x91a20 0x20 0x88100 0x100>;
193                                 fsl,cpm-brg = <2>;
194                                 fsl,cpm-command = <0x4a00000>;
195                                 current-speed = <115200>;
196                                 interrupts = <41 8>;
197                                 interrupt-parent = <&cpmpic>;
198                         };
199
200                         enet2: ethernet@91320 {
201                                 device_type = "network";
202                                 compatible = "fsl,mpc8560-fcc-enet",
203                                              "fsl,cpm2-fcc-enet";
204                                 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
205                                 local-mac-address = [ 00 00 00 00 00 00 ];
206                                 fsl,cpm-command = <0x16200300>;
207                                 interrupts = <33 8>;
208                                 interrupt-parent = <&cpmpic>;
209                                 phy-handle = <&phy2>;
210                         };
211
212                         enet3: ethernet@91340 {
213                                 device_type = "network";
214                                 compatible = "fsl,mpc8560-fcc-enet",
215                                              "fsl,cpm2-fcc-enet";
216                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
217                                 local-mac-address = [ 00 00 00 00 00 00 ];
218                                 fsl,cpm-command = <0x1a400300>;
219                                 interrupts = <34 8>;
220                                 interrupt-parent = <&cpmpic>;
221                                 phy-handle = <&phy3>;
222                         };
223                 };
224         };
225
226         pci0: pci@e0008000 {
227                 cell-index = <0>;
228                 #interrupt-cells = <1>;
229                 #size-cells = <2>;
230                 #address-cells = <3>;
231                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
232                 device_type = "pci";
233                 reg = <0xe0008000 0x1000>;
234                 clock-frequency = <66666666>;
235                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
236                 interrupt-map = <
237
238                                 /* IDSEL 0x2 */
239                                  0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
240                                  0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
241                                  0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
242                                  0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
243
244                                 /* IDSEL 0x3 */
245                                  0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
246                                  0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
247                                  0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
248                                  0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
249
250                                 /* IDSEL 0x4 */
251                                  0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
252                                  0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
253                                  0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
254                                  0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
255
256                                 /* IDSEL 0x5  */
257                                  0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
258                                  0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
259                                  0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
260                                  0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
261
262                                 /* IDSEL 12 */
263                                  0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
264                                  0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
265                                  0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
266                                  0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
267
268                                 /* IDSEL 13 */
269                                  0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
270                                  0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
271                                  0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
272                                  0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
273
274                                 /* IDSEL 14*/
275                                  0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
276                                  0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
277                                  0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
278                                  0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
279
280                                 /* IDSEL 15 */
281                                  0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
282                                  0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
283                                  0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
284                                  0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
285
286                                 /* IDSEL 18 */
287                                  0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
288                                  0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
289                                  0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
290                                  0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
291
292                                 /* IDSEL 19 */
293                                  0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
294                                  0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
295                                  0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
296                                  0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
297
298                                 /* IDSEL 20 */
299                                  0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
300                                  0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
301                                  0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
302                                  0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
303
304                                 /* IDSEL 21 */
305                                  0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
306                                  0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
307                                  0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
308                                  0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
309
310                 interrupt-parent = <&mpic>;
311                 interrupts = <24 2>;
312                 bus-range = <0 0>;
313                 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
314                           0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
315         };
316 };