2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
22 #include <linux/interrupt.h>
23 #include <linux/time.h>
24 #include <linux/sysdev.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/smp.h>
28 #include <linux/types.h>
29 #include <linux/profile.h>
30 #include <linux/timex.h>
31 #include <linux/notifier.h>
32 #include <linux/clocksource.h>
33 #include <linux/clockchips.h>
34 #include <linux/bootmem.h>
35 #include <asm/uaccess.h>
36 #include <asm/delay.h>
37 #include <asm/s390_ext.h>
38 #include <asm/div64.h>
40 #include <asm/irq_regs.h>
41 #include <asm/timer.h>
45 /* change this if you have some constant time drift */
46 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
47 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
49 /* The value of the TOD clock for 1.1.1970. */
50 #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
53 * Create a small time difference between the timer interrupts
54 * on the different cpus to avoid lock contention.
56 #define CPU_DEVIATION (smp_processor_id() << 12)
58 #define TICK_SIZE tick
60 static ext_int_info_t ext_int_info_cc;
61 static ext_int_info_t ext_int_etr_cc;
62 static u64 jiffies_timer_cc;
64 static DEFINE_PER_CPU(struct clock_event_device, comparators);
67 * Scheduler clock - returns current time in nanosec units.
69 unsigned long long sched_clock(void)
71 return ((get_clock_xt() - jiffies_timer_cc) * 125) >> 9;
75 * Monotonic_clock - returns # of nanoseconds passed since time_init()
77 unsigned long long monotonic_clock(void)
81 EXPORT_SYMBOL(monotonic_clock);
83 void tod_to_timeval(__u64 todval, struct timespec *xtime)
85 unsigned long long sec;
90 todval -= (sec * 1000000) << 12;
91 xtime->tv_nsec = ((todval * 1000) >> 12);
94 #ifdef CONFIG_PROFILING
95 #define s390_do_profile() profile_tick(CPU_PROFILING)
97 #define s390_do_profile() do { ; } while(0)
98 #endif /* CONFIG_PROFILING */
100 void clock_comparator_work(void)
102 struct clock_event_device *cd;
104 S390_lowcore.clock_comparator = -1ULL;
105 set_clock_comparator(S390_lowcore.clock_comparator);
106 cd = &__get_cpu_var(comparators);
107 cd->event_handler(cd);
112 * Fixup the clock comparator.
114 static void fixup_clock_comparator(unsigned long long delta)
116 /* If nobody is waiting there's nothing to fix. */
117 if (S390_lowcore.clock_comparator == -1ULL)
119 S390_lowcore.clock_comparator += delta;
120 set_clock_comparator(S390_lowcore.clock_comparator);
123 static int s390_next_event(unsigned long delta,
124 struct clock_event_device *evt)
126 S390_lowcore.clock_comparator = get_clock() + delta;
127 set_clock_comparator(S390_lowcore.clock_comparator);
131 static void s390_set_mode(enum clock_event_mode mode,
132 struct clock_event_device *evt)
137 * Set up lowcore and control register of the current cpu to
138 * enable TOD clock and clock comparator interrupts.
140 void init_cpu_timer(void)
142 struct clock_event_device *cd;
145 S390_lowcore.clock_comparator = -1ULL;
146 set_clock_comparator(S390_lowcore.clock_comparator);
148 cpu = smp_processor_id();
149 cd = &per_cpu(comparators, cpu);
150 cd->name = "comparator";
151 cd->features = CLOCK_EVT_FEAT_ONESHOT;
154 cd->min_delta_ns = 1;
155 cd->max_delta_ns = LONG_MAX;
157 cd->cpumask = cpumask_of_cpu(cpu);
158 cd->set_next_event = s390_next_event;
159 cd->set_mode = s390_set_mode;
161 clockevents_register_device(cd);
163 /* Enable clock comparator timer interrupt. */
166 /* Always allow the timing alert external interrupt. */
170 static void clock_comparator_interrupt(__u16 code)
172 if (S390_lowcore.clock_comparator == -1ULL)
173 set_clock_comparator(S390_lowcore.clock_comparator);
176 static void etr_timing_alert(struct etr_irq_parm *);
177 static void stp_timing_alert(struct stp_irq_parm *);
179 static void timing_alert_interrupt(__u16 code)
181 if (S390_lowcore.ext_params & 0x00c40000)
182 etr_timing_alert((struct etr_irq_parm *)
183 &S390_lowcore.ext_params);
184 if (S390_lowcore.ext_params & 0x00038000)
185 stp_timing_alert((struct stp_irq_parm *)
186 &S390_lowcore.ext_params);
189 static void etr_reset(void);
190 static void stp_reset(void);
193 * Get the TOD clock running.
195 static u64 __init reset_tod_clock(void)
201 if (store_clock(&time) == 0)
203 /* TOD clock not running. Set the clock to Unix Epoch. */
204 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
205 panic("TOD clock not operational.");
207 return TOD_UNIX_EPOCH;
210 static cycle_t read_tod_clock(void)
215 static struct clocksource clocksource_tod = {
218 .read = read_tod_clock,
222 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
227 * Initialize the TOD clock and the CPU timer of
230 void __init time_init(void)
234 init_timer_cc = reset_tod_clock();
235 jiffies_timer_cc = init_timer_cc - jiffies_64 * CLK_TICKS_PER_JIFFY;
238 tod_to_timeval(init_timer_cc - TOD_UNIX_EPOCH, &xtime);
239 set_normalized_timespec(&wall_to_monotonic,
240 -xtime.tv_sec, -xtime.tv_nsec);
242 /* request the clock comparator external interrupt */
243 if (register_early_external_interrupt(0x1004,
244 clock_comparator_interrupt,
245 &ext_int_info_cc) != 0)
246 panic("Couldn't request external interrupt 0x1004");
248 if (clocksource_register(&clocksource_tod) != 0)
249 panic("Could not register TOD clock source");
251 /* request the timing alert external interrupt */
252 if (register_early_external_interrupt(0x1406,
253 timing_alert_interrupt,
254 &ext_int_etr_cc) != 0)
255 panic("Couldn't request external interrupt 0x1406");
257 /* Enable TOD clock interrupts on the boot cpu. */
260 #ifdef CONFIG_VIRT_TIMER
266 * The time is "clock". old is what we think the time is.
267 * Adjust the value by a multiple of jiffies and add the delta to ntp.
268 * "delay" is an approximation how long the synchronization took. If
269 * the time correction is positive, then "delay" is subtracted from
270 * the time difference and only the remaining part is passed to ntp.
272 static unsigned long long adjust_time(unsigned long long old,
273 unsigned long long clock,
274 unsigned long long delay)
276 unsigned long long delta, ticks;
280 /* It is later than we thought. */
281 delta = ticks = clock - old;
282 delta = ticks = (delta < delay) ? 0 : delta - delay;
283 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
284 adjust.offset = ticks * (1000000 / HZ);
286 /* It is earlier than we thought. */
287 delta = ticks = old - clock;
288 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
290 adjust.offset = -ticks * (1000000 / HZ);
292 jiffies_timer_cc += delta;
293 if (adjust.offset != 0) {
294 printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
296 adjust.modes = ADJ_OFFSET_SINGLESHOT;
297 do_adjtimex(&adjust);
302 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
303 static unsigned long clock_sync_flags;
305 #define CLOCK_SYNC_HAS_ETR 0
306 #define CLOCK_SYNC_HAS_STP 1
307 #define CLOCK_SYNC_ETR 2
308 #define CLOCK_SYNC_STP 3
311 * The synchronous get_clock function. It will write the current clock
312 * value to the clock pointer and return 0 if the clock is in sync with
313 * the external time source. If the clock mode is local it will return
314 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
317 int get_sync_clock(unsigned long long *clock)
320 unsigned int sw0, sw1;
322 sw_ptr = &get_cpu_var(clock_sync_word);
323 sw0 = atomic_read(sw_ptr);
324 *clock = get_clock();
325 sw1 = atomic_read(sw_ptr);
326 put_cpu_var(clock_sync_sync);
327 if (sw0 == sw1 && (sw0 & 0x80000000U))
328 /* Success: time is in sync. */
330 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
331 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
333 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
334 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
338 EXPORT_SYMBOL(get_sync_clock);
341 * Make get_sync_clock return -EAGAIN.
343 static void disable_sync_clock(void *dummy)
345 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
347 * Clear the in-sync bit 2^31. All get_sync_clock calls will
348 * fail until the sync bit is turned back on. In addition
349 * increase the "sequence" counter to avoid the race of an
350 * etr event and the complete recovery against get_sync_clock.
352 atomic_clear_mask(0x80000000, sw_ptr);
357 * Make get_sync_clock return 0 again.
358 * Needs to be called from a context disabled for preemption.
360 static void enable_sync_clock(void)
362 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
363 atomic_set_mask(0x80000000, sw_ptr);
367 * External Time Reference (ETR) code.
369 static int etr_port0_online;
370 static int etr_port1_online;
371 static int etr_steai_available;
373 static int __init early_parse_etr(char *p)
375 if (strncmp(p, "off", 3) == 0)
376 etr_port0_online = etr_port1_online = 0;
377 else if (strncmp(p, "port0", 5) == 0)
378 etr_port0_online = 1;
379 else if (strncmp(p, "port1", 5) == 0)
380 etr_port1_online = 1;
381 else if (strncmp(p, "on", 2) == 0)
382 etr_port0_online = etr_port1_online = 1;
385 early_param("etr", early_parse_etr);
388 ETR_EVENT_PORT0_CHANGE,
389 ETR_EVENT_PORT1_CHANGE,
390 ETR_EVENT_PORT_ALERT,
391 ETR_EVENT_SYNC_CHECK,
392 ETR_EVENT_SWITCH_LOCAL,
397 * Valid bit combinations of the eacr register are (x = don't care):
398 * e0 e1 dp p0 p1 ea es sl
399 * 0 0 x 0 0 0 0 0 initial, disabled state
400 * 0 0 x 0 1 1 0 0 port 1 online
401 * 0 0 x 1 0 1 0 0 port 0 online
402 * 0 0 x 1 1 1 0 0 both ports online
403 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
404 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
405 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
406 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
407 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
408 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
409 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
410 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
411 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
412 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
413 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
414 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
415 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
416 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
417 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
418 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
420 static struct etr_eacr etr_eacr;
421 static u64 etr_tolec; /* time of last eacr update */
422 static struct etr_aib etr_port0;
423 static int etr_port0_uptodate;
424 static struct etr_aib etr_port1;
425 static int etr_port1_uptodate;
426 static unsigned long etr_events;
427 static struct timer_list etr_timer;
429 static void etr_timeout(unsigned long dummy);
430 static void etr_work_fn(struct work_struct *work);
431 static DECLARE_WORK(etr_work, etr_work_fn);
434 * Reset ETR attachment.
436 static void etr_reset(void)
438 etr_eacr = (struct etr_eacr) {
439 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
440 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
442 if (etr_setr(&etr_eacr) == 0) {
443 etr_tolec = get_clock();
444 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
445 } else if (etr_port0_online || etr_port1_online) {
446 printk(KERN_WARNING "Running on non ETR capable "
447 "machine, only local mode available.\n");
448 etr_port0_online = etr_port1_online = 0;
452 static int __init etr_init(void)
456 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
458 /* Check if this machine has the steai instruction. */
459 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
460 etr_steai_available = 1;
461 setup_timer(&etr_timer, etr_timeout, 0UL);
462 if (etr_port0_online) {
463 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
464 schedule_work(&etr_work);
466 if (etr_port1_online) {
467 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
468 schedule_work(&etr_work);
473 arch_initcall(etr_init);
476 * Two sorts of ETR machine checks. The architecture reads:
477 * "When a machine-check niterruption occurs and if a switch-to-local or
478 * ETR-sync-check interrupt request is pending but disabled, this pending
479 * disabled interruption request is indicated and is cleared".
480 * Which means that we can get etr_switch_to_local events from the machine
481 * check handler although the interruption condition is disabled. Lovely..
485 * Switch to local machine check. This is called when the last usable
486 * ETR port goes inactive. After switch to local the clock is not in sync.
488 void etr_switch_to_local(void)
492 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
493 disable_sync_clock(NULL);
494 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
495 schedule_work(&etr_work);
499 * ETR sync check machine check. This is called when the ETR OTE and the
500 * local clock OTE are farther apart than the ETR sync check tolerance.
501 * After a ETR sync check the clock is not in sync. The machine check
502 * is broadcasted to all cpus at the same time.
504 void etr_sync_check(void)
508 if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
509 disable_sync_clock(NULL);
510 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
511 schedule_work(&etr_work);
515 * ETR timing alert. There are two causes:
516 * 1) port state change, check the usability of the port
517 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
518 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
519 * or ETR-data word 4 (edf4) has changed.
521 static void etr_timing_alert(struct etr_irq_parm *intparm)
524 /* ETR port 0 state change. */
525 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
527 /* ETR port 1 state change. */
528 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
531 * ETR port alert on either port 0, 1 or both.
532 * Both ports are not up-to-date now.
534 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
535 schedule_work(&etr_work);
538 static void etr_timeout(unsigned long dummy)
540 set_bit(ETR_EVENT_UPDATE, &etr_events);
541 schedule_work(&etr_work);
545 * Check if the etr mode is pss.
547 static inline int etr_mode_is_pps(struct etr_eacr eacr)
549 return eacr.es && !eacr.sl;
553 * Check if the etr mode is etr.
555 static inline int etr_mode_is_etr(struct etr_eacr eacr)
557 return eacr.es && eacr.sl;
561 * Check if the port can be used for TOD synchronization.
562 * For PPS mode the port has to receive OTEs. For ETR mode
563 * the port has to receive OTEs, the ETR stepping bit has to
564 * be zero and the validity bits for data frame 1, 2, and 3
567 static int etr_port_valid(struct etr_aib *aib, int port)
571 /* Check that this port is receiving OTEs. */
575 psc = port ? aib->esw.psc1 : aib->esw.psc0;
576 if (psc == etr_lpsc_pps_mode)
578 if (psc == etr_lpsc_operational_step)
579 return !aib->esw.y && aib->slsw.v1 &&
580 aib->slsw.v2 && aib->slsw.v3;
585 * Check if two ports are on the same network.
587 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
589 // FIXME: any other fields we have to compare?
590 return aib1->edf1.net_id == aib2->edf1.net_id;
594 * Wrapper for etr_stei that converts physical port states
595 * to logical port states to be consistent with the output
596 * of stetr (see etr_psc vs. etr_lpsc).
598 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
600 BUG_ON(etr_steai(aib, func) != 0);
601 /* Convert port state to logical port state. */
602 if (aib->esw.psc0 == 1)
604 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
606 if (aib->esw.psc1 == 1)
608 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
613 * Check if the aib a2 is still connected to the same attachment as
614 * aib a1, the etv values differ by one and a2 is valid.
616 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
618 int state_a1, state_a2;
620 /* Paranoia check: e0/e1 should better be the same. */
621 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
622 a1->esw.eacr.e1 != a2->esw.eacr.e1)
625 /* Still connected to the same etr ? */
626 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
627 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
628 if (state_a1 == etr_lpsc_operational_step) {
629 if (state_a2 != etr_lpsc_operational_step ||
630 a1->edf1.net_id != a2->edf1.net_id ||
631 a1->edf1.etr_id != a2->edf1.etr_id ||
632 a1->edf1.etr_pn != a2->edf1.etr_pn)
634 } else if (state_a2 != etr_lpsc_pps_mode)
637 /* The ETV value of a2 needs to be ETV of a1 + 1. */
638 if (a1->edf2.etv + 1 != a2->edf2.etv)
641 if (!etr_port_valid(a2, p))
647 struct clock_sync_data {
649 unsigned long long fixup_cc;
652 static void clock_sync_cpu_start(void *dummy)
654 struct clock_sync_data *sync = dummy;
658 * This looks like a busy wait loop but it isn't. etr_sync_cpus
659 * is called on all other cpus while the TOD clocks is stopped.
660 * __udelay will stop the cpu on an enabled wait psw until the
661 * TOD is running again.
663 while (sync->in_sync == 0) {
666 * A different cpu changes *in_sync. Therefore use
667 * barrier() to force memory access.
671 if (sync->in_sync != 1)
672 /* Didn't work. Clear per-cpu in sync bit again. */
673 disable_sync_clock(NULL);
675 * This round of TOD syncing is done. Set the clock comparator
676 * to the next tick and let the processor continue.
678 fixup_clock_comparator(sync->fixup_cc);
681 static void clock_sync_cpu_end(void *dummy)
686 * Sync the TOD clock using the port refered to by aibp. This port
687 * has to be enabled and the other port has to be disabled. The
688 * last eacr update has to be more than 1.6 seconds in the past.
690 static int etr_sync_clock(struct etr_aib *aib, int port)
692 struct etr_aib *sync_port;
693 struct clock_sync_data etr_sync;
694 unsigned long long clock, old_clock, delay, delta;
698 /* Check if the current aib is adjacent to the sync port aib. */
699 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
700 follows = etr_aib_follows(sync_port, aib, port);
701 memcpy(sync_port, aib, sizeof(*aib));
706 * Catch all other cpus and make them wait until we have
707 * successfully synced the clock. smp_call_function will
708 * return after all other cpus are in etr_sync_cpu_start.
710 memset(&etr_sync, 0, sizeof(etr_sync));
712 smp_call_function(clock_sync_cpu_start, &etr_sync, 0);
716 /* Set clock to next OTE. */
717 __ctl_set_bit(14, 21);
718 __ctl_set_bit(0, 29);
719 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
720 old_clock = get_clock();
721 if (set_clock(clock) == 0) {
722 __udelay(1); /* Wait for the clock to start. */
723 __ctl_clear_bit(0, 29);
724 __ctl_clear_bit(14, 21);
726 /* Adjust Linux timing variables. */
727 delay = (unsigned long long)
728 (aib->edf2.etv - sync_port->edf2.etv) << 32;
729 delta = adjust_time(old_clock, clock, delay);
730 etr_sync.fixup_cc = delta;
731 fixup_clock_comparator(delta);
732 /* Verify that the clock is properly set. */
733 if (!etr_aib_follows(sync_port, aib, port)) {
735 disable_sync_clock(NULL);
736 etr_sync.in_sync = -EAGAIN;
739 etr_sync.in_sync = 1;
743 /* Could not set the clock ?!? */
744 __ctl_clear_bit(0, 29);
745 __ctl_clear_bit(14, 21);
746 disable_sync_clock(NULL);
747 etr_sync.in_sync = -EAGAIN;
751 smp_call_function(clock_sync_cpu_end, NULL, 0);
757 * Handle the immediate effects of the different events.
758 * The port change event is used for online/offline changes.
760 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
762 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
764 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
765 eacr.es = eacr.sl = 0;
766 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
767 etr_port0_uptodate = etr_port1_uptodate = 0;
769 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
772 * Port change of an enabled port. We have to
773 * assume that this can have caused an stepping
776 etr_tolec = get_clock();
777 eacr.p0 = etr_port0_online;
780 etr_port0_uptodate = 0;
782 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
785 * Port change of an enabled port. We have to
786 * assume that this can have caused an stepping
789 etr_tolec = get_clock();
790 eacr.p1 = etr_port1_online;
793 etr_port1_uptodate = 0;
795 clear_bit(ETR_EVENT_UPDATE, &etr_events);
800 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
801 * one of the ports needs an update.
803 static void etr_set_tolec_timeout(unsigned long long now)
805 unsigned long micros;
807 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
808 (!etr_eacr.p1 || etr_port1_uptodate))
810 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
811 micros = (micros > 1600000) ? 0 : 1600000 - micros;
812 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
816 * Set up a time that expires after 1/2 second.
818 static void etr_set_sync_timeout(void)
820 mod_timer(&etr_timer, jiffies + HZ/2);
824 * Update the aib information for one or both ports.
826 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
827 struct etr_eacr eacr)
829 /* With both ports disabled the aib information is useless. */
830 if (!eacr.e0 && !eacr.e1)
833 /* Update port0 or port1 with aib stored in etr_work_fn. */
834 if (aib->esw.q == 0) {
835 /* Information for port 0 stored. */
836 if (eacr.p0 && !etr_port0_uptodate) {
838 if (etr_port0_online)
839 etr_port0_uptodate = 1;
842 /* Information for port 1 stored. */
843 if (eacr.p1 && !etr_port1_uptodate) {
845 if (etr_port0_online)
846 etr_port1_uptodate = 1;
851 * Do not try to get the alternate port aib if the clock
852 * is not in sync yet.
854 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
858 * If steai is available we can get the information about
859 * the other port immediately. If only stetr is available the
860 * data-port bit toggle has to be used.
862 if (etr_steai_available) {
863 if (eacr.p0 && !etr_port0_uptodate) {
864 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
865 etr_port0_uptodate = 1;
867 if (eacr.p1 && !etr_port1_uptodate) {
868 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
869 etr_port1_uptodate = 1;
873 * One port was updated above, if the other
874 * port is not uptodate toggle dp bit.
876 if ((eacr.p0 && !etr_port0_uptodate) ||
877 (eacr.p1 && !etr_port1_uptodate))
886 * Write new etr control register if it differs from the current one.
887 * Return 1 if etr_tolec has been updated as well.
889 static void etr_update_eacr(struct etr_eacr eacr)
893 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
894 /* No change, return. */
897 * The disable of an active port of the change of the data port
898 * bit can/will cause a change in the data port.
900 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
901 (etr_eacr.dp ^ eacr.dp) != 0;
905 etr_tolec = get_clock();
909 * ETR tasklet. In this function you'll find the main logic. In
910 * particular this is the only function that calls etr_update_eacr(),
911 * it "controls" the etr control register.
913 static void etr_work_fn(struct work_struct *work)
915 unsigned long long now;
916 struct etr_eacr eacr;
920 /* Create working copy of etr_eacr. */
923 /* Check for the different events and their immediate effects. */
924 eacr = etr_handle_events(eacr);
926 /* Check if ETR is supposed to be active. */
927 eacr.ea = eacr.p0 || eacr.p1;
929 /* Both ports offline. Reset everything. */
930 eacr.dp = eacr.es = eacr.sl = 0;
931 on_each_cpu(disable_sync_clock, NULL, 1);
932 del_timer_sync(&etr_timer);
933 etr_update_eacr(eacr);
934 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
938 /* Store aib to get the current ETR status word. */
939 BUG_ON(etr_stetr(&aib) != 0);
940 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
944 * Update the port information if the last stepping port change
945 * or data port change is older than 1.6 seconds.
947 if (now >= etr_tolec + (1600000 << 12))
948 eacr = etr_handle_update(&aib, eacr);
951 * Select ports to enable. The prefered synchronization mode is PPS.
952 * If a port can be enabled depends on a number of things:
953 * 1) The port needs to be online and uptodate. A port is not
954 * disabled just because it is not uptodate, but it is only
955 * enabled if it is uptodate.
956 * 2) The port needs to have the same mode (pps / etr).
957 * 3) The port needs to be usable -> etr_port_valid() == 1
958 * 4) To enable the second port the clock needs to be in sync.
959 * 5) If both ports are useable and are ETR ports, the network id
960 * has to be the same.
961 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
963 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
966 if (!etr_mode_is_pps(etr_eacr))
968 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
970 // FIXME: uptodate checks ?
971 else if (etr_port0_uptodate && etr_port1_uptodate)
973 sync_port = (etr_port0_uptodate &&
974 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
975 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
979 if (!etr_mode_is_pps(etr_eacr))
981 sync_port = (etr_port1_uptodate &&
982 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
983 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
986 if (!etr_mode_is_etr(etr_eacr))
988 if (!eacr.es || !eacr.p1 ||
989 aib.esw.psc1 != etr_lpsc_operational_alt)
991 else if (etr_port0_uptodate && etr_port1_uptodate &&
992 etr_compare_network(&etr_port0, &etr_port1))
994 sync_port = (etr_port0_uptodate &&
995 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
996 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1000 if (!etr_mode_is_etr(etr_eacr))
1002 sync_port = (etr_port1_uptodate &&
1003 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1005 /* Both ports not usable. */
1006 eacr.es = eacr.sl = 0;
1008 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1011 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1015 * If the clock is in sync just update the eacr and return.
1016 * If there is no valid sync port wait for a port update.
1018 if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
1019 eacr.es || sync_port < 0) {
1020 etr_update_eacr(eacr);
1021 etr_set_tolec_timeout(now);
1026 * Prepare control register for clock syncing
1027 * (reset data port bit, set sync check control.
1033 * Update eacr and try to synchronize the clock. If the update
1034 * of eacr caused a stepping port switch (or if we have to
1035 * assume that a stepping port switch has occured) or the
1036 * clock syncing failed, reset the sync check control bit
1037 * and set up a timer to try again after 0.5 seconds
1039 etr_update_eacr(eacr);
1040 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1041 if (now < etr_tolec + (1600000 << 12) ||
1042 etr_sync_clock(&aib, sync_port) != 0) {
1043 /* Sync failed. Try again in 1/2 second. */
1045 etr_update_eacr(eacr);
1046 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1047 etr_set_sync_timeout();
1049 etr_set_tolec_timeout(now);
1053 * Sysfs interface functions
1055 static struct sysdev_class etr_sysclass = {
1059 static struct sys_device etr_port0_dev = {
1061 .cls = &etr_sysclass,
1064 static struct sys_device etr_port1_dev = {
1066 .cls = &etr_sysclass,
1070 * ETR class attributes
1072 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1074 return sprintf(buf, "%i\n", etr_port0.esw.p);
1077 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1079 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1083 if (etr_mode_is_pps(etr_eacr))
1085 else if (etr_mode_is_etr(etr_eacr))
1089 return sprintf(buf, "%s\n", mode_str);
1092 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1095 * ETR port attributes
1097 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1099 if (dev == &etr_port0_dev)
1100 return etr_port0_online ? &etr_port0 : NULL;
1102 return etr_port1_online ? &etr_port1 : NULL;
1105 static ssize_t etr_online_show(struct sys_device *dev,
1106 struct sysdev_attribute *attr,
1109 unsigned int online;
1111 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1112 return sprintf(buf, "%i\n", online);
1115 static ssize_t etr_online_store(struct sys_device *dev,
1116 struct sysdev_attribute *attr,
1117 const char *buf, size_t count)
1121 value = simple_strtoul(buf, NULL, 0);
1122 if (value != 0 && value != 1)
1124 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1126 if (dev == &etr_port0_dev) {
1127 if (etr_port0_online == value)
1128 return count; /* Nothing to do. */
1129 etr_port0_online = value;
1130 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1131 schedule_work(&etr_work);
1133 if (etr_port1_online == value)
1134 return count; /* Nothing to do. */
1135 etr_port1_online = value;
1136 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1137 schedule_work(&etr_work);
1142 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1144 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1145 struct sysdev_attribute *attr,
1148 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1149 etr_eacr.e0 : etr_eacr.e1);
1152 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1154 static ssize_t etr_mode_code_show(struct sys_device *dev,
1155 struct sysdev_attribute *attr, char *buf)
1157 if (!etr_port0_online && !etr_port1_online)
1158 /* Status word is not uptodate if both ports are offline. */
1160 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1161 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1164 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1166 static ssize_t etr_untuned_show(struct sys_device *dev,
1167 struct sysdev_attribute *attr, char *buf)
1169 struct etr_aib *aib = etr_aib_from_dev(dev);
1171 if (!aib || !aib->slsw.v1)
1173 return sprintf(buf, "%i\n", aib->edf1.u);
1176 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1178 static ssize_t etr_network_id_show(struct sys_device *dev,
1179 struct sysdev_attribute *attr, char *buf)
1181 struct etr_aib *aib = etr_aib_from_dev(dev);
1183 if (!aib || !aib->slsw.v1)
1185 return sprintf(buf, "%i\n", aib->edf1.net_id);
1188 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1190 static ssize_t etr_id_show(struct sys_device *dev,
1191 struct sysdev_attribute *attr, char *buf)
1193 struct etr_aib *aib = etr_aib_from_dev(dev);
1195 if (!aib || !aib->slsw.v1)
1197 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1200 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1202 static ssize_t etr_port_number_show(struct sys_device *dev,
1203 struct sysdev_attribute *attr, char *buf)
1205 struct etr_aib *aib = etr_aib_from_dev(dev);
1207 if (!aib || !aib->slsw.v1)
1209 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1212 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1214 static ssize_t etr_coupled_show(struct sys_device *dev,
1215 struct sysdev_attribute *attr, char *buf)
1217 struct etr_aib *aib = etr_aib_from_dev(dev);
1219 if (!aib || !aib->slsw.v3)
1221 return sprintf(buf, "%i\n", aib->edf3.c);
1224 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1226 static ssize_t etr_local_time_show(struct sys_device *dev,
1227 struct sysdev_attribute *attr, char *buf)
1229 struct etr_aib *aib = etr_aib_from_dev(dev);
1231 if (!aib || !aib->slsw.v3)
1233 return sprintf(buf, "%i\n", aib->edf3.blto);
1236 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1238 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1239 struct sysdev_attribute *attr, char *buf)
1241 struct etr_aib *aib = etr_aib_from_dev(dev);
1243 if (!aib || !aib->slsw.v3)
1245 return sprintf(buf, "%i\n", aib->edf3.buo);
1248 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1250 static struct sysdev_attribute *etr_port_attributes[] = {
1252 &attr_stepping_control,
1264 static int __init etr_register_port(struct sys_device *dev)
1266 struct sysdev_attribute **attr;
1269 rc = sysdev_register(dev);
1272 for (attr = etr_port_attributes; *attr; attr++) {
1273 rc = sysdev_create_file(dev, *attr);
1279 for (; attr >= etr_port_attributes; attr--)
1280 sysdev_remove_file(dev, *attr);
1281 sysdev_unregister(dev);
1286 static void __init etr_unregister_port(struct sys_device *dev)
1288 struct sysdev_attribute **attr;
1290 for (attr = etr_port_attributes; *attr; attr++)
1291 sysdev_remove_file(dev, *attr);
1292 sysdev_unregister(dev);
1295 static int __init etr_init_sysfs(void)
1299 rc = sysdev_class_register(&etr_sysclass);
1302 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1304 goto out_unreg_class;
1305 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1307 goto out_remove_stepping_port;
1308 rc = etr_register_port(&etr_port0_dev);
1310 goto out_remove_stepping_mode;
1311 rc = etr_register_port(&etr_port1_dev);
1313 goto out_remove_port0;
1317 etr_unregister_port(&etr_port0_dev);
1318 out_remove_stepping_mode:
1319 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1320 out_remove_stepping_port:
1321 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1323 sysdev_class_unregister(&etr_sysclass);
1328 device_initcall(etr_init_sysfs);
1331 * Server Time Protocol (STP) code.
1333 static int stp_online;
1334 static struct stp_sstpi stp_info;
1335 static void *stp_page;
1337 static void stp_work_fn(struct work_struct *work);
1338 static DECLARE_WORK(stp_work, stp_work_fn);
1340 static int __init early_parse_stp(char *p)
1342 if (strncmp(p, "off", 3) == 0)
1344 else if (strncmp(p, "on", 2) == 0)
1348 early_param("stp", early_parse_stp);
1351 * Reset STP attachment.
1353 static void __init stp_reset(void)
1357 stp_page = alloc_bootmem_pages(PAGE_SIZE);
1358 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1360 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1361 else if (stp_online) {
1362 printk(KERN_WARNING "Running on non STP capable machine.\n");
1363 free_bootmem((unsigned long) stp_page, PAGE_SIZE);
1369 static int __init stp_init(void)
1371 if (test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags) && stp_online)
1372 schedule_work(&stp_work);
1376 arch_initcall(stp_init);
1379 * STP timing alert. There are three causes:
1380 * 1) timing status change
1381 * 2) link availability change
1382 * 3) time control parameter change
1383 * In all three cases we are only interested in the clock source state.
1384 * If a STP clock source is now available use it.
1386 static void stp_timing_alert(struct stp_irq_parm *intparm)
1388 if (intparm->tsc || intparm->lac || intparm->tcpc)
1389 schedule_work(&stp_work);
1393 * STP sync check machine check. This is called when the timing state
1394 * changes from the synchronized state to the unsynchronized state.
1395 * After a STP sync check the clock is not in sync. The machine check
1396 * is broadcasted to all cpus at the same time.
1398 void stp_sync_check(void)
1400 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1402 disable_sync_clock(NULL);
1403 schedule_work(&stp_work);
1407 * STP island condition machine check. This is called when an attached
1408 * server attempts to communicate over an STP link and the servers
1409 * have matching CTN ids and have a valid stratum-1 configuration
1410 * but the configurations do not match.
1412 void stp_island_check(void)
1414 if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
1416 disable_sync_clock(NULL);
1417 schedule_work(&stp_work);
1421 * STP tasklet. Check for the STP state and take over the clock
1422 * synchronization if the STP clock source is usable.
1424 static void stp_work_fn(struct work_struct *work)
1426 struct clock_sync_data stp_sync;
1427 unsigned long long old_clock, delta;
1431 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1435 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1439 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1440 if (rc || stp_info.c == 0)
1444 * Catch all other cpus and make them wait until we have
1445 * successfully synced the clock. smp_call_function will
1446 * return after all other cpus are in clock_sync_cpu_start.
1448 memset(&stp_sync, 0, sizeof(stp_sync));
1450 smp_call_function(clock_sync_cpu_start, &stp_sync, 0);
1451 local_irq_disable();
1452 enable_sync_clock();
1454 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1455 if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
1456 schedule_work(&etr_work);
1459 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1460 stp_info.todoff[2] || stp_info.todoff[3] ||
1461 stp_info.tmd != 2) {
1462 old_clock = get_clock();
1463 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1465 delta = adjust_time(old_clock, get_clock(), 0);
1466 fixup_clock_comparator(delta);
1467 rc = chsc_sstpi(stp_page, &stp_info,
1468 sizeof(struct stp_sstpi));
1469 if (rc == 0 && stp_info.tmd != 2)
1474 disable_sync_clock(NULL);
1475 stp_sync.in_sync = -EAGAIN;
1476 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1477 if (etr_port0_online || etr_port1_online)
1478 schedule_work(&etr_work);
1480 stp_sync.in_sync = 1;
1483 smp_call_function(clock_sync_cpu_end, NULL, 0);
1488 * STP class sysfs interface functions
1490 static struct sysdev_class stp_sysclass = {
1494 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1498 return sprintf(buf, "%016llx\n",
1499 *(unsigned long long *) stp_info.ctnid);
1502 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1504 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1508 return sprintf(buf, "%i\n", stp_info.ctn);
1511 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1513 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1515 if (!stp_online || !(stp_info.vbits & 0x2000))
1517 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1520 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1522 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1524 if (!stp_online || !(stp_info.vbits & 0x8000))
1526 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1529 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1531 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1535 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1538 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1540 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1542 if (!stp_online || !(stp_info.vbits & 0x0800))
1544 return sprintf(buf, "%i\n", (int) stp_info.tto);
1547 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1549 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1551 if (!stp_online || !(stp_info.vbits & 0x4000))
1553 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1556 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1557 stp_time_zone_offset_show, NULL);
1559 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1563 return sprintf(buf, "%i\n", stp_info.tmd);
1566 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1568 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1572 return sprintf(buf, "%i\n", stp_info.tst);
1575 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1577 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1579 return sprintf(buf, "%i\n", stp_online);
1582 static ssize_t stp_online_store(struct sysdev_class *class,
1583 const char *buf, size_t count)
1587 value = simple_strtoul(buf, NULL, 0);
1588 if (value != 0 && value != 1)
1590 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1593 schedule_work(&stp_work);
1598 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1599 * stp/online but attr_online already exists in this file ..
1601 static struct sysdev_class_attribute attr_stp_online = {
1602 .attr = { .name = "online", .mode = 0600 },
1603 .show = stp_online_show,
1604 .store = stp_online_store,
1607 static struct sysdev_class_attribute *stp_attributes[] = {
1615 &attr_time_zone_offset,
1621 static int __init stp_init_sysfs(void)
1623 struct sysdev_class_attribute **attr;
1626 rc = sysdev_class_register(&stp_sysclass);
1629 for (attr = stp_attributes; *attr; attr++) {
1630 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1636 for (; attr >= stp_attributes; attr--)
1637 sysdev_class_remove_file(&stp_sysclass, *attr);
1638 sysdev_class_unregister(&stp_sysclass);
1643 device_initcall(stp_init_sysfs);