1 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h,v 1.51 2005/04/16 23:57:26 mvojkovi Exp $ */
3 #ifndef __NV_STRUCT_H__
4 #define __NV_STRUCT_H__
6 #include "colormapst.h"
9 #include "xf86Cursor.h"
10 #include "xf86int10.h"
13 #define _XF86DRI_SERVER_
17 #include "nouveau_drm.h"
19 #error "This driver requires a DRI-enabled X server"
22 #define NV_ARCH_04 0x04
23 #define NV_ARCH_10 0x10
24 #define NV_ARCH_20 0x20
25 #define NV_ARCH_30 0x30
26 #define NV_ARCH_40 0x40
28 #define CHIPSET_NV04 0x0020
29 #define CHIPSET_NV10 0x0100
30 #define CHIPSET_NV11 0x0110
31 #define CHIPSET_NV15 0x0150
32 #define CHIPSET_NV17 0x0170
33 #define CHIPSET_NV18 0x0180
34 #define CHIPSET_NFORCE 0x01A0
35 #define CHIPSET_NFORCE2 0x01F0
36 #define CHIPSET_NV20 0x0200
37 #define CHIPSET_NV25 0x0250
38 #define CHIPSET_NV28 0x0280
39 #define CHIPSET_NV30 0x0300
40 #define CHIPSET_NV31 0x0310
41 #define CHIPSET_NV34 0x0320
42 #define CHIPSET_NV35 0x0330
43 #define CHIPSET_NV36 0x0340
44 #define CHIPSET_NV40 0x0040
45 #define CHIPSET_NV41 0x00C0
46 #define CHIPSET_NV43 0x0140
47 #define CHIPSET_NV44 0x0160
48 #define CHIPSET_NV44A 0x0220
49 #define CHIPSET_NV45 0x0210
50 #define CHIPSET_MISC_BRIDGED 0x00F0
51 #define CHIPSET_G70 0x0090
52 #define CHIPSET_G71 0x0290
53 #define CHIPSET_G72 0x01D0
54 #define CHIPSET_G73 0x0390
55 // integrated GeForces (6100, 6150)
56 #define CHIPSET_C51 0x0240
57 // variant of C51, seems based on a G70 design
58 #define CHIPSET_C512 0x03D0
59 #define CHIPSET_G73_BRIDGED 0x02E0
62 #define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
63 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
64 #define SetBF(mask,value) ((value) << (0?mask))
65 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
66 #define SetBitField(value,from,to) SetBF(to, GetBF(value,from))
67 #define SetBit(n) (1<<(n))
68 #define Set8Bits(value) ((value)&0xff)
78 typedef struct _riva_hw_state
115 } RIVA_HW_STATE, *NVRegPtr;
124 typedef struct _NVRec *NVPtr;
125 typedef struct _NVRec {
126 RIVA_HW_STATE SavedReg;
127 RIVA_HW_STATE ModeReg;
128 RIVA_HW_STATE *CurrentState;
137 unsigned long VRAMPhysical;
138 unsigned long VRAMPhysicalSize;
141 NVAllocRec * ScratchBuffer;
146 unsigned char * ShadowPtr;
148 CARD32 MinVClockFreqKHz;
149 CARD32 MaxVClockFreqKHz;
150 CARD32 CrystalFreqKHz;
151 CARD32 RamAmountKBytes;
153 unsigned long drm_agp_handle;
154 unsigned long drm_agp_map_handle;
155 unsigned char *agpScratch;
156 unsigned long agpScratchPhysical;
157 unsigned long agpScratchSize;
159 volatile CARD32 *REGS;
160 volatile CARD32 *PCRTC0;
161 volatile CARD32 *PCRTC;
162 volatile CARD32 *PRAMDAC0;
163 volatile CARD32 *PFB;
164 volatile CARD32 *PFIFO;
165 volatile CARD32 *PGRAPH;
166 volatile CARD32 *PEXTDEV;
167 volatile CARD32 *PTIMER;
168 volatile CARD32 *PMC;
169 volatile CARD32 *PRAMIN;
170 volatile CARD32 *FIFO;
171 volatile CARD32 *CURSOR;
172 volatile CARD8 *PCIO0;
173 volatile CARD8 *PCIO;
174 volatile CARD8 *PVIO;
175 volatile CARD8 *PDIO0;
176 volatile CARD8 *PDIO;
177 volatile CARD32 *PRAMDAC;
178 volatile CARD8 *PROM;
180 volatile CARD8 *PCIO1;
181 volatile CARD8 *PDIO1;
182 volatile CARD32 *PRAMDAC1;
183 volatile CARD32 *PCRTC1;
185 volatile CARD32 *RAMHT;
189 XAAInfoRecPtr AccelInfoRec;
190 ExaDriverPtr EXADriverPtr;
192 xf86CursorInfoPtr CursorInfoRec;
193 void (*PointerMoved)(int index, int x, int y);
194 ScreenBlockHandlerProcPtr BlockHandler;
195 CloseScreenProcPtr CloseScreen;
197 NVFBLayout CurrentLayout;
200 CARD32 curImage[256];
203 xf86Int10InfoPtr pInt;
204 void (*VideoTimerCallback)(ScrnInfoPtr, Time);
205 void (*DMAKickoffCallback)(NVPtr pNv);
206 XF86VideoAdaptorPtr overlayAdaptor;
207 XF86VideoAdaptorPtr blitAdaptor;
214 OptionInfoPtr Options;
216 unsigned char DDCBase;
231 drm_nouveau_fifo_init_t fifo;
239 Bool WaitVSyncPossible;
240 Bool BlendingPossible;
247 #define NVPTR(p) ((NVPtr)((p)->driverPrivate))
249 #endif /* __NV_STRUCT_H__ */