1 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_type.h,v 1.51 2005/04/16 23:57:26 mvojkovi Exp $ */
3 #ifndef __NV_STRUCT_H__
4 #define __NV_STRUCT_H__
6 #include "colormapst.h"
9 #include "xf86Cursor.h"
10 #include "xf86int10.h"
13 #define _XF86DRI_SERVER_
16 #include "nouveau_drm.h"
18 #error "This driver requires a DRI-enabled X server"
21 #define NV_ARCH_04 0x04
22 #define NV_ARCH_10 0x10
23 #define NV_ARCH_20 0x20
24 #define NV_ARCH_30 0x30
25 #define NV_ARCH_40 0x40
27 #define CHIPSET_NV04 0x0020
28 #define CHIPSET_NV10 0x0100
29 #define CHIPSET_NV11 0x0110
30 #define CHIPSET_NV15 0x0150
31 #define CHIPSET_NV17 0x0170
32 #define CHIPSET_NV18 0x0180
33 #define CHIPSET_NFORCE 0x01A0
34 #define CHIPSET_NFORCE2 0x01F0
35 #define CHIPSET_NV20 0x0200
36 #define CHIPSET_NV25 0x0250
37 #define CHIPSET_NV28 0x0280
38 #define CHIPSET_NV30 0x0300
39 #define CHIPSET_NV31 0x0310
40 #define CHIPSET_NV34 0x0320
41 #define CHIPSET_NV35 0x0330
42 #define CHIPSET_NV36 0x0340
43 #define CHIPSET_NV40 0x0040
44 #define CHIPSET_NV41 0x00C0
45 #define CHIPSET_NV43 0x0140
46 #define CHIPSET_NV44 0x0160
47 #define CHIPSET_NV44A 0x0220
48 #define CHIPSET_NV45 0x0210
49 #define CHIPSET_PCIE 0x00F0
50 #define CHIPSET_G70 0x0090
51 #define CHIPSET_G71 0x0290
52 #define CHIPSET_G72 0x01D0
53 #define CHIPSET_G73 0x0390
54 #define CHIPSET_C51 0x0240
57 #define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
58 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
59 #define SetBF(mask,value) ((value) << (0?mask))
60 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
61 #define SetBitField(value,from,to) SetBF(to, GetBF(value,from))
62 #define SetBit(n) (1<<(n))
63 #define Set8Bits(value) ((value)&0xff)
73 typedef struct _riva_hw_state
110 } RIVA_HW_STATE, *NVRegPtr;
113 typedef struct _NVRec *NVPtr;
114 typedef struct _NVRec {
115 RIVA_HW_STATE SavedReg;
116 RIVA_HW_STATE ModeReg;
117 RIVA_HW_STATE *CurrentState;
127 unsigned long FbAddress;
128 unsigned char * FbBase;
129 unsigned char * FbStart;
132 CARD32 ScratchBufferSize;
133 CARD32 ScratchBufferStart;
138 unsigned char * ShadowPtr;
140 CARD32 MinVClockFreqKHz;
141 CARD32 MaxVClockFreqKHz;
142 CARD32 CrystalFreqKHz;
143 CARD32 RamAmountKBytes;
145 unsigned long drm_agp_handle;
146 unsigned long drm_agp_map_handle;
147 unsigned char *agpScratch;
148 unsigned long agpScratchPhysical;
149 unsigned long agpScratchSize;
152 volatile U032 *PCRTC0;
153 volatile U032 *PCRTC;
154 volatile U032 *PRAMDAC0;
156 volatile U032 *PFIFO;
157 volatile U032 *PGRAPH;
158 volatile U032 *PEXTDEV;
159 volatile U032 *PTIMER;
161 volatile U032 *PRAMIN;
163 volatile U032 *CURSOR;
164 volatile U008 *PCIO0;
167 volatile U008 *PDIO0;
169 volatile U032 *PRAMDAC;
172 volatile U032 *RAMHT;
175 XAAInfoRecPtr AccelInfoRec;
176 ExaDriverPtr EXADriverPtr;
178 xf86CursorInfoPtr CursorInfoRec;
182 int DGAViewportStatus;
183 void (*PointerMoved)(int index, int x, int y);
184 ScreenBlockHandlerProcPtr BlockHandler;
185 CloseScreenProcPtr CloseScreen;
188 NVFBLayout CurrentLayout;
191 CARD32 curImage[256];
194 xf86Int10InfoPtr pInt;
195 void (*VideoTimerCallback)(ScrnInfoPtr, Time);
196 void (*DMAKickoffCallback)(NVPtr pNv);
197 XF86VideoAdaptorPtr overlayAdaptor;
198 XF86VideoAdaptorPtr blitAdaptor;
205 OptionInfoPtr Options;
207 unsigned char DDCBase;
222 drm_nouveau_fifo_init_t fifo;
230 Bool WaitVSyncPossible;
231 Bool BlendingPossible;
238 #define NVPTR(p) ((NVPtr)((p)->driverPrivate))
240 #endif /* __NV_STRUCT_H__ */